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Search Results (352)

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Keywords = high DC voltage gain

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27 pages, 3411 KB  
Article
Design of a Hybrid-ANN-PI Control Approach for Islanded Microgrid-Based Photovoltaic Battery Energy Storage Systems
by Haider H. Ali, Basil H. Jasim and Yasir Al-Yasir
Eng 2026, 7(6), 259; https://doi.org/10.3390/eng7060259 - 27 May 2026
Viewed by 303
Abstract
The direct-quadrature (dq) axis control method is a widely employed approach for off-grid and grid-connected inverters in solar photovoltaic (PV) systems that can regulate active and reactive power control. Conventional fixed-gain dq-axis PI controllers may exhibit degraded transient performance and reduced harmonic suppression [...] Read more.
The direct-quadrature (dq) axis control method is a widely employed approach for off-grid and grid-connected inverters in solar photovoltaic (PV) systems that can regulate active and reactive power control. Conventional fixed-gain dq-axis PI controllers may exhibit degraded transient performance and reduced harmonic suppression capability under highly dynamic operating conditions. This article proposes an innovative control scheme of an inverter-based islanded microgrid consisting of PV generation and battery energy storage systems (BESS) that can deliver stable power sharing and robust voltage regulation even under highly dynamic operating conditions. An improved inverter control method based on an artificial neural network-based proportional integral (ANN-PI) controller is investigated to accurately control the dq-axis approach for the DC-link and voltage control loops. The suggested system was validated under MATLAB/Simulink to prove the effectiveness of the proposed controller. The achieved results indicate that the ANN-PI controller presents a high convergence speed and low overshoot with a low total harmonic distortion (THD) index of 3.9% under resistive and inductive loads, thus meeting the IEEE power quality standards. Full article
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16 pages, 4941 KB  
Article
A Backside-Electrode-Free Lateral 4H-SiC JFET with Three-Terminal Dual-Gate Design for Stable DC Operation at 500 °C
by Yuting Tang, Qian Luo, Jiang Zhu, Hezhi Zhang, Yuchun Chang and Hongwei Liang
Micromachines 2026, 17(6), 642; https://doi.org/10.3390/mi17060642 - 22 May 2026
Viewed by 806
Abstract
To address the urgent need for electronics operable in extremely high-temperature environments, this paper presents a novel three-terminal, dual-gate, lateral 4H-SiC n-channel depletion-mode junction field effect transistor (JFET) without a backside electrode. Featuring a fully planar electrode layout, the device eliminates the back-gate [...] Read more.
To address the urgent need for electronics operable in extremely high-temperature environments, this paper presents a novel three-terminal, dual-gate, lateral 4H-SiC n-channel depletion-mode junction field effect transistor (JFET) without a backside electrode. Featuring a fully planar electrode layout, the device eliminates the back-gate effect and significantly improves integration compatibility. Experimental results demonstrate stable DC operation up to 500 °C, with an intrinsic gain of 9.79 at room temperature and 6.01 at 500 °C. Comparison with TCAD simulations confirms excellent agreement in the key physical trends of threshold voltage drift and mobility degradation, though quantitative discrepancies are observed and attributed to process-induced parasitic effects such as non-ideal ohmic contacts and interface states. Analysis shows that the new structure broadens the channel depletion layer by optimizing the depletion profile, thereby suppressing channel-length modulation and improving both output resistance and gate control. This work not only provides an effective device platform for high-temperature 4H-SiC analog integrated circuits (ICs) but also deepens the understanding of process-performance correlations, offering clear guidance for process-oriented device optimization. The proposed structure serves as a foundation for developing fully planar, high-temperature 4H-SiC analog ICs with promising potential in aerospace, automotive, and energy exploration systems. Full article
(This article belongs to the Section D1: Semiconductor Devices)
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16 pages, 11013 KB  
Article
Atmospheric-Pressure Plasma Polymerization of Fluorosilane Coatings for Suppressing DC Surface Flashover on Polystyrene
by Tianran Zhang, Zexi Gao, Penghao Zhang, Chengguo Yao and Shoulong Dong
Coatings 2026, 16(5), 627; https://doi.org/10.3390/coatings16050627 - 21 May 2026
Viewed by 245
Abstract
Direct current (DC) surface flashover on polystyrene (PS) remains a critical bottleneck that impedes its reliable application in high-voltage insulation apparatus. To circumvent the protracted processing durations and stringent film-forming conditions inherent in conventional surface modification techniques, this study proposes a novel “liquid-film-assisted [...] Read more.
Direct current (DC) surface flashover on polystyrene (PS) remains a critical bottleneck that impedes its reliable application in high-voltage insulation apparatus. To circumvent the protracted processing durations and stringent film-forming conditions inherent in conventional surface modification techniques, this study proposes a novel “liquid-film-assisted in situ rapid plasma curing” strategy. By harnessing atmospheric-pressure dielectric barrier discharge (DBD) technology within an argon ambient, the rapid (<6 min) and efficient deposition of a fluorosilane (FAS-13) functional coating onto the substrate was achieved. Microscopic characterizations coupled with isothermal surface potential decay (SPD) measurements reveal that this coating substantially mitigates the detrapping and surface migration of charge carriers. Macroscopic DC flashover testing corroborates that, under the optimal modification ratio, the surface breakdown voltage of PS is elevated to 14.04 kV, yielding an insulation gain of 26.94%. To elucidate the underlying physical mechanisms, density functional theory (DFT) calculations were conducted, revealing that the energy band misalignment between the wide-bandgap fluorinated layer and the substrate facilitates the construction of a high-density deep trap network (with a depth of ~0.8 eV) at the coating–substrate interface. By robustly anchoring primary electrons and inducing the formation of a homopolar space charge shielding layer, these deep traps physically arrest the evolution of the secondary electron emission avalanche (SEEA). Consequently, this work not only establishes a viable engineering framework for the rapid, large-scale surface reinforcement of DC insulation equipment but also provides profound quantum chemical insights into interfacial trap regulation within all-organic dielectrics. Full article
(This article belongs to the Section Functional Polymer Coatings and Films)
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34 pages, 2651 KB  
Article
Observer-Assisted Stability-Margin-Driven Prescribed-Time Distributed Control for Islanded DC Microgrids: Enhancing System Stability Under Large-Signal CPL Disturbances
by Haoran Zhang, Chuanyu Jiang and Xinyu Xu
Mathematics 2026, 14(10), 1682; https://doi.org/10.3390/math14101682 - 14 May 2026
Viewed by 206
Abstract
Although secondary control of direct current (DC) microgrids has been widely studied, traditional static current sharing may still cause severe voltage sag under large-signal constant power load (CPL) steps, and many distributed schemes rely on global topology information while showing limited transient disturbance [...] Read more.
Although secondary control of direct current (DC) microgrids has been widely studied, traditional static current sharing may still cause severe voltage sag under large-signal constant power load (CPL) steps, and many distributed schemes rely on global topology information while showing limited transient disturbance rejection. To address these issues, this paper proposes an observer-assisted, stability-margin-driven prescribed-time distributed secondary control strategy for islanded DC microgrids. A dynamic CPL risk evaluation function updates current-sharing ratios according to converter operating margins, while a distributed prescribed-time observer estimates disturbance envelopes and alleviates high-frequency chattering. Local adaptive gains remove the explicit dependence of controller tuning on global Laplacian eigenvalue information. MATLAB R2024a-based numerical studies show that, under a 6000 W CPL stress scenario, the proposed method limits the maximum voltage drop to 3.37 V, compared with 24.60 V for the conventional virtual current derivative (VCD) method. Under heterogeneous line impedances and a non-ideal digital benchmark, the proposed method yields a normalized current-sharing error of 0.72%, whereas the VCD method exhibits milder voltage transients. These results support the algorithmic effectiveness and numerical robustness of the proposed strategy within the adopted validation environment. Full article
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14 pages, 7500 KB  
Article
A Semi-Open-Loop, High-Robust Preamplifier for Hall Sensor with Optimized Transconductance Match
by Xukun Wang, Yuyang Ding, Chen Wang and Bo Zhou
Electronics 2026, 15(9), 1918; https://doi.org/10.3390/electronics15091918 - 1 May 2026
Viewed by 338
Abstract
A low-cost, high-robust, high-gain preamplifier is fabricated in a 65 nm CMOS for Hall sensors. A semi-open loop that combines an optimized differential–difference amplifier with a simplified open-loop amplifier is proposed to achieve stringent transconductance matching, with the same DC and AC conditions. [...] Read more.
A low-cost, high-robust, high-gain preamplifier is fabricated in a 65 nm CMOS for Hall sensors. A semi-open loop that combines an optimized differential–difference amplifier with a simplified open-loop amplifier is proposed to achieve stringent transconductance matching, with the same DC and AC conditions. A two-stage reconfigurable structure, together with an embedded offset-accumulation elimination scheme, relieves open-loop stress and achieves both high fidelity and accurate gain. The experimental results show that the preamplifier has a variable gain of 34.6–46.6 dB and a gain error no more than 0.12% under process/voltage/temperature variations and without error calibration, at the cost of an active area of 0.076 mm2 and a current dissipation of 0.7 mA under a 2.5–3.3 V supply. Specifically, both the loop topology and the transconductance match are different from the existing works. Full article
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24 pages, 5567 KB  
Article
Design of a High-Gain Common-Grounded ZVT DC-DC Converter with Sustained Soft Switching
by Aftab Ali Samejo, Jianfei Chen, Yigang He, Andres Annuk, Imad Hussain and Adeel Bashir
Machines 2026, 14(5), 485; https://doi.org/10.3390/machines14050485 - 26 Apr 2026
Viewed by 533
Abstract
To address the performance requirements of power interface converters in fuel cell vehicles, a high-voltage gain DC–DC converter with a common-ground structure and zero-voltage-transition (ZVT) operation is proposed. The converter employs two interleaved boost cells in an input-parallel output-series (IPOS) configuration to achieve [...] Read more.
To address the performance requirements of power interface converters in fuel cell vehicles, a high-voltage gain DC–DC converter with a common-ground structure and zero-voltage-transition (ZVT) operation is proposed. The converter employs two interleaved boost cells in an input-parallel output-series (IPOS) configuration to achieve low input-current ripple and high voltage gain. A single auxiliary circuit enables soft-switching for all switches during turn-on and turn-off, while diodes operate under zero-current switching (ZCS), reducing switching and reverse-recovery losses. In addition, voltage stress across devices is limited to half of the output voltage, allowing the use of lower-rated components. A 1 kW prototype operating at 50 V input and 400 V output at 50 kHz is experimentally validated. The converter achieves efficiency above 92.5%, with a peak of 95.46% and up to 97.41% at higher input voltages, while maintaining stable output performance. These results demonstrate the suitability of the proposed converter for high-efficiency fuel cell-based applications. Full article
(This article belongs to the Special Issue Power Converters: Topology, Control, Reliability, and Applications)
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19 pages, 4189 KB  
Article
A Precision Operational Amplifier with eTrim-Based Offset Calibration and Two-Point Temperature Drift Trim
by Yongji Wu and Weiqi Liu
Electronics 2026, 15(7), 1529; https://doi.org/10.3390/electronics15071529 - 6 Apr 2026
Viewed by 768
Abstract
This work introduces a trimming technique based on eTrim technology to minimize both the input-referred offset voltage and its temperature drift in the operational amplifiers. The proposed low-voltage op-amp utilizes the body effect to maintain a constant bandwidth across the rail-to-rail input common-mode [...] Read more.
This work introduces a trimming technique based on eTrim technology to minimize both the input-referred offset voltage and its temperature drift in the operational amplifiers. The proposed low-voltage op-amp utilizes the body effect to maintain a constant bandwidth across the rail-to-rail input common-mode range under low supply voltages. During input common-mode transitions, the current in the folded cascode stage remains stable, ensuring a robust output stage. Furthermore, a specialized gain-boosting structure enhances the low-frequency gain while preventing occasional latch-up during low-voltage power-up. A pin-multiplexing scheme is employed for trimming data input, thereby eliminating the need for dedicated trimming pins and mitigating post-package parameter variations. At room temperature, a constant-current injection mechanism reduces the DC offset to microvolt levels. At high temperature, temperature-compensated current injection cancels the first-order drift component. Implemented in a low-voltage operational amplifier, post-layout simulation results demonstrate that with a 100-pF capacitive load, the amplifier achieves a gain–bandwidth product exceeding 10 MHz, a low-frequency gain greater than 140 dB, and an input-referred noise of 2.54 µVp-p for the P-channel input and 3.95 µVp-p for the N-channel input. The trimming process reduces the residual offset to the microvolt range and effectively suppresses offset drift, ensuring accurate offset compensation across the specified temperature range. Full article
(This article belongs to the Section Microelectronics)
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14 pages, 4034 KB  
Article
Unified Small-Signal Modeling of Non-Isolated High Step-Up Converters Based on the Multistate Switching Cell
by Paulo Henrique Feretti, Mariana Martins Lima, Alencar Franco de Souza and Fernando Lessa Tofoli
Energies 2026, 19(7), 1738; https://doi.org/10.3390/en19071738 - 2 Apr 2026
Viewed by 500
Abstract
This work introduces a systematic small-signal modeling framework for a family of non-isolated high step-up dc–dc converters based on the multistate switching cell (MSSC) operating in continuous conduction mode (CCM). By analyzing the current and voltage waveforms associated with the switching cell, an [...] Read more.
This work introduces a systematic small-signal modeling framework for a family of non-isolated high step-up dc–dc converters based on the multistate switching cell (MSSC) operating in continuous conduction mode (CCM). By analyzing the current and voltage waveforms associated with the switching cell, an averaged circuit model based on the pulse width modulation (PWM) switch technique is derived. The proposed method relies only on basic circuit principles, avoiding complex matrix manipulations. To validate the theoretical assumptions, a non-isolated dc–dc boost converter with a high voltage gain is evaluated, and its response is compared with that of the derived model. Full article
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33 pages, 11379 KB  
Article
Different Switching Strategy for a Quadratic Boost Converter Based on Non-Series Energy Transfer (QBC-NSET)
by Luis Humberto Diaz-Saldierna, Julio C. Rosas-Caro, Jesus Leyva-Ramos, José G. González-Hernández, Francisco Beltran-Carbajal and Johnny Posada
Electricity 2026, 7(2), 31; https://doi.org/10.3390/electricity7020031 - 2 Apr 2026
Viewed by 778
Abstract
This paper explores a new switching strategy for a recently proposed quadratic boost converter. The topology under study is a high-step-up DC–DC converter with a configuration that allows a portion of the processed energy to be used in what we call a non-series [...] Read more.
This paper explores a new switching strategy for a recently proposed quadratic boost converter. The topology under study is a high-step-up DC–DC converter with a configuration that allows a portion of the processed energy to be used in what we call a non-series transfer. This characteristic reduces the amount of power processed redundantly. This converter, called a Quadratic Boost Converter based on Non-Series Energy Transfer (QBC-NSET), also has a non-pulsating input current, which is especially desirable for applications like photovoltaic and fuel-cell sources. This paper proposes a different switching strategy that reduces the output voltage ripple without increasing the switching frequency and without increasing the stored energy (inductance in inductors or capacitance in capacitors). The converter has two transistors, originally operated with synchronized signals; the proposed strategy provides independent switching signals with a phase shift between them. This enables the output capacitor to charge in a different switching state, producing a smaller voltage ripple while preserving the advantages of the topology originally presented. Steady-state analysis and voltage gain derivations confirm that the fundamental conversion characteristics remain unchanged. Experimental results obtained from a laboratory prototype validate the effectiveness of the proposed approach, demonstrating the reduction in the output voltage ripple. Full article
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21 pages, 4622 KB  
Article
A Mutual Inductance–Capacitance IPOS-Type Self-Balancing LLC Resonant Converter
by Jin Li, Ao Liu and Weiyi Tang
Energies 2026, 19(7), 1731; https://doi.org/10.3390/en19071731 - 1 Apr 2026
Viewed by 542
Abstract
In low-voltage-input, high-voltage-output applications, the input-parallel output-series (IPOS) LLC resonant converter experiences voltage and current imbalances due to parameter mismatches in resonant tank components. To address this issue, a self-balancing IPOS LLC resonant converter based on a shared inductance–capacitance (shared L-C) network is [...] Read more.
In low-voltage-input, high-voltage-output applications, the input-parallel output-series (IPOS) LLC resonant converter experiences voltage and current imbalances due to parameter mismatches in resonant tank components. To address this issue, a self-balancing IPOS LLC resonant converter based on a shared inductance–capacitance (shared L-C) network is proposed. This topology achieves passive voltage and current self-equalization with an interconnection network of resonant inductors and capacitors between modules that does not need additional active components or complex control strategies. An analytical model based on the fundamental harmonic approximation (FHA) is developed to quantitatively assess the balancing performance, and a comparison is made with traditional structures and IPOS structures with only shared inductance. A 1.25 kW two-phase LLC resonant converter prototype is built for experimental validation. The results demonstrate that the balancing errors of the traditional structure and the shared inductance structure reach up to 25.43% and 17.63%, respectively, whereas the proposed structure significantly reduces the balancing error to only 0.43%. This study confirms that this structure provides a simple and reliable solution for voltage and current equalization in high-gain DC–DC conversion systems. Full article
(This article belongs to the Section F3: Power Electronics)
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27 pages, 18841 KB  
Article
Dual-Layer Multi-Port High-Gain DC-DC Power Converter with Hybrid Voltage/Current Distribution Strategy
by Lijuan Wang, Feng Zhou, Pengqiang Nie, Seiji Hashimoto and Takahiro Kawaguchi
Electronics 2026, 15(7), 1454; https://doi.org/10.3390/electronics15071454 - 31 Mar 2026
Viewed by 467
Abstract
In light of the global issue of “Carbon Neutrality”, a high proportion of renewable energy integrated into modern power systems has become the key to energy strategic transformation, which has escalated the demand for high-gain, high-power converters for DC energy conversion. In this [...] Read more.
In light of the global issue of “Carbon Neutrality”, a high proportion of renewable energy integrated into modern power systems has become the key to energy strategic transformation, which has escalated the demand for high-gain, high-power converters for DC energy conversion. In this paper, a non-isolated double-layer multi-port parallel-connected high-gain DC–DC conversion system has been proposed. The system consists of two energy layers: the upper layer is designed as a non-isolated high-gain three-port DC conversion topology, which includes two energy inputs and one output port, and the bottom layer is a three-port constant current output module. The output ports of these layers are connected in parallel, while the input ports are independent. Thus, both high output voltage gain and power capacity were fulfilled for the renewable power application condition. The system is capable of operating in both input-parallel–output-parallel (IPOP) and multi-input–independent-output-parallel (MIIOP) modes, thereby enabling multi-port high-gain DC power conversion. Detailed analysis of the operation strategies under a switching cycle for both energy layers is presented. A small signal was introduced to establish the mathematical model of both energy topologies. In order to simultaneously regulate the output voltage and achieve dynamic current sharing between the layers, an adaptive current-sharing control strategy was developed based on the established system models. The proposed control strategy can control the output voltage through the upper-layer topology and dynamically allocates output current between the layers based on the output power level, which will effectively enhance the system’s power rating. The simulation mode was built in the PSIM environment, open-loop simulations were carried out for obtaining system characteristics, and closed-loop simulations were conducted for control efficiency validation. Finally, a 2000-W experimental prototype was developed based on the digital control center dsPIC33FJ64GS606. Open-loop and closed-loop experiments were carried out for system performance evaluation. Both simulation and experimental results successfully evaluated the power transfer performance and control system performance of the proposed system, and a peak efficiency of 95.7% under 10 times voltage gain was achieved. Full article
(This article belongs to the Special Issue Stability and Optimization Design of Microgrid Systems)
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24 pages, 7490 KB  
Article
Robust Detection Algorithm for Single-Phase Voltage Sags Integrating Adaptive Composite Morphological Filtering and Improved MSTOGI-PLL
by Jun Zhou, Enming Wang, Jianjun Xu and Yang Yu
Energies 2026, 19(7), 1621; https://doi.org/10.3390/en19071621 - 25 Mar 2026
Viewed by 437
Abstract
Voltage sags pose severe risks to sensitive equipment in modern industries, requiring power quality monitoring equipment to possess fast and accurate sag detection capabilities. The traditional second-order generalized integrator (SOGI) will have oscillation phenomena in the case of DC offset, low-frequency harmonics, and [...] Read more.
Voltage sags pose severe risks to sensitive equipment in modern industries, requiring power quality monitoring equipment to possess fast and accurate sag detection capabilities. The traditional second-order generalized integrator (SOGI) will have oscillation phenomena in the case of DC offset, low-frequency harmonics, and high-frequency impulse noise. This study introduces a strong detection algorithm that combines Adaptive Composite Morphological Filtering (ACMF) with an improved Mixed Second- and Third-Order Generalized Integrator (MSTOGI). First, the ACMF pre-filtering module dynamically adjusts the scale of composite structuring elements through periodic parameter optimization, effectively filtering high-frequency random impulses while preserving the sharp transitions of abrupt voltage changes. Second, MSTOGI eliminates DC offset, and optimizes the gain coefficient to achieve the best dynamic response speed. Ultimately, a cascaded notch filter (CNF) module focuses on and removes even-order harmonic ripples caused by the synchronous reference frame transformation. Simulation results indicate that under severe grid conditions involving multiple composite distortions, the proposed architecture reduces the sag detection time to within 1.0 ms under typical operating conditions, with steady-state phase errors strictly controlled within a ±2° range. This method provides a reliable solution for DVR and UPS. Full article
(This article belongs to the Section F1: Electrical Power System)
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25 pages, 10186 KB  
Article
Optimization Design Method for Full-Bridge LLC Resonant Converter Based on Fractional-Order Characteristics of Resonant Tank
by Xiaoquan Zhu, Chentao Ma and Haochi He
Fractal Fract. 2026, 10(3), 194; https://doi.org/10.3390/fractalfract10030194 - 16 Mar 2026
Viewed by 1023
Abstract
The full-bridge LLC resonant converter is one of the most suitable converters for high-power, high-efficiency applications. Although the design methodologies for full-bridge LLC resonant converters are already well-established, the development of the fractional-order domain has brought new flexibility to converter design. Based on [...] Read more.
The full-bridge LLC resonant converter is one of the most suitable converters for high-power, high-efficiency applications. Although the design methodologies for full-bridge LLC resonant converters are already well-established, the development of the fractional-order domain has brought new flexibility to converter design. Based on the fact that inductors and capacitors have fractional-order characteristics, this paper presents a de-normalized fractional-order FHA gain model, which reveals the impact of fractional-order characteristics of practical inductors and capacitors on the converter gain. By maintaining the convenience of the FHA design method, this work identifies the fractional orders of a resonant tank inductor and capacitor and incorporates them into the parameter design as part of the design requirements, making the design results more accurate than the conventional FHA design method. Specifically, compared with the conventional FHA-based design, the proposed approach improves the DC voltage gain margin of the full-bridge LLC converter by 26% and expands the ZVS operating range margin by 23.3%. Full article
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32 pages, 9051 KB  
Article
Interleaved High-Gain DC-DC Converters with Low Input Ripple and Voltage Stress for Passenger Fuel Cell Vehicles
by Jiulong Wang, Yanhui Liu, Yinghui Wang, Jiheng Su and Xilong Bai
Electronics 2026, 15(6), 1222; https://doi.org/10.3390/electronics15061222 - 14 Mar 2026
Viewed by 480
Abstract
Passenger fuel cell vehicles (FCVs) require high-gain DC/DC converters to achieve voltage matching between the low-power fuel cell (FC) stack (50–200 V) and the vehicle DC bus (400–800 V). To address the challenges in existing step-up DC/DC converters in relation to balancing the [...] Read more.
Passenger fuel cell vehicles (FCVs) require high-gain DC/DC converters to achieve voltage matching between the low-power fuel cell (FC) stack (50–200 V) and the vehicle DC bus (400–800 V). To address the challenges in existing step-up DC/DC converters in relation to balancing the requirements of high voltage gain, wide input voltage range, low input current ripple and voltage stress, the common ground of input–output, and high efficiency in passenger FCV applications, this paper proposes three types of high-gain DC/DC converters based on an interleaved structure, incorporating quadratic Boost, quasi-Z source, and switched-inductor impedance networks. These designs effectively balance the scenario requirements of passenger FCVs. Meanwhile, taking one of the proposed converters (Interleaved-Quadratic Boost; I-QB) as an example, its steady-state performance such as voltage gain is analyzed and compared in detail with existing voltage step-up DC/DC converters. Furthermore, a scaled-down SiC-based experimental platform is constructed. Steady-state experiments validate the converter’s maximum voltage step-up capability of ten times, wide input voltage range of 30–80 V, input current ripple of less than 0.3 A, and low voltage stress on devices (≤Uo/2), thereby confirming the feasibility of these converters and the correctness of the performance analysis. The dynamic experimental results indicated that under input voltage step changes of 50–80 V and 100–50% load step changes, the I-QB converter exhibits a minor voltage overshoot with settling time under 200 ms. The prototype achieves a peak efficiency of 94.2%, confirming these converters’ suitability for passenger FCV powertrains. Full article
(This article belongs to the Section Power Electronics)
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30 pages, 8869 KB  
Article
Advanced Control of a Thermoelectric Generator-Supplied Modified Z-Source Converter for High-Gain DC Microgrids
by Mehmet Zahid Erel
Sustainability 2026, 18(6), 2747; https://doi.org/10.3390/su18062747 - 11 Mar 2026
Viewed by 520
Abstract
Thermoelectric generators (TEGs) enable compact waste-heat energy harvesting but require high-gain DC–DC conversion due to their low-output voltage for DC microgrid interfacing. This work proposes a novel TEG-supplied two-stage architecture consisting of a perturb-and-observe (P&O)-based MPPT boost converter followed by a modified Z-source [...] Read more.
Thermoelectric generators (TEGs) enable compact waste-heat energy harvesting but require high-gain DC–DC conversion due to their low-output voltage for DC microgrid interfacing. This work proposes a novel TEG-supplied two-stage architecture consisting of a perturb-and-observe (P&O)-based MPPT boost converter followed by a modified Z-source converter regulated through an advanced model predictive control (MPC) framework. The modified Z-source topology enables high-voltage gain without extreme duty ratios and mitigates switching losses by eliminating diode reverse-recovery effects via synchronous operation. To enhance dynamic performance, the advanced MPC strategy incorporating an adaptive ripple-based weighting mechanism is applied to the modified Z-source converter and benchmarked against MPC and sliding mode control (SMC). Simulation results under multiple disturbance scenarios, including hot-side and cold-side temperature variations, multi-condition disturbances, coupling-factor variation, and measurement noise, demonstrate that the proposed system maintains stable 400 V regulation at a 100 W output level. In contrast, MPC exhibits switching frequency deviations that increase switching losses during transient operation, while SMC suffers from significant voltage deviations under source variations. The proposed strategy maintains tight voltage regulation with nearly fixed-frequency operation around 50 kHz, providing a new perspective for TEG researchers while supporting sustainable waste-heat energy utilization. Full article
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