Search Results (279)

With their superior switching speed, GaN high-electron-mobility transistors (HEMTs) enable high power density, reduce energy losses, and increase power efficiency in a wide range of applications, such as power electronics, due to their high breakdown voltage. GaN-HEMT devices are subject to long-term reliability due to the self-heating effect and lattice mismatch between the SiC substrate and the GaN. Depletion-mode GaN HEMTs are utilized for radio frequency applications, and this work investigates three wide-bandgap (WBG) GaN HEMT fixed-frequency oscillators with output buffers. The first GaN-on-SiC HEMT oscillator consists of an HEMT amplifier with an LC feedback network. With the supply voltage of 0.8 V, the single-ended GaN oscillator can generate a signal at 8.85 GHz, and it also supplies output power of 2.4 dBm with a buffer supply of 3.0 V. At 1 MHz frequency offset from the carrier, the phase noise is −124.8 dBc/Hz, and the figure of merit (FOM) of the oscillator is −199.8 dBc/Hz. After the previous study, the hot-carrier stressed RF performance of the GaN oscillator is studied, and the oscillator was subject to a drain supply of 8 V for a stressing step time equal to 30 min and measured at the supply voltage of 0.8 V after the step operation for performance benchmark. Stress study indicates the power oscillator with buffer is a good structure for a reliable structure by operating the oscillator core at low supply and the buffer at high supply. The second balanced oscillator can generate a differential signal. The feedback filter consists of a left-handed transmission-line LC network by cascading three unit cells. At a 1 MHz frequency offset from the carrier of 3.818 GHz, the phase noise is −131.73 dBc/Hz, and the FOM of the 2nd oscillator is −188.4 dBc/Hz. High supply voltage operation shows phase noise degradation. The third GaN cross-coupled VCO uses 8-shaped inductors. The VCO uses a pair of drain inductors to improve the Q-factor of the LC tank, and it uses 8-shaped inductors for magnetic coupling noise suppression. At the VCO-core supply of 1.3 V and high buffer supply, the FOM at 6.397 GHz is −190.09 dBc/Hz. This work enhances the design techniques for reliable GaN HEMT oscillators and knowledge to design high-performance circuits. Full article

LCL (inductor–capacitor–inductor) filters are widely used in grid-connected inverters, particularly in electric vehicle (EV) battery-to-grid systems, for harmonic suppression but introduce resonance issues that compromise stability. This study presents a novel sensorless active damping strategy based on μ-synthesis control for EV batteries connected to the grid via LCL filters, eliminating the need for additional current sensors while preserving harmonic attenuation. A comprehensive state–space and process noise model enables accurate capacitor current estimation using only grid current and point-of-common-coupling (PCC) voltage measurements. The proposed method maintains robust performance under ±60% LCL parameter variations and integrates a proportional-resonant (PR) current controller for resonance suppression. Hardware-in-the-loop (HIL) validation demonstrates enhanced stability in dynamic grid conditions, with total harmonic distortion (THD) below 5% (IEEE 1547-compliant) and current tracking error < 0.06 A. Full article

Many novel microwave devices have been developed based on the left-handed (LH) structure. This paper studies three CMOS standing-wave oscillators (SWOs) using an LH LC network. The first SWO is a class-B VCO, and the second SWO is a class-C SWO. The SWOs are implemented with the TSMC 0.18 μm 1P6M CMOS process technology. The SWOs utilize two units of an LH LC resonator, and the LC resonator is shunted with a pair of cross-coupled transistors to compensate for the loss in the LC resonator. The first and second SWOs utilize two O-shaped inductors to form a unit cell with capacitors. The third SWO utilizes an eight-shaped inductor and an orthogonal transformer to conserve the die area and suppress the magnetic coupling noise. The die area of the third oscillator is 0.986 × 0.756 mm². The SWO can generate differential signals in the frequency range of 8.3 GHz–9.3 GHz (10.83%), and its measured figure of merit (FOM) is −188.6 dBc/Hz at a 1 MHz offset frequency. Full article

This paper analyzes the possibility of using averaged models to analyze the distribution of power losses in the components of a DC-DC converter including a power module. An electrothermal averaged model of a buck converter including the IGBT module was formulated. This model takes into consideration conduction and switching losses in the mentioned components, the self-heating phenomenon in each component, and mutual thermal coupling between their sub-components. It is designed for SPICE software (version PSPICE A/D 17.4). Its correctness was verified experimentally, and the results obtained were compared with the results of analyses performed with the use of PLECS software and the IGBT module model proposed by the manufacturer. The proposed model’s results show very good accuracy. Through the use of the proposed model, the dependences of the components of power losses and the case temperature of the IGBT module and the inductor on parameters describing the control signal and load of this converter were determined. The distribution of power losses in the converter components was analyzed for selected operating conditions of the buck converter. On the basis of the results obtained, some recommendations were formulated for designers of such DC-DC converters. Full article

This paper proposes a family of high-efficiency DC-DC boost converters employing voltage-doubling coupled-inductor technology with a low component count. By varying the homonymous winding connections of the coupled inductor, three topologies are developed: parallel (PWCDVD-CLBC), series (SWCDVD-CLBC), and flipped-parallel (FPWCDVD-CLBC). These converters achieve high-voltage gain, continuous input current, and low-voltage stress across components. The PWCDVD-CLBC and FPWCDVD-CLBC configurations exhibit voltage gains proportional to the turn ratio, while the SWCDVD-CLBC shows an inverse relation, enabling reduced turn ratios. Detailed operational principles, mathematical analysis, and performance advantages are presented. A comparative evaluation demonstrates a higher voltage gain, realizes continuous input current, and has lower voltage stresses. The experimental results validate the theoretical analysis and confirm the feasibility and efficiency of the proposed designs. Full article

This paper introduces a non-isolated ultra-high voltage gain topology using the combination of the coupled-inductor-based inverting buck-boost converter (IBB) and voltage multiplier (VM) structure. In the proposed converter, an ultra-high step-up voltage gain can be achieved with a small duty cycle thanks to a coupled inductor and VMs. The voltage stress and the losses of the switches in the proposed converter are even less than other conventional topologies. Unlike other coupled-inductor topologies, a large voltage spike caused by the leakage inductance of the coupled inductor is smoothed by the capacitor in the voltage multiplier. In addition, zero-voltage switching (ZVS) turn-on for the switches and zero-current switching (ZCS) turn-off for the diodes can be achieved with the energy stored in the leakage inductance. A 360 W (40 V/380 V) prototype converter is implemented to prove the advantages of the proposed converter, with a maximum efficiency of 98.4%. Full article

A closed-loop transmission line (TL) coupled to an LCR resonator is used in this study for a fully-integrated CMOS rotary traveling wave oscillator (RTWO) based on the rotary traveling wave principle. A technique for the suppression of magnetic coupling noise is presented with eight-shaped inductors. The design and measurement of an 8.53 GHz oscillator in the TSMC 0.18 μm CMOS technology are discussed. The fully-integrated chip occupies a die area of 1.2 × 1.2 mm². The oscillator consists of four sub-oscillators and uses four 1:1 symmetric twisted transformers, with the secondary inductors connected to form a twisted closed-loop transmission line for coupling the sub-oscillators. The transformers are configured as eight-shaped structures to minimize the far-field magnetic field radiation from each transformer and the whole transformer. At a supply voltage of 1.7 V, the power consumption is 5.84 mW. The free-running oscillation frequency of the RTWO is tunable from 8.53 GHz to 10.0 GHz. The measured phase noise at a 1 MHz frequency offset is −122.4 dBc/Hz at an oscillation frequency of 8.53 GHz, and the figure of merit (FOM) of the proposed VCO with a specific inductor layout is −193.4 dBc/Hz, surpassing other similar RTWOs. The FOM with a tuning range (FOM_T) is −195.96 dBc/Hz. Full article

This paper presents a highly linear two-stage InGaP/GaAs power amplifier integrated circuit (PAIC) using a dynamic predistorter for 5G small-cell applications. The proposed predistorter, based on a diode-connected transistor, utilizes a supply voltage to accurately control the linearization characteristics by adjusting its dc current. It is connected in parallel with an inter-stage of the two-stage PAIC through a series configuration of a resistor and an inductor, and features a shunt capacitor at the base of the transistor. These passive components have been optimized to enhance the linearization performance by managing the RF signal’s coupling to the diode. Using these optimized components, the AM−AM and AM−PM nonlinearities arising from the nonlinear resistance and capacitance in the diode can be effectively used to significantly flatten the AM−AM and AM−PM characteristics of the PAIC. The proposed predistorter was applied to the 2.6 GHz two-stage InGaP/GaAs HBT PAIC. The IC was tested using a 5 × 5 mm² module package based on a four-layer laminate. The load network was implemented off-chip on the laminate. By employing a continuous-wave (CW) signal, the AM−AM and AM−PM characteristics at 2.55–2.65 GHz were improved by approximately 0.05 dB and 3°, respectively. When utilizing the new radio (NR) signal, based on OFDM cyclic prefix (CP) with a signal bandwidth of 100 MHz and a peak-to-average power ratio (PAPR) of 9.7 dB, the power-added efficiency (PAE) reached at least 11.8%, and the average output power was no less than 24 dBm, achieving an adjacent channel leakage power ratio (ACLR) of −40.0 dBc. Full article

Wireless power transfer (WPT) is recognized as a critical technology to advance carbon neutrality in transportation by alleviating charging challenges for electric vehicles and accelerating their adoption to replace fossil fuel. To ensure durability under traffic loads and harsh environments while avoiding vehicle obstructions, WPT primary circuits should be embedded within pavement structures rather than surface-mounted. This study systematically investigated the optimization of magnetite-modified asphalt material composition and thickness for enhancing electromagnetic coupling in WPT systems through integrated numerical and experimental approaches. A 3D finite element model (FEM) and a WPT platform with primary-side inductor–capacitor–capacitor (LCC) and secondary-side series (S) compensation were developed to assess the electromagnetic performance of magnetite content ranging from 0 to 25% and pavement thickness ranging from 30 to 70 mm. Results indicate that magnetite incorporation increased efficiency from 80.3 to 84.7% and coupling coefficients from 0.236 to 0.242, with power loss increasing by only 0.25 W. This enhancement is driven by improved equivalent permeability, which directly enhances magnetic coupling efficiency. A critical pavement thickness of 50 mm was identified, beyond which the reduction in transmission efficiency increased significantly due to magnetic flux dispersion. Additionally, the nonlinear increase in power loss is partially attributed to the significant rise in hysteresis and eddy current losses at elevated magnetite content levels. The proposed design framework, which focuses on 10% magnetite content and a total pavement thickness of 50 mm, achieves an optimal energy transfer efficiency. This approach contributes to sustainable infrastructure development for wireless charging applications. Full article

This paper presents an ultra-wideband low-noise amplifier (LNA) with a new cross-coupling noise-canceling technique for 28 nm CMOS technology. The entire LNA contains two stages. The first stage employs inductively coupled Gm-boosted technology, while the second stage is a novel asymmetric cross-coupling noise-canceling structure (ACCNCS). Through the introduction of these two key techniques, the LNA achieves balanced performance across a relative bandwidth of 56%. Input/output/inter-stage impedance matching uses a transformer-based network with series-parallel combinations of inductors and capacitors. The LNA is designed in a 28 nm CMOS process with a chip core area of 335 × 665 µm². The operating frequency range is 26–46 GHz. Post-layout simulation results show that the peak gain of the LNA is 12.6 dB, and the noise figure is between 2.9 and 4.2 dB across the wideband range. At a center frequency of 36 GHz with a supply voltage (V_DD) of 0.9 V, the input 1 dB compression point (IP_1dB) is −7.6 dBm, while the power consumption is 22 mW. Full article

To achieve lower switching losses and higher frequency capabilities in converter design, researchers worldwide have been investigating Silicon carbide (SiC) modules and MOSFETs. In power electronics, wide bandgap devices such as Silicon carbide are essential for creating more efficient, higher-density, and higher-power-rated converters. Devices like SiC and Gallium nitride (GaN) offer numerous advantages in power electronics, particularly by influencing parasitic capacitance and inductance in printed circuit boards (PCBs). A review paper on Silicon carbide converter designs using coupled inductors provides a comprehensive analysis of the advancements in SiC-based power converter technologies. Over the past decade, SiC converter designs have demonstrated both efficiency and reliability, underscoring significant improvements in performance and design methodologies over time. This review paper examines developments in Silicon carbide converter design from 2014 to 2024, with a focus on the research conducted in the past ten years. It highlights the advantages of SiC technology, techniques for constructing converters, and the impact on other components. Additionally, a bibliometric analysis of prior studies has been conducted, with a particular focus on strategies to minimize switching losses, as discussed in the reviewed articles. Full article

This paper presents two new non-isolated DC-DC converters with and without a coupled inductor based on quadratic voltage conversion. Firstly, the coupled inductor-less type is explained in detail. It employs a voltage-boosting cell and a modified SEPIC structure to provide a high voltage boost ability with a lower and practical value for the switching duty cycle. This allows for lower power loss compared to conventional DC-DC converters. Having only one switch in the proposed converter simplifies the control and reduces the required number of control signals. Furthermore, the presented transformer-less structure can help avoid producing huge voltage spikes across the power switch. In traditional quadratic SEPIC converters, the voltage-boosting cell’s capacitor experiences relatively high voltage stress due to the voltage multiplication process. In contrast, the proposed converter offers significantly lower voltage stresses. Hence, it becomes possible to utilize a capacitor with a lower voltage rating, leading to cost savings and improved reliability and availability of suitable components. The first topology can be improved for ultrahigh voltage applications by replacing the middle inductor with a coupled transformer. Consequently, a higher voltage range with a lower switching duty cycle can be attained. Theoretical analysis and mathematical derivations are provided, and the comparison section claims the proposed converter’s ability to minimize voltage stress across the switch and output diode. Finally, experimental results are given to verify the effectiveness of the proposed converters at an output power of 260 W. Full article

By combining a coupled inductor with voltage multipliers, the voltage gain of a boost converter can be improved significantly. This method has good application prospects in renewable energy generation and in DC microgrids. A coupled inductor is the core component of the high step-up DC/DC converter and has serious impact on its performance. However, shortage in the methods used to design the coupled inductor have limited the applications of such converters. By analyzing the operating modes of the high step-up DC/DC converter with a three-winding coupled inductor combined with two voltage multipliers, accurate and simplified models of currents in the three windings are established. Furthermore, a design methodology for a multi-winding coupled inductor is put forward, in which a method of calculating the boost inductance and product areas (AP) and a method for selecting the magnetic core are established. The influence of winding arrangements and loss evaluations of the coupled inductor are also investigated. Finally, a 200 W prototype converter with an input of 20 V and output of 200 V is prepared and tested. The correctness of the current models of and design methods used on coupled inductor are verified. More important, the method proposed to design multi-winding coupled inductors can be applied to design high step-up DC/DC converters with different topologies. Full article

As integrated electronic microsystems advance, their internal components demonstrate increasing miniaturization, higher-density integration, and, consequently, significantly enhanced performance. This paper presents an on-chip transformer balun. The balun has a combination of planar coupled inductors and filtering capacitors using integrated passive device (IPD) technology, giving it the advantages of a more compact circuit size and lower cost to achieve single-ended to differential function on glass substrates. Moreover, it can be integrated in systems by flip-chip. The die has a size of 1.81 mm × 1.36 mm with a −15 dB single-ended return loss bandwidth of 2.07 GHz to 4.30 GHz. Within this bandwidth, the maximum insertion loss is 2.56 dB, and the amplitude imbalance is less than 2.04 dB. The phase difference between the differential signals is 180 ± 14.02° and the common mode rejection ratio (CMRR) is above 19.08 dB. The balun has the potential of miniaturization for integration on package or through-glass interposers (TGIs). Full article

Nanocrystalline powders, characterized by a biphasic amorphous nanocrystalline structure, demonstrate outstanding soft magnetic characteristics, including reduced coercivity (H_c), enhanced effective permeability (μ_e), and increased resistivity. However, their high hardness, poor formability, and significant core loss (P_cv) restrict their use in high-performance molded inductors. In this study, FeSiBCuNb/FeSiAl nanocrystalline soft magnetic composites (NSMCs) were fabricated, and the influence of varying the FeSiAl concentration on the microstructure, density, and soft magnetic characteristics of NSMCs was investigated. Then, the underlying mechanisms of these effects were explained. The results demonstrate that FeSiAl exhibits apparent deformation following compression, effectively filling the air gap between the FeSiBCuNb powder particles, thereby enhancing coupling among the magnetic particles. Consequently, the density of the NSMCs was enhanced, leading to a significant improvement in their overall soft magnetic properties. When 50 wt.% FeSiAl is added, the NSMCs display outstanding magnetic properties, including a low H_c of 4.36 Oe, a high μ_e of 48.7, a low P_cv of 119.35 kW/m³ at 50 mT and 100 kHz, and a high DC-bias performance of 73.29% at 100 Oe. Compared to NSMCs without FeSiAl, μ_e increased by 59.4% and P_cv decreased by 66.1%. Meanwhile, the incorporation of ultrafine FeSiAl powder was found to significantly improve the material properties, as the deformable FeSiAl particles effectively fill interparticle gaps during compaction, enhancing density and magnetic coupling. The 50 wt.% FeSiAl composition demonstrated exceptional properties. These advances address critical challenges in high-frequency power electronic applications and provide a practical material solution for next-generation power electronics. Full article