Left-Hand Resonator VCO Using an Orthogonal Transformer

Abstract

Many novel microwave devices have been developed based on the left-handed (LH) structure. This paper studies three CMOS standing-wave oscillators (SWOs) using an LH LC network. The first SWO is a class-B VCO, and the second SWO is a class-C SWO. The SWOs are implemented with the TSMC 0.18 μm 1P6M CMOS process technology. The SWOs utilize two units of an LH LC resonator, and the LC resonator is shunted with a pair of cross-coupled transistors to compensate for the loss in the LC resonator. The first and second SWOs utilize two O-shaped inductors to form a unit cell with capacitors. The third SWO utilizes an eight-shaped inductor and an orthogonal transformer to conserve the die area and suppress the magnetic coupling noise. The die area of the third oscillator is 0.986 × 0.756 mm². The SWO can generate differential signals in the frequency range of 8.3 GHz–9.3 GHz (10.83%), and its measured figure of merit (FOM) is −188.6 dBc/Hz at a 1 MHz offset frequency.

1. Introduction

Voltage-controlled oscillators (VCOs) are critical elements in modern wireless communication circuits. Inductorless fully integrated VCOs, such as relaxation oscillators [1], and ring VCO [2] are preferred in applications to minimize size, cost, and power consumption but they lack good performances subject to process–voltage–temperature (PVT) variations. One popular VCO using lumped inductors exhibits a better phase noise performance owing to the high tank-quality factor. A recent wave-based oscillator also shows a high degree of merit (FOM) [3]. In the GHz range, the inductor-type VCOs demand a large silicon area and high product costs.

The transmission lines (TLs) shown in Figure 1a–c are used to build the LC resonator of VCOs and they are classified as right-hand (RH) TL, left-hand (LH) TL, and composite right-/left-handed (CRLH) TL [4]. Many microwave devices are being developed using LH structures, known as metamaterials. With a differential LH, RH, or CRLH resonator and a negative resistance, an oscillator is constructed as shown in Figure 1d. The right-hand TL is the most popular, and it was used to design a VCO in combination with an eight-shaped inductor, shown in Figure 2, for suppressing the magnetic coupling noise. One eight-shaped inductor can be “folded” within an O-shaped inductor to minimize the area of the oscillator [5]. The VCO circuit is used as a standing wave oscillator (SWO). A right-handed SWO [6] uses two eight-shaped inductors in a twist resonator. Since LH-TL with an eight-shaped inductor is electrically dual of the conventional RH-TL with eight-shaped inductor, it can be used to design an SWO but it has not been presented.

This paper firstly reviews our designed fully integrated SWOs using dual unit cells of LH LC networks using O-shaped inductors; the SWO suffers from coupling noise caused by the magnetic field. It then discusses SWOs with LH LC networks using eight-shaped inductors. The newly designed network utilizes an eight-shaped inductor and a non-twisted inductor to form an orthogonal transformer for the first time, thereby saving the die area and suppressing the coupling noise.

The dispersion characteristic of the uniform LH TL shown in Figure 3a becomes nonlinear and is given by the following:

$$\beta =-{\displaystyle \frac{1}{\omega \sqrt{LC}}}$$

(1)

A TL with a length of odd multiple λ/4 and grounded at one end will produce a maximum swing at the other open end, which is excited at a given frequency. λ is the wavelength. The oscillator operates at the oscillator frequency satisfying

$$N\beta d=n{\displaystyle \frac{\pi }{4}} n=-1,-3,-5,$$

(2)

where βd is the phase shift of one unit cell consisting of a pair of L and C. N is the number of unit cells. The oscillation frequency decreases as the wavelength decreases. According to (2), increasing the number of LH units to gain an accurate approximation to the TL, we use a unit cell with a smaller phase delay to get the same total phase delay, i.e., a small inductor area for each unit cell. Figure 3b shows that the oscillator frequency decreases as the mode increases. Figure 3c shows the voltage swing patterns for an LH SWO operating at mode 1 and mode 2, respectively. Figure 4a shows the schematic of the switched dual-band left-handed resonator VCO, with M₁ and M₂ used to switch the high-mode low-frequency band, and varactors used to fine-tune the oscillation frequency. Figure 4b shows the schematic of the CRHL resonator VCO adapted from the millimeter-wave dual-band LH resonator VCO [7] using M₁ and M₂ to switch frequency band.

2. Left-Hand Resonator VCO Using Two O-Shaped Inductors

2.1. 1st Circuit Design

Figure 5a is the schematic of the class-B CMOS VCO, which consists of a cross-coupled pair (M₁, M₂), a pair of accumulation-mode varactors (C_var1, C_var2), and an LH LC resonator composed of MIM capacitors (C₁, C₂) and symmetric inductors (L₁, L₂). The active transistors (M₁, M₂) are used to generate differential negative resistance and compensate for the energy loss of the LH LC-network. The n-core is used because of high gain; thus, a low-power oscillator can be designed—the bias V_tune is used to control the capacitance of the accumulation-mode varactors C_var and the oscillation frequency. The bias V_DD is the supply voltage. The varactor is biased in a configuration so that the capacitance of C_var decreases and the oscillation frequency increases with V_tune. The circuit in Figure 5a uses a fourth-order resonator, which has dual resonant frequencies as indicated by the simulated impedance shown in Figure 5b. The varactors can switch between the low-frequency high-mode with large capacitance and the high-frequency low-mode with low capacitance, as shown in Figure 5b. If the transconductance gain of cross-coupled transistors is independent of frequency, the highest impedance peak corresponds to the wanted oscillation frequency because of a larger feedback signal. The impedance ZL seen from the negative Gm stage exhibits two distinctive peaks with |ZL(${\omega }_L$ = 4 GHz)| > |ZH(${\omega }_H$ = 6 GHz)| at V_tune = 0 V. The VCO will oscillate in the low-frequency band. At V_tune = 2 V, the VCO will oscillate in the high-frequency band because the highest peak impedance is in the high-frequency band. The Q-factor is defined by ${\omega }_o$/B(resonant frequency/bandwidth). The simulated Q-factor is 28.54(12.99) at ${\omega }_o$ = 6.85(4.08) at V_tune = 2 V(0 V). The SWOs were designed and fabricated in the TSMC 0.18 μm 1P6M CMOS technology. Figure 5c shows the micrograph of the SWO with a chip area of 0.435 × 0.809 mm², including all test pads and dummy metal. Two 3-turn symmetric inductors L are shown. Figure 5d shows the tuning ranges of the oscillation frequency while varying V_tune. While the control voltage V_tune was tuned from 0/1.2 to 1.1/2.0 V, the SWO operates between 3.849/6.063 and 4.291/6.374 GHz. The measurement result is consistent with the simulation result. Figure 6a shows the low-band output spectrum at 3.858 GHz, with 0.752 dBm output power. Phase noise is a primary concern in oscillator design, and Figure 6a shows that the circuit is associated with low phase noise. The measured phase noise shown in Figure 6b is −120.01 dBc/Hz at 1 MHz offset frequency from the center frequency. Figure 6c shows the high-band output spectrum at 6.22 GHz, with 4.14 dBm output power. The measured phase noise shown in Figure 6d is −120.174 dBc/Hz at 1 MHz offset frequency from the center frequency of 6.22 GHz. The high-band (low-band) VCO FOM is −191.3 (−187.0) dBc/Hz.

2.2. 2nd Circuit Design

Figure 7a is the schematic of the LH resonator CMOS VCO [8] and the 3-turn O-shaped inductor layout. The DC gate bias is below the threshold voltage of switching FETs. Figure 7b shows the tuning ranges of the oscillation frequency while varying V_tune. At V_DD = 0.8, while the control voltage V_tune was tuned from 0/1.4 to 1.3/2.0 V, the VCO operates between 4.038/6.042 and 4.225/6.163 GHz. The measurement result is consistent with the simulation result. As V_DD decreases, the oscillation frequency increases for high-mode and low-mode because of the smaller capacitance. The voltage V_tune to switch band becomes smaller due to the smaller bias-dependent varactor C_var. The circuit in Figure 7a uses a fourth-order LC resonator, which has dual resonant frequencies as indicated by the simulated impedance shown in Figure 8a. The impedance ZL seen from the negative G_m stage exhibits two distinctive peaks with |ZL(${\omega }_L$ = 3.79 GHz)| > |ZH(${\omega }_H$ = 5.398 GHz)| at V_tune = 0 V. The impedance ZL seen from the negative G_m stage exhibits two distinctive peaks with |ZL(${\omega }_L$ = 4.33 GHz)| < |ZH(${\omega }_H$ = 5.91 GHz)| at V_tune = 2 V. Figure 8b shows simulated V_O1 (low-band), V_O2 (low-band), V_O1 (high-band), and V_O2 (high-band). Figure 8c shows the simulated high-band voltage transients at V_DD = 0.65 V. The steady gate voltage decreases as V_DD decreases. The Vth = 0.507 V is shown as a reference. The steady DC gate bias is smaller than the threshold voltage, and the SWO operates in the class-C mode. Under the same V_bias, the VCO can switch from class-C mode to class-AB mode if V_DD decreases, allowing for a smaller voltage swing to discharge C₇. Discharging the capacitor C₇ will decrease the dynamic gate bias V_G given by

$${\mathrm{V}}_{\mathrm{G}}={\mathrm{V}}_{\mathrm{G}0}-{\displaystyle \int {\mathrm{G}}_{\mathrm{m}}{\mathrm{V}}_{\mathrm{D}}\left(\mathrm{t}\right)}{/\mathrm{C}}_{7}dt,$$

(3)

where G_m is the transconductance of M₅. V_G0 is the gate bias when the power is on. Figure 9a shows the output spectrum at 4.13 GHz, with −4.288 dBm output power. The measured phase noise shown in Figure 9b is −117.06 dBc/Hz at 1 MHz offset frequency from the center frequency. Figure 9c shows the output spectrum at 6.208 GHz, with an output power of −0.143 dBm. The measured phase noise shown in Figure 9d is −116.04 dBc/Hz. Figure 10 shows the measured figure of merit (FOM) versus V_DD; the optimal V_DD is 0.8 V for the best FOM. When V_DD is smaller than 0.5 V, a single low-frequency band is measured. As V_DD decreases, the power consumption reduces, the phase noise increases because of a smaller voltage swing, and MOSFETs tend to operate in the linear region; the FOM deteriorates. As V_DD is larger than the optimal value, power consumption increases and phase noise worsens; the FOM degrades. As V_DD increases, oscillation amplitude increases, and ac-bias across the varactor grows and gives rise to flicker noise up-conversion [9].

3. Left-Hand Resonator VCO Using an Orthogonal Transformer

3.1. Circuit Design

Figure 11a shows the schematic of a reference CMOS SWO with two eight-shaped inductors. The reference SWO uses the eight-shaped inductors, showing higher coupling noise suppression than the designed SWO in Figure 12a because two inductors offer noise coupling suppression, but they occupy a larger die area. The one-lobe inductors include many structures [10]: (a) square, (b) hexagonal, (c) octagonal, and (d) circular. The eight-shaped inductors with two lobes can have many structures derived from one-lobe inductors. Figure 11b shows the VCO using the hybrid square-type eight-shaped inductor and non-twisted inductor. Consequently, the inductor shapes in Figure 11a,b have second-order consequences on the oscillator’s performance. Figure 12a is the schematic of the implemented tight-area CMOS SWO, which consists of a cross-coupled pair (M₁, M₂), a pair of accumulation–mode varactors (C_v1, C_v2), and a left-handed (LH) LC resonator composed of MIM capacitors (C₁~C₄) and symmetric inductors (L₁, L₂). The active transistors (M₁, M₂) are used to generate differential negative resistance and compensate for the energy loss of the LH LC network. L₂ is an eight-shaped inductor, and L₁ is an O-shaped inductor. L₂ and L₁ can form an orthogonal transformer to save the die area. L₂ uses two lobes in a twist and can suppress the coupling noise. The coupling noise suppression is no better than the reference SWOs. (M₅, M₆, M₇) and C₇ form a dynamic bias for the class-C VCO. The dynamic biasing circuit [11,12] reduces the VCO power consumption by switching NMOS from power-on class-AB to class-C operation in a steady state, and this is obtained by controlling the gate voltage of the switching MOSFET. The gate voltage V_G is larger than the threshold voltage at power-on. After the power-on oscillation, M₅ and M₆ discharge the gate voltage V_G. (M₁, M₂) operate in class-C mode. Figure 12a shows the simplified small–signal equivalent half–circuit 4th-order LC resonator. The resonant frequency is given by

$${\omega }^2={\displaystyle \frac{[(L_1{C}_1+C_2{L}_1)+L_2{C}_2+C_{\mathrm{var}}{L}_2]}{2[L_2{C}_2{L}_1{C}_1+C_{\mathrm{var}}{L}_2(L_1{C}_1+C_2{L}_1)]}}\pm {\displaystyle \frac{\sqrt{{[L_1{C}_1+C_2{L}_1+L_2{C}_2+C_{\mathrm{var}}{L}_2]}^2-4[L_2{C}_2{L}_1{C}_1+C_{\mathrm{var}}{L}_2(L_1{C}_1+C_2{L}_1)]}}{2[L_2{C}_2{L}_1{C}_1+C_{\mathrm{var}}{L}_2(L_1{C}_1+C_2{L}_1)]}}$$

(4)

It shows two resonant frequencies. When L₁ is removed, one resonance frequency is

$$\omega ={\displaystyle \frac{1}{\sqrt{L_2[\frac{C_1{C}_2}{C_1+C_2}+C_{\mathrm{var}}]}}}.$$

(5)

From (4), when C_var is removed, two resonance frequencies are given by (6):

$${\omega }^2={\displaystyle \frac{[(L_1{C}_1+C_2{L}_1)+L_2{C}_2]}{2[L_2{C}_2{L}_1{C}_1]}}\pm {\displaystyle \frac{\sqrt{{[L_1{C}_1+C_2{L}_1+L_2{C}_2]}^2-4[L_2{C}_2{L}_1{C}_1]}}{2[L_2{C}_2{L}_1{C}_1]}},$$

(6)

The high-frequency low-mode with the + sign in (6) is excited by following the Barkhausen criterion. From (4), when C_var is included, the oscillation frequency decreases as C_var increases, the low-frequency high-mode with the − sign in (6) is excited by following the Barkhausen criterion.

Figure 12b shows the layout of the orthogonal transformer. O-shaped inductors have a higher Q-factor than the square-shaped inductors. Figure 12c shows the simulated inductance and Q-factor of the orthogonal transformer (L₁, L₂). L₁ is a 1-turn seven-sided inductor, and L₂ is a 1-turn eight-shaped inductor. L₂ is “folded” within L_1, indicated in the chip photo. At 10 GHz, the coupling coefficient k is 0.067. The inductance of (L₁, L₂) is (1.327, 1.051) nH. The Q-factor of (Q₁, Q₂) is (19.039, 19.393). The LH TL has a high-mode and low-mode operation [7]. In the fundamental low mode, the voltages V_A and V_B are in phase. In the high mode, the voltages V_A and V_B are out of phase. The designed VCO uses the latter, showing a low oscillation frequency. Figure 12d shows the simulated class-C dynamic gate voltage, which settles to a smaller voltage after the power-on. The threshold voltage of switching is 0.526 V. The threshold voltage is smaller as V_tune increases.

Figure 13 shows the simulated waveforms along the LH TL. The LH VCO operates in the high-mode low oscillation frequency. Figure 14 shows the simulated tank impedance from the input of the buffer’s gate; the impedance peaks occur at 8.9 and 13.75 GHz. It also shows the simulated DFT of the drain current. It indicates the VCO oscillates at the low resonant frequency mode. Figure 15 shows the simulated tuning range of a reference VCO. The reference VCO with C_v1 = 66.3 fF at 0 V has two frequency bands. The low/high-frequency band is 10/16.55 GHz at V_T = 0/2 V. The proposed VCO uses C_v1 = 186.1 fF at 0 V and has one frequency band.

3.2. Experiment

The VCO has been designed in the TSMC 0.18 μm 1P6M CMOS technology. The die micrograph occupying an area of 0.986 × 0.756 mm² is shown in Figure 16a. Figure 16b also shows the current density distribution of the orthogonal transformer. Figure 17 shows the output spectrum at 8.33 GHz, with −10.84 dBm output power. The power consumption is 2.07 mW. Figure 18 shows the measured phase noise with −114.63 dBc/Hz at 1 MHz offset frequency from the center frequency of 8.31 GHz. The corner frequency is 230 kHz. The FOM is −188.6 dBc/Hz and is calculated using (7):

$$\mathrm{FOM}=L\left\{\mathsf{\Delta }\omega \right\}+10\cdot \log \left(P_{DC}\right)-20\cdot \log \left({\displaystyle \frac{{\omega }_o}{\mathsf{\Delta }\omega }}\right)$$

(7)

where the symbols have their usual meanings. Figure 19a shows the measured tuning ranges while varying V_T and V_DD. At V_DD = 0.9 V, V_bias = 1.7 V, while the control voltage V_T was tuned from 0 to 2.0 V, the VCO operated between 8.3 GHz and 9.3 GHz. According to (3), at V_DD > 0.9 V, the VCO operates in class-C mode.

Table 1. Measurement summary and performance comparison.

Ref.	CMOS Process (um)	Topology Used	VDD (V)	fo (GHz)	Pdiss. (mW)	Tuning Range GHz, (%)	Area (mm2)	PNoise @1 MHz (dBc/Hz)	FOM, (dBc/Hz)
[3] June 2025	0.18	RTWO	1.7	8.53	5.8	8.53~10	1.2 × 1.2	−122.4	−193.4
[6] December 2023	0.18	RH-SWO	1.2	9.94	4.3	0	0.947 × 0.8	−115.07	−188.59
[7] May 2010	0.13	LH-CRHL	-	21/55	14	21/55	0.15 × 0.06 (core)	−100.8/−86.7	−175.8/−170.2
[13] July 2019	0.18	RTWO	1.3	2.84~3.44	7.52	19.10	1.2 × 1.2	−113.9	−173.8
			1.1	2.41~2.8	4.78	14.97		−121.4	−181.8
[14] October 2024	0.18	NP-Cross	1.7	6.979	3.875	6.88~6.1	0.83 × 0.78	−119.32	−189.86
[15] May 2014	0.065	Hybrid RTWO	1.2	51.9	36	8.5	-	−86.0	−164.7
[16] February 2011	0.12	Hybrid RTWO	1.2	45.0	19.2	6.5	0.5 × 0.5	−93.0	−173.2
[17] September 2019	0.022	RTWO	0.8	26.2	21	13.5	0.115 × 0.115	−109.2	−184.2
[18] December 2015	0.125Bi	RTWO	-	15.0	52	1.65	-	−112.2	−178.56
[19] October 2013	0.18	CRLH TL	1.8	23.6	70.2	-	0.8	−105	-
[20] October 2019	0.18	RTWO	1	3.26~3.98	5.33	19.89	1.07 × 1.07	−122.143	−185.11
[21] January 2006	0.18	Switch resonator	1.8	0.865	16	13	0.69 × 1.3	−125@600 K	−176
				1.812		24		−123@600 K	−181
[22] July 2014	0.065	Swit res		27.5	4.8	43.3	0.084	−90	−171.97
[23] December 2020	0.065	Cross-co	0.55	6.8	5	12	0.3 × 0.7	−117.5	−187.2
This 1 2013	0.18	LH-SWO	0.8	3.858 6.22	3.11	3.85~4.29 6.06~6.37	0.435 × 0.809	−120.01 −120.17	−187.0 −191.0
This 2 2016	0.18	LH-SWO	0.65	4.138 6.207	1.495	4.138 6.207	0.527 × 0.749	−117.06 −116.04	−187.64 −190.15
This work 3	0.18	LH-SWO	0.9	9.23(Vbias = 1.4 V)	2.07	10.83	0.986 × 0.756	−109.54	−185.8
This work 3	0.18	LH-SWO	0.9	8.3(Vbias = 1.7 V)	3.1	10.83	0.986 × 0.756	−114.6	−188.6

^{1, 2, 3} represent measured data from three chips in 2013, 2016, and 2025, respectively.

shows the performance comparison at 1 MHz offset frequency. Increasing varactor capacitance tends to operate the circuit in the low-frequency high-mode band. Figure 19b shows the simulated FOM versus V_DD and V_bias. For the best FOM, the optimal bias is V_DD = 0.9 V and V_bias = 1.4 V. For VCO design, it is also important to optimize the bias rather than only pursue the inductor Q-factor. The simulation result is different from the measured bias because the phase noise model below the threshold voltage is inaccurate.

3.3. Coupling Noise Simulation

This subsection simulates the noise coupling strength between the O-shaped inductor victim and the attackers. Figure 20a shows the inductor layout of the attacker non-twisted inductor and five O-shaped inductor victims for the coupling noise study. Figure 20b shows the attacker eight-twisted inductor and five O-shaped inductor victims. Figure 20c shows the attacker eight-twisted/non-twisted inductor and five O-shaped inductor victims. Figure 20 shows the interference coupling depending on the victim location and the shape of the eight-shaped inductor. Figure 21a shows the simulated S₂₁ between the attacker’s non-twisted inductor and the O-shaped inductor victim. Figure 21b shows the simulated S₂₁ between the attacker eight-twisted inductor and the O-shaped inductor victim. Location 3 shows the smallest coupling noise because of the offset coupling of the two lobes of the eight-shaped inductor. Location 1 shows the highest coupling noise because of the smallest offset coupling of the two lobes of the eight-shaped inductor. Using the structure shown in Figure 20c, Figure 21c shows the simulated S₂₁ between the aggressor eight-/non-twisted inductor and the O-shaped inductor victim at location 3, and Figure 21d shows the simulated S₂₁ between the attacker eight-/non-twisted inductor and the O-shaped inductor victim at location 1. The coupling noise is higher for the non-twisted attacker. This indicates that the overall orthogonal transformer can reduce the interference coupling noise due to the use of the eight-shaped inductor.

4. Conclusions

This paper studies the SWOs using a fourth-order left-handed resonator with two resonance frequencies. The left-handed SWOs have been designed and verified in a 0.18 μm 1P6M CMOS process. The SWOs can operate in two modes using switches or varactors. The varactor switching methods are employed in the presented class-B and class-C switched waveforms (SWOs) with O-shaped inductors. The third SWO operates at only low-frequency high-mode, outputting a signal from 8.3 GHz to 9.25 GHz. The SWO uses inductors with a high Q-factor and optimized supply and gate bias for good FOM operation. The measured phase noise with −114.63 dBc/Hz at a 1 MHz offset frequency from the center frequency of 8.31 GHz, and the measured FOM is −188.6 dBc/Hz. The third LH SWO, for the first time, uses an eight-shaped inductor to suppress the interference coupling noise and an orthogonal transformer to save the die area. By reducing the varactors’ size, simulation shows the SWO with an orthogonal transformer can operate in the high-mode low-frequency band and low-mode high-frequency band as its O-shaped inductor counterpart. The proposed SWOs apply to mm-wave oscillators. The second dual-band class-C SWO operates at the low band of 4.13 GHz with the phase noise of −117.06 dBc/Hz and the FOM of −187.6 dBc/Hz, and the high band of 6.208 GHz with the phase noise of −116.04 dBc/Hz and the FOM of −190.15 dBc/Hz. The first dual-band class-B SWO operates at the low band of 3.858 GHz with the phase noise of −120.061 dBc/Hz and the FOM of −187.0 dBc/Hz, and the high band of 6.222 GHz with the phase noise of −120.17 dBc/Hz and the FOM of −191.1 dBc/Hz.