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Metal-Semiconductor and Insulator-Semiconductor Interfaces
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Metal-Semiconductor and Insulator-Semiconductor Interfaces

A special issue of Coatings (ISSN 2079-6412).

Deadline for manuscript submissions: closed (31 August 2020) | Viewed by 29429

Special Issue Editor

Prof. Dr. Chiu-Ping Cheng

E-Mail Website
Guest Editor
Department of Electrophysics, National Chiayi University, Chiayi, Taiwan
Interests: surface and interface physics; thin film physics

Special Issue Information

Dear Colleagues,

Semiconductors interfaced with metals or insulators are common structures in a variety of electronic and optoelectric devices. In many cases, the superb electronic and optical functions are driven by high-quality interfaces. Atomic and electronic properties of the interface should then be carefully characterized in order to fathom means to improve the device performance. The tasks become increasingly important for the ever-increasing demands of high speed and low power consumption in advanced scaling-down devices. In order to meet the scaling requirements of these devices in the next generation, identification of viable materials to replace the existed ones and furthering innovated interfaces has an aim to push the performance limits. High-quality heterointerface is crucial for device developments. A precise knowledge of interfacial properties at the heterojunction of the contacted materials is the first step towards this goal.

This Special Issue aims to focus on new results and is aimed at all those interested in a broad understanding of metal-semiconductor and insulator-semiconductor interfaces in practical applications. Studies in the film growth and interface characterization related to device performances are encouraged. New combinations of  exotic materials are also welcome. The topic is interdisciplinary; therefore, we invite you to submit original researches, review articles, and brief communications related to experimental and theoretical investigations.

Prof. Dr. Chiu-Ping Cheng
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Coatings is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • Metal-semiconductor interface
  • Insulator-semiconductor interface
  • heterojunction

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Published Papers (5 papers)

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Research

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8 pages, 2455 KiB  
Article
Leakage Current Conduction Mechanism of Au-Pt-Ti/ HfO2-Al2O3/n-InAlAs Metal-Oxide-Semiconductor Capacitor under Reverse-Biased Condition
by He Guan and Shaoxi Wang
Coatings 2019, 9(11), 720; https://doi.org/10.3390/coatings9110720 - 1 Nov 2019
Cited by 1 | Viewed by 3239
Abstract
Au-Pt-Ti/high-k/n-InAlAs metal-oxide-semiconductor (MOS) capacitors with HfO2-Al2O3 laminated dielectric were fabricated. We found that a Schottky emission leakage mechanism dominates the low bias conditions and Fowler–Nordheim tunneling became the main leakage mechanism at high fields with reverse biased condition. [...] Read more.
Au-Pt-Ti/high-k/n-InAlAs metal-oxide-semiconductor (MOS) capacitors with HfO2-Al2O3 laminated dielectric were fabricated. We found that a Schottky emission leakage mechanism dominates the low bias conditions and Fowler–Nordheim tunneling became the main leakage mechanism at high fields with reverse biased condition. The sample with HfO2 (4 m)/Al2O3 (8 nm) laminated dielectric shows a high barrier height ϕB of 1.66 eV at 30 °C which was extracted from the Schottky emission mechanism, and this can be explained by fewer In–O and As–O states on the interface, as detected by the X-ray photoelectron spectroscopy test. These effects result in HfO2 (4 m)/Al2O3 (8 nm)/n-InAlAs MOS-capacitors presenting a low leakage current density of below 1.8 × 10−7 A/cm2 from −3 to 0 V at 30 °C. It is demonstrated that the HfO2/Al2O3 laminated dielectric with a thicker Al2O3 film of 8 nm is an optimized design to be the high-k dielectric used in Au-Pt-Ti/HfO2-Al2O3/InAlAs MOS capacitor applications. Full article
(This article belongs to the Special Issue Metal-Semiconductor and Insulator-Semiconductor Interfaces)
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10 pages, 9106 KiB  
Article
Observation of the Magnetization Reorientation in Self-Assembled Metallic Fe-Silicide Nanowires at Room Temperature by Spin-Polarized Scanning Tunneling Spectromicroscopy
by Ie-Hong Hong and Sheng-Wen Liu
Coatings 2019, 9(5), 314; https://doi.org/10.3390/coatings9050314 - 10 May 2019
Cited by 1 | Viewed by 3143
Abstract
The quasi-periodic magnetic domains in metallic Fe-silicide nanowires self-assembled on the Si(110)-16 × 2 surface have been observed at room temperature by direct imaging of both the topographic and magnetic structures using spin-polarized scanning tunneling microscopy/spectroscopy. The spin-polarized differential conductance (dI/d [...] Read more.
The quasi-periodic magnetic domains in metallic Fe-silicide nanowires self-assembled on the Si(110)-16 × 2 surface have been observed at room temperature by direct imaging of both the topographic and magnetic structures using spin-polarized scanning tunneling microscopy/spectroscopy. The spin-polarized differential conductance (dI/dV) map of the rectangular-sectional Fe-silicide nanowire with a width and height larger than 36 and 4 nm, respectively, clearly shows an array of almost parallel streak domains that alternate an enhanced (reduced) density of states over in-plane (out-of-plane) magnetized domains with a magnetic period of 5.0 ± 1.0 nm. This heterostructure of magnetic Fe-silicide nanowires epitaxially integrated with the Si(110)-16 × 2 surface will have a significant impact on the development of Si-based spintronic nanodevices. Full article
(This article belongs to the Special Issue Metal-Semiconductor and Insulator-Semiconductor Interfaces)
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12 pages, 8574 KiB  
Article
Development of a Physical Model of Thermovoltaic Effects in the Thin Films of Zinc Oxide Doped with Transition Metals
by Igor Pronin, Nadejda Yakushova, Igor Averin, Andrey Karmanov, Vyacheslav Moshnikov and Dimitre Dimitrov
Coatings 2018, 8(12), 433; https://doi.org/10.3390/coatings8120433 - 27 Nov 2018
Cited by 10 | Viewed by 3156
Abstract
A model of the thermovoltaic effect emergence in ZnO/ZnO<Me> (Me = Cu, Fe), sandwich structures has been developed in the article. The samples were made by the sol-gel method. When they were uniformly heated in a laboratory furnace in the temperature range of [...] Read more.
A model of the thermovoltaic effect emergence in ZnO/ZnO<Me> (Me = Cu, Fe), sandwich structures has been developed in the article. The samples were made by the sol-gel method. When they were uniformly heated in a laboratory furnace in the temperature range of 200–300 °C, there an electromotive force (EMF) of −7~10 mV, not associated with the Seebeck effect, emerged. The developed physical mechanisms of the effect emergence consist of the following well-known fact: iron and copper coexist in zinc oxide in two states, namely, Fe2+ and Fe3+ (donor), and Cu2+ and Cu+ (acceptor). During the heating of the ZnO/ZnO–Me system, the concentration of charge carriers in the layers will increase, while in the upper layer its value will be larger because of the presence of electrically active impurities. At room temperatures, Coulomb forces retain an electron that is located on the Fe2+ ion, as well as a hole on Cu2+ ion, and the main states undergo ionization. However, as the temperature increases, the carrier concentration can reach a critical level, when they can screen the ion charge (the Debye screening radius decreases to the Bohr radius of the impurity). In this case, an abrupt collective endothermic process of ionization of multivalent impurities takes place, accompanied by the appearance of a concentration gradient of free carriers in the sample, and accordingly, the emergence of an electromotive force. Quantitative calculations of the critical temperature, at which the onset of EMF generation is observed, performed within the framework of the developed models. Full article
(This article belongs to the Special Issue Metal-Semiconductor and Insulator-Semiconductor Interfaces)
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7 pages, 1627 KiB  
Article
Study on the Physical and Leakage Current Characteristics of an Optimized High-k/InAlAs MOS Capacitor with a HfO2–Al2O3 Laminated Dielectric
by He Guan and Chengyu Jiang
Coatings 2018, 8(12), 417; https://doi.org/10.3390/coatings8120417 - 22 Nov 2018
Cited by 8 | Viewed by 4492
Abstract
High-k/n-InAlAs MOS capacitors are popular for the isolated gate of InAs/AlSb and InAlAs/InGaAs high-electron mobility transistors. In this study, a new kind of high-k/n-InAlAs MOS-capacitor with a HfO2–Al2O3 laminated dielectric was successfully fabricated using an optimized process. Compared [...] Read more.
High-k/n-InAlAs MOS capacitors are popular for the isolated gate of InAs/AlSb and InAlAs/InGaAs high-electron mobility transistors. In this study, a new kind of high-k/n-InAlAs MOS-capacitor with a HfO2–Al2O3 laminated dielectric was successfully fabricated using an optimized process. Compared with the traditional HfO2/n-InAlAs MOS capacitor, the new device has a larger equivalent oxide thickness. Two devices, with a HfO2 (8 nm)–Al2O3 (4 nm) laminated dielectric and a HfO2 (4 nm)–Al2O3 (8 nm) laminated dielectric, respectively, were studied in comparison to analyze the effect of the thickness ratios of HfO2 and Al2O3 on the performance of the devices. It was found that the device with a HfO2 (4 nm)–Al2O3 (8 nm) laminated dielectric showed a lower effective density of oxide charges, and an evidently higher conduction band offset, making its leakage current achieve a significantly low value below 10−7 A/cm2 under a bias voltage from −3 to 2 V. It was demonstrated that the HfO2–Al2O3 laminated dielectric with a HfO2 thickness of 4 nm and an Al2O3 thickness of 8 nm improves the performance of the high-k dielectric on InAlAs, which is advantageous for further applications. Full article
(This article belongs to the Special Issue Metal-Semiconductor and Insulator-Semiconductor Interfaces)
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Review

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29 pages, 7360 KiB  
Review
Advances in La-Based High-k Dielectrics for MOS Applications
by L. N. Liu, W. M. Tang and P. T. Lai
Coatings 2019, 9(4), 217; https://doi.org/10.3390/coatings9040217 - 27 Mar 2019
Cited by 29 | Viewed by 14421
Abstract
This paper reviews the studies on La-based high-k dielectrics for metal-oxide-semiconductor (MOS) applications in recent years. According to the analyses of the physical and chemical characteristics of La2O3, its hygroscopicity and defects (oxygen vacancies, oxygen interstitials, interface states, and [...] Read more.
This paper reviews the studies on La-based high-k dielectrics for metal-oxide-semiconductor (MOS) applications in recent years. According to the analyses of the physical and chemical characteristics of La2O3, its hygroscopicity and defects (oxygen vacancies, oxygen interstitials, interface states, and grain boundary states) are the main problems for high-performance devices. Reports show that post-deposition treatments (high temperature, laser), nitrogen incorporation and doping by other high-k material are capable of solving these problems. On the other hand, doping La into other high-k oxides can effectively passivate their oxygen vacancies and improve the threshold voltages of relevant MOS devices, thus improving the device performance. Investigations on MOS devices including non-volatile memory, MOS field-effect transistor, thin-film transistor, and novel devices (FinFET and nanowire-based transistor) suggest that La-based high-k dielectrics have high potential to fulfill the high-performance requirements in future MOS applications. Full article
(This article belongs to the Special Issue Metal-Semiconductor and Insulator-Semiconductor Interfaces)
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