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Soft-Error Vulnerability Estimation Approach Based on the SET Susceptibility of Each Gate

1
LTCI, Télécom Paris, Institut Polytechnique de Paris, 19 Place Marguerite Perey, F-91120 Palaiseau, France
2
Instituto Tecnológico de Aeronáutica, Pça. Mal. Eduardo Gomes 50, São José dos Campos 12228-900, Brazil
3
Instituto Nacional de Pesquisas Espaciais, Av. dos Astronautas 1758, São José dos Campos 12227-010, Brazil
*
Author to whom correspondence should be addressed.
Electronics 2019, 8(7), 749; https://doi.org/10.3390/electronics8070749
Received: 1 May 2019 / Revised: 29 May 2019 / Accepted: 5 June 2019 / Published: 2 July 2019
(This article belongs to the Section Microelectronics and Optoelectronics)
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Abstract

Soft-Error Vulnerability (SEV) is a parameter used to evaluate the robustness of a circuit to the induced Soft Errors (SEs). There are many techniques for SEV estimation, including analytical, electrical and logic simulations, and emulation-based approaches. Each of them has advantages and disadvantages regarding estimation time, resources consumption, accuracy, and restrictions over the analysed circuit. Concerning the ionising radiation effects, some analytical and electrical simulation approaches take into account how the circuit topology and the applied input patterns affect their susceptibilities to Single Event Transient (SET) at the gate level. On the other hand, logic simulation and emulation techniques usually ignore these SET susceptibilities. In this context, we propose a logic simulation-based probability-aware approach for SEV estimation that takes into account the specific SET susceptibility of each circuit gate. For a given operational scenario, we extract the input patterns applied to each gate and calculate its specific SET susceptibility. For the 38 analysed benchmark circuits, we obtained a reduction from 15.27% to 0.68% in the average SEV estimation error, when comparing the estimated value to a reference obtained at the transistor level. The results point out an improvement of the SEV estimation process by considering the specific SET susceptibilities. View Full-Text
Keywords: Soft-Error; Single-Event Effect; Single-Event Transient; Soft-Error Rate; Soft-Error Vulnerability Soft-Error; Single-Event Effect; Single-Event Transient; Soft-Error Rate; Soft-Error Vulnerability
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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).

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MDPI and ACS Style

Batagin Armelin, F.; Alves de Barros Naviner, L.; d’Amore, R. Soft-Error Vulnerability Estimation Approach Based on the SET Susceptibility of Each Gate. Electronics 2019, 8, 749.

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