Zhan, Y.; Li, T.; Zou, X.; Hu, Q.; Li, L.; Zhang, L.
41.6 Gb/s High-Depth Pre-Interleaver for DFE Error Propagation in 65 nm CMOS Technology. Electronics 2023, 12, 3912.
https://doi.org/10.3390/electronics12183912
AMA Style
Zhan Y, Li T, Zou X, Hu Q, Li L, Zhang L.
41.6 Gb/s High-Depth Pre-Interleaver for DFE Error Propagation in 65 nm CMOS Technology. Electronics. 2023; 12(18):3912.
https://doi.org/10.3390/electronics12183912
Chicago/Turabian Style
Zhan, Yongzheng, Tuo Li, Xiaofeng Zou, Qingsheng Hu, Lianming Li, and Lu Zhang.
2023. "41.6 Gb/s High-Depth Pre-Interleaver for DFE Error Propagation in 65 nm CMOS Technology" Electronics 12, no. 18: 3912.
https://doi.org/10.3390/electronics12183912
APA Style
Zhan, Y., Li, T., Zou, X., Hu, Q., Li, L., & Zhang, L.
(2023). 41.6 Gb/s High-Depth Pre-Interleaver for DFE Error Propagation in 65 nm CMOS Technology. Electronics, 12(18), 3912.
https://doi.org/10.3390/electronics12183912