Search Results (140)

This study presents the design of a high-efficiency pulse width modulation (PWM) power amplifier for marine biological sound reproduction. Due to the capacitive nature of underwater transducers and step-up transformers, output LC filter design is constrained, making it difficult to achieve a flat frequency response and low total harmonic distortion (THD). To address this, the electrical characteristics of these components were measured and modeled to construct equivalent circuits for the PSPICE simulator. Based on these models, an optimized LC filter was designed, and its performance was validated through simulation and experiments. The cause of THD occurring in specific frequency bands was analyzed, and two types of notch filters were applied to improve THD and switching signal attenuation. The proposed methodology offers a practical approach to improving PWM amplifier performance in underwater acoustic systems, supporting the development of compact, efficient, and reliable SONAR transmitters. Full article

In this study, we present the design and analysis of a stacked inverter-based millimeter-wave (mmWave) power amplifier (PA) in 90 nm CMOS-targeting wideband Q-band operation. The PA employs two PMOS and two NMOS devices in a fully stacked inverter topology to distribute device stress, remove the need for an RF choke, and increase effective transconductance while preserving compact layout. A resistor ladder biases the stack near $V_{\mathrm{DD}}/4$ per device, and capacitive division steers intermediate-node swings to enable class-E-like voltage shaping at the output. Closed-form models are developed for gain, output power, drain efficiency/PAE, and linearity, alongside a small-signal stacked-ladder formulation that quantifies stress sharing and the impedance presented to the matching networks; L/T network synthesis relations are provided to co-optimize bandwidth and insertion loss. Post-layout simulation in 90 nm CMOS shows $|S_{21}|$ = 10 dB at 39.84 GHz with 3 dB bandwidth from 36.8 to 42.4 GHz, peak PAE of 18.38% near 41 GHz, and saturated output power $P_{\mathrm{sat}}=8.67$ dBm at $V_{\mathrm{DD}}=4$ V, with $S_{11}<-15$ dB and reverse isolation $\approx -16$ dB. The layout occupies $1.6\times 1.6$ mm² and draws 31.08 mW. Robustness is validated via a 200-run Monte Carlo showing tight clustering of $P_{\mathrm{sat}}$ and PAE, sensitivity sweeps identifying sizing/tolerance trade-offs ($\pm 10\%$ devices/passives), and EM co-simulation of on-chip passives indicating only minor loss/shift relative to schematic while preserving the target bandwidth and efficiency. The results demonstrate a balanced gain–efficiency–power trade-off with layout-aware resilience, positioning stacked-inverter CMOS PAs as a power- and area-efficient solution for mmWave front-ends. Full article

A Q-enhanced notch filter for interference-rejection LNAs is proposed in this brief. The active capacitance is introduced into the notch filter to improve the quality factor by the negative resistance effect. The designed notch filter achieves excellent performance with a narrow attenuation bandwidth from 5.75 GHz to 5.95 GHz, which can be applied to suppress interference from the IEEE 802.11a. To validate the feasibility of the proposed trap filter in both GaAs process technology and principle, a 3–15 GHz ultra-wideband low-noise amplifier was designed and fabricated using a 0.15-micron gallium arsenide pseudomorphs field-effect transistor process. The frequency-dependent feedback loops are employed between gate and drain stages for wideband input matching and gain flatness. The notch filter is inserted between two stages of the LNA. The measurement results show that the interference-rejection LNA achieves a maximum gain of 24.5 dB and a minimum noise figure of 1.8 dB in the operating band. The notch filter has a maximum interference-rejection ratio of 35.2 dB at 5.8 GHz with almost no effect on the desired gain of the LNA. The LNA has a power consumption of 168 mW, including the notch filter with a size of 1.93 × 0.72 mm². Full article

In this article, two wideband high-efficiency Class-J power amplifiers operating in X and Ku bands, respectively, are designed based on continuous mode. The optimal impedance regions of the transistors are determined using harmonic load-pull techniques. An on-chip output matching network with second harmonic control functionality is designed to achieve Class-J operation. To verify the feasibility of designed circuits, both power amplifiers are designed and fabricated using a 0.25 mm GaAs pseudomorphic high electron mobility transistor (pHEMT) process. The power amplifiers are both biased at 6 V/−1 V. The measured results show the X-band and Ku-band power amplifiers achieve peak saturated output powers of 31.2 dBm and 30.8 dBm, respectively. The power-added efficiencies (PAEs) of the two amplifiers within their operating bands reach up to 48% and 45.3%, respectively. Compact size and high efficiency make them suitable for integration into phased array transmit/receiver (T/R) modules. Full article

Time-division duplex (TDD) transceivers have found broad utility in millimeter-wave 5G communication, radar and imaging applications. The co-design of the switch and transmit/receive (T/R) amplifiers becomes essential in optimizing the passive loss and chip size. This work presents a Ka-band T/R amplifier with an embedded switch topology. The amplification cores from the TX and RX channels reuse the matching network to the T/R common port, and the full combination of switching and matching structures is enabled within a compact two-winding transformer. Implemented in 40 nm CMOS technology, the proof-of-concept Ka-band T/R amplifier occupies a core chip area of 0.163 mm². Experimental results show that it achieves a peak gain of 17.2 dB with a −3 dB bandwidth of 22.6–30.2 GHz in TX mode and a peak of 17.1 dB with a −3 dB bandwidth of 23.4–31.0 GHz in RX mode. The compact size and wideband gain response make the proposed T/R amplifier suitable for Ka-band TDD applications. Full article

This paper presents a simplified matching network using coupled transmission lines (CTLs) for broadband power amplifiers. The proposed structure consists of a CTL with an electrical length shorter than $\lambda$/4 and a single shunt component, exhibiting excellent frequency characteristics across a wide bandwidth at both the input and load networks of the transistor. The reactance variation of the non-Foster elements in the equivalent circuit of the CTL with respect to frequency was analyzed, and the external reactive components were accordingly optimized to extend the bandwidth of the matching network. The proposed network was applied to the input and load networks of a GaN HEMT-based power amplifier. It was designed to maintain required performances over a wide frequency range of 1.9–4.9 GHz, covering both LTE and sub-6 GHz 5G bands, thereby achieving a fractional bandwidth (FBW) of 88.2%. The CTLs were fabricated on a two-layer printed-circuit board (PCB), and the additional shunt components were designed using surface-mount devices (SMDs). The overall power-amplifier module occupied a small area of 40 × 35 mm². Using the continuous-wave (CW) signal, the proposed power amplifier exhibited a power gain of 10–14.8 dB and a drain efficiency (DE) of 47.5–60% at a saturated output power of 7.1–9.3 W across the entire operating frequency band. Using a 5G New Radio (NR) signal with a 100 MHz bandwidth and a peak-to-average power ratio (PAPR) of 7.8 dB, the amplifier achieved an average output power of 30 dBm, a DE of 20–27.5%, and an adjacent-channel leakage power ratio (ACLR) better than −30 dBc. Full article

This work presents a wideband variable gain low-noise amplifier (VGA-LNA) specifically engineered for medical systems operating in the C frequency band, which require the substantial amplification of low-intensity signals. The proposed design integrates a low-noise attenuator with a low-noise amplifier (LNA), fabricated using 90 nm CMOS technology and leveraging a combined common-source and common-gate topology. The integrated LNA achieved a notable power gain of 29 dB across a broad bandwidth of 2 GHz (6.4–8.4 GHz), maintaining an average noise figure (NF) below 3.14 dB. The design ensures superior impedance matching, demonstrated by reflection coefficients of S11 < −18.14 dB and S22 < −20.23 dB. Additionally, the amplifier exhibits a third-order input intercept point (IIP3) of 21.15 dBm while consuming only 83 mW from a 1.2 V supply voltage. A low-noise attenuator was incorporated at the input side to enable effective gain control through a digitally controlled variable gain, with step sizes ranging from 0.4 to 3.3 dB. This configuration enables a dynamic range of the transmission coefficient (|S₂₁|) from 16 dB to 23 dB, adjustable by 0.4 dB to 3.3 dB with a trade-off in an NF maintained at 6 dB. The VGA-LNA demonstrates exceptional potential for integration into wireless body area networks (WBANs), balancing flexible gain control with stringent performance metrics. Full article

The approximate pole/zero expressions are computed starting from the state or the “state-like” matrix. The attempts of open-circuit and short-circuit replacement of circuit elements are combined with those to cut row and column groups of the state matrix for poles or the “state-like” matrix for zeros, and with LR iterations. The expressions of all poles and zeros of a wide-band amplifier and an RLC band-stop filter are computed, obtaining significantly better results than those given by the best approach available, implemented in the Analog Insydes package. Full article

This paper proposes a new behavioral model for radio-frequency power amplifiers (RF PAs) by extending the two-dimensional Polar Volterra series to fractional derivative order, using a numerical Mittag–Leffler-based formulation of fractional orthonormal generating functions. The motivation stems from the increasing need for accurate and computationally efficient models to represent nonlinearities and memory effects in wideband RF PAs, especially in energy-efficient 5G systems. The proposed method significantly reduces model complexity by lowering the number of estimated parameters while maintaining or improving modeling fidelity. To evaluate its performance, three different RF PA devices were used as test cases. The results demonstrated that the proposed approach achieved an over 81.5% reduction in the number of model parameters and improved modeling accuracy. Besides that, in a scenario with the same number of parameters, normalized mean square error (NMSE) gains of up to 8.72 dB were obtained. These findings support the method’s potential for practical use in RF PA behavioral modeling and digital predistortion applications. Full article

This paper presents the design and implementation of a wideband diode-based down-converter operating from 60 to 90 GHz with a variable flat conversion gain. The proposed down-converter is implemented utilizing the Miniature Hybrid-Microwave Integrated Circuit (MHMIC) technology. It is composed of a wideband double-balanced mixer, a Local Oscillator (LO) chain, and a differential TransImpedance Amplifier (TIA) with a variable gain. The designed mixer uses a novel topology exhibiting minimum reflection and high isolation between the RF and LO ports across a wide operating frequency of 30 GHz. In this topology, two balanced detectors generate the differential IF signal with minimum reflection. The characteristic impedance ($Z_0$) of the mixer is set to be $70.7$$\Omega$, to minimize trace widths to reduce the mutual coupling and increasing the bandwidth. The OPA 657 is the core of the designed differential TIA with a variable gain. In addition, the LO chain of the down-converter utilized a combination of an active (×2) and a passive (×3) multiplier to generate enough RF power in the desired frequency range. Also, a WR-12 waveguide to Substrate Integrated Waveguide (SIW) transition is designed for the RF and LO ports that operates through the E-band. The proposed down-converter demonstrates excellent performance, with a high isolation between RF and LO ports exceeding 22 dB and a maximum conversion gain of $-5$ dB, and a response with a variation of ±5 dB across the band. The proposed mixer exhibits a return loss of better than 10 dB at both RF and LO ports, and it consumes a power of 560 mW. Full article

This paper presents a wideband D-band frequency sextupler chain implemented in a 100 nm GaAs pHEMT process. The proposed circuit comprises an input-stage frequency tripler, an inter-stage harmonic-rejection power amplifier, and an output-stage frequency doubler. The tripler adopts a balanced topology, which effectively suppresses the fundamental frequency component. The inter-stage power amplifier not only delivers sufficient drive power to the doubler but also enhances suppression of undesired harmonics. The output doubler employs a single-balanced configuration to suppress odd-order harmonics while extracting the second harmonic. The measured peak output power of the sextupler chain is 2.33 dBm, corresponding to an input power of 2 dBm, resulting in a conversion gain of 0.33 dB. The 3 dB output bandwidth spans from 126.3 to 152.7 GHz, corresponding to a relative bandwidth of 18.9%. Owing to the balanced multiplier topology and harmonic-rejection PA, the 5th and 7th harmonics are suppressed by more than 20 dBc. The combination of high output power, wide operating bandwidth, and excellent harmonic suppression makes the design well suited for wideband D-band signal generation in diverse applications. Full article

This paper presents the design and implementation of an ultra-wideband (UWB) and flat gain low noise amplifier (LNA) using 0.15 µm GaAs pHEMT technology, specifically tailored for applications that benefit from multi-band capability, such as satellite communication. The designed LNA consists of three stages: Two stages are cascoded using source degeneration with a resistor for low noise and high linearity, and the third cascaded stage is utilized for high gain. The designed UWB LNA exhibits a measured gain of 17.4 ± 1 dB between 312 and GHz and a 3 dB bandwidth of 12.4 GHz (1.6–14 GHz). It achieves a noise figure (NF) of 2.5–4.3 dB and an output P1dB of 15 dBm. The chip size is $3\times 1$${\mathrm{mm}}^2$, and it operates without the need for any external components. When compared to LNAs in the literature, the proposed design stands out for its flat gain in the specified frequency band, making the LNA particularly attractive for volume-limited and power-constrained applications. Full article

This paper presents the design, implementation, and characterization of a broadband power amplifier (PA) with a reconfigurable architecture, capable of efficient operation across a wide frequency range of 0.2–3.6 GHz. Leveraging Gallium Nitride (GaN) devices, the PA achieves high efficiency and power, essential for broadband and high-frequency applications. By swapping the roles of the main and peak amplifiers, the PA achieves Doherty behavior at two related frequencies, 1.4 and 2.8 GHz, where the first is exactly half of the second, while maintaining consistent efficiency and output power across the remaining band in non-Doherty modes. Characterization results confirm the reliability and versatility of the proposed design, showcasing its ability to deliver robust performance across both Doherty and non-Doherty operational ranges. This combination of GaN technology and innovative reconfigurability makes the PA highly suitable for broadband applications requiring high efficiency, flexibility, and wideband coverage. Moreover, the simplicity of the proposed design makes it not only practical for implementation but also highly competitive among state-of-the-art solutions. Full article

This paper presents the first hybrid supply modulator (HSM) designed for envelope tracking power amplifiers (ET-PAs) in base station applications. The focus is on a rail-to-rail Class-AB linear amplifier (LA) optimized for high-voltage and wide-bandwidth operation. The LA is designed using 130 nm BCD technology, utilizing Laterally Diffused Metal-Oxide Semiconductor (LDMOS) transistors for high-voltage operation and incorporating shielding MOSFETs to protect the low-voltage devices. The circuit utilizes dual power supply domains (5 V and 30 V) to improve power efficiency. The proposed LA achieves a bandwidth of 100 MHz and a slew rate of +1003/−852 V/$\mathsf{\mu }\mathrm{s}$, with a quiescent power consumption of 0.89 W. Transient simulations using a 50 MHz bandwidth 5G NR envelope input demonstrate that the proposed HSM achieves a power efficiency of 83%. Consequently, the proposed HSM supports high-output (100 W) wideband 5G NR transmission with enhanced efficiency. Full article

Near-field acoustic holography (NAH) provides an effective way to achieve wide-band, high-resolution visualization measurement of the sound insulation performance of building components. However, based on Green’s function, the microphone array’s inherent amplitude and phase mismatch errors will exponentially amplify the sound field inversion process, significantly reducing the measurement accuracy. To systematically evaluate this problem, this study combines numerical simulation with actual measurements in a soundproof room that complies with the ISO 10140 standard, quantitatively analyzes the influence of array system errors on NAH reconstructed sound insulation and acoustic images, and proposes an error correction strategy based on channel transfer function normalization. The research results show that when the array amplitude and phase mismatch mean values are controlled within 5% and 5°, respectively, the deviation of the weighted sound insulation measured by NAH can be controlled within 1 dB, and the error in the key frequency band of building sound insulation (200–1.6k Hz) does not exceed 1.5 dB; when the mismatch mean value increases to 10% and 10°, the deviation of the weighted sound insulation can reach 2 dB, and the error in the high-frequency band (≥1.6k Hz) significantly increases to more than 2.0 dB. The sound image shows noticeable spatial distortion in the frequency band above 250 Hz. After applying the proposed correction method, the NAH measurement results of the domestic microphone array are highly consistent with the weighted sound insulation measured by the standard method, and the measurement difference in the key frequency band is less than 1.0 dB, which significantly improves the reliability and applicability of low-cost equipment in engineering applications. In addition, the study reveals the inherent mechanism of differential amplification of system errors in the propagating wave and evanescent wave channels. It provides quantitative thresholds and operational guidance for instrument selection, array calibration, and error compensation of NAH technology in building sound insulation detection. Full article