Search Results (107)

This study examines the impact of increasing photovoltaic (PV) penetration on the transient stability of the IEEE 9-bus power system. Synchronous machines are modeled with standard subtransient dynamics, while PV units are represented as current-limited grid-following inverters. Transient stability is assessed through the Critical Clearing Time (CCT) and the post-fault dynamic behavior, obtained from time-domain simulations carried out in MATLAB/Simulink^® R2023b. Two permanent three-phase faults are considered: a primary contingency on line 7–5 and a secondary contingency on line 9–6, introduced to assess the robustness of the observed trends across different fault locations. The results show an increase in CCT as PV generation progressively replaces the active power supplied by synchronous machines, whose inertia is therefore maintained: from 210 ms (0% PV) to 440 ms (25%)/1080 ms (40%) at bus 5, 410 ms (25%)/1130 ms (40%) and 290 ms (25%)/650 ms (40%) at buses 6 and 8, respectively, demonstrating that the penetration site is a key factor for system stability. For distributed penetration among the three buses, CCT values of 340 ms (25%) and 1020 ms (40%) highlight the significant influence of PV placement at bus 8. The fault on line 9–6 consistently yields higher CCT values across all scenarios, confirming the robustness of these trends independently of fault location. Although an overall increase in CCT was observed, higher PV penetration also led to more pronounced oscillations and operability issues after the fault. In particular, 75% of the penetration scenarios under the fault on line 9–6 do not meet the active power recovery requirements of IEEE 1547-2018 and IEEE 2800-2022, a result more severe than that observed for the fault on line 7–5. These results underscore that a higher CCT does not guarantee operational compliance, and that stability-oriented control strategies—such as grid-forming operation, fast active power support, and dynamic voltage control—remain essential. They also suggest that planning practices should favor interconnections electrically closer to the slack generator. Overall, a high PV penetration level—modifying only the operating point of synchronous machines—allows longer fault durations to be tolerated; however, appropriate siting of PV units and the adoption of advanced inverter controls could mitigate the observed oscillations and post-fault operability challenges. Full article

This paper presents an efficient stand-alone photovoltaic water pumping system (PVWPS) intended for agricultural irrigation applications, operating without energy storage. The system employs a three-phase induction motor supplied by a three-level neutral point clamped (NPC) inverter. The proposed control strategy integrates the advantages of two distinct controllers to enhance both energy extraction and drive performance. On the photovoltaic side, a fuzzy logic-based maximum power point tracking (MPPT) algorithm is implemented to ensure continuous operation at the global maximum power point under rapidly varying irradiance conditions. On the motor drive side, a direct torque control (DTC) scheme is combined with the multilevel NPC inverter to regulate electromagnetic torque and stator flux. The use of a multilevel inverter significantly mitigates the inherent drawbacks of conventional DTC, notably torque and flux ripples, as well as stator current harmonic distortion. The overall control architecture maximizes power transfer from the photovoltaic generator to the pumping system, resulting in improved dynamic response and energy efficiency. The proposed system is validated through detailed MATLAB/Simulink simulations under abrupt irradiance variations and a realistic daily solar profile corresponding to August conditions in Kairouan, Tunisia. Simulation results demonstrate substantial performance improvements, including an 88% reduction in torque ripples, a 50% decrease in flux ripple, a 77.9% reduction in stator current THD, and a 33.3% enhancement in speed transient response compared to conventional DTC-based systems. Full article

Model Predictive Control (MPC) is widely employed in three-phase two-level voltage source inverters (2L-VSIs) due to its fast dynamic response and straightforward implementation. However, conventional MPC requires the evaluation of all eight candidate voltage vectors (VVs), which increases computational burden and current prediction time, introduces higher common-mode voltage (CMV), and may degrade steady-state performance. To address these limitations, this paper investigates the effect of reducing the number of candidate VVs on CMV suppression, the reduction in current prediction time, and the enhancement of 2L-VSI performance. First, a five-voltage-vectors MPC approach is developed, achieving noticeable CMV suppression compared with the conventional approach. Although this approach achieved CMV suppression, it still incurred a high computational burden. Therefore, it was further developed into a systematic switching approach based on three VVs, in which only three candidate VVs are selected at each sampling instant. The proposed approach achieves two primary objectives: suppressing CMV and reducing the current prediction time by 50%. Experimental validation is conducted to compare the proposed approach with the conventional MPC in terms of CMV, current prediction time, Total Harmonic Distortion (THD), inductance variation sensitivity, dynamic response, and power loss. The results demonstrate that the proposed approach achieves superior steady-state and dynamic performance while significantly reducing the current prediction time and achieving suppression of the CMV at Vdc/2, thereby enhancing the performance of 2L-VSIs. Full article

In response to the International Maritime Organization’s emission reduction targets, ship power systems are transitioning toward microgrid architectures with high renewable energy penetration. In islanded mode, the lack of main grid support and the low inertia of power electronic interfaces pose significant frequency stability challenges. Virtual Synchronous Generator (VSG) technology offers an effective solution, but conventional VSG control exhibits two inherent limitations: steady-state frequency deviation under load variations due to its primary regulation nature, and poor dynamic response characterized by large overshoot and prolonged settling time. This paper proposes an enhanced VSG control strategy integrating two key innovations: (i) a communication-free secondary frequency regulation loop that eliminates steady-state error, and (ii) an adaptive control scheme for virtual inertia and damping coefficients that dynamically responds to frequency deviations and their rate of change. The adaptive mechanism reduces overshoot by 57% (from 0.14 Hz to 0.06 Hz) and shortens settling time by 40% (from 0.38 s to 0.23 s) compared to non-adaptive secondary regulation, as demonstrated through MATLAB/Simulink simulations and 6 kW experimental prototype validation. The proposed strategy ensures both steady-state accuracy and enhanced transient performance, providing a reliable solution for improving power quality in islanded shipboard microgrids and contributing to maritime decarbonization goals. Full article

In this paper, a Multiple-Objective Memetic Algorithm (MOMA) is proposed to address the Energy-Efficient Distributed Assembly Permutation Flow-Shop Scheduling Problem (EEDAPFSP) by explicitly exploiting the structural and objective symmetries inherent in the scheduling process, with the dual objectives of minimizing the maximum completion time (makespan) and total energy consumption (TEC). The EEDAPFSP is a complex NP-hard optimization problem in modern sustainable manufacturing that balances production efficiency and environmental sustainability. During the global search phase, a symmetry-preserving dual-search framework is constructed, in which diverse and potential regions in the solution space are explored by symmetrically generating time-dominant product sub-sequences (TDPSs) and energy-dominant product sub-sequences (EDPSs) in the individuals of each iteration, enabling complementary exploration from time- and energy-oriented perspectives. This is accomplished through the incorporation of a variable-weight metric technique and a first product fixed strategy into an estimation distributed algorithm-based hyper-heuristic (EDAHH), so as to maintain a balanced and symmetric probabilistic modeling of decision patterns with respect to the makespan and energy consumption. In the local search phase, two problem-specific designed neighborhood structures are proposed to refine the job sequences corresponding to the TDPS and EDPS in the superior sub-population, effectively reducing both the makespan and TEC. A box-level $\epsilon$ dominance technique based on the crowding distance is proposed for Pareto archive updating. Additionally, an energy-saving strategy is embedded throughout the algorithm, incorporating three mechanisms—job processing delay, machine shutdown and restart control, and speed regulation—to further optimize TEC during both the global and local search phases. Finally, extensive computational experiments are carried out, and the results demonstrate that the MOMA achieves significantly better performance in terms of the inverted generational distance ($IGD$) and the quality metric $\rho$ compared with state-of-the-art algorithms. The resulting Pareto front of non-dominated solutions provides a comprehensive set of trade-offs between energy consumption and the makespan, offering decision makers flexible and efficient scheduling options. Full article

This paper proposes a novel, dual-output, hybrid-clamped, quasi-five-level inverter (DO-HC-FLI) topology, capable of providing two independent AC voltage outputs with adjustable frequency and amplitude. Derived from a dual-output, active, neutral-point-clamped, three-level inverter, the proposed topology introduces three additional switches per phase to create dynamic switching paths. This expands the available range of DC-side voltage outputs and significantly improves the utilization rate of the DC–link voltage. Additionally, by adopting an asymmetric DC–link voltage configuration, the output line voltage levels of the conventional four-level inverter are increased to a number comparable to that of a five-level inverter. The front-end stage employs a hybrid series-parallel architecture, integrating dual Buck circuits with DC power sources. This configuration supplies the subsequent inverter stage with DC voltage levels at an optimal asymmetric ratio. In conjunction with a dual-output space vector pulse width modulation (SVPWM) strategy, the proposed system can collaboratively optimize the output voltage level characteristics of the inverter stage. Furthermore, a comprehensive analysis and comparison with other multilevel inverters are presented to demonstrate the superiority of the proposed topology. Finally, simulations and experiments are conducted to validate the effectiveness and feasibility of the proposed topology and modulation strategy. Full article

This paper proposes a dynamic voltage restorer (DVR) based on a new three-phase multilevel inverter (MLI). An integral component of DVRs is the power electronic converter. At medium-to-high voltage levels, MLIs are the ideal converters for DVR applications because lower voltage-rated switches are used to generate high voltages, thus minimizing power losses. The proposed three-phase MLI generates 15 levels of load voltage per phase, using a reduced component count: eight lower-rated semiconductor power switches, four primary DC voltage sources, two auxiliary DC sources, and eight driver circuits per phase. Additionally, each phase features a low-frequency transformer with voltage-boosting and galvanic isolation capabilities. The switching sequence of the proposed MLI is simpler to execute using fundamental frequency control; this methodology provides reduced switching stress and reduced switching losses as merits. Structurally, the proposed MLI is less complex and thus scalable. The proposed DVR, based on three-phase MLI, efficiently offsets power quality problems such as voltage swell, voltage sags, and harmonics for balanced and unbalanced loads. The operational performance of the proposed DVR-MLI is verified by a simulation, using PSCAD software and an experimental prototype. Full article

This study presents a versatile single-phase multilevel inverter designed to accommodate varying input voltages and output levels. Unlike conventional fixed topologies, the proposed design utilizes a unified structure of 13 switches and three capacitors to realize two distinct configurations: a nine-level circuit employing three series-connected single-voltage clamping sets, and a thirteen-level variant utilizing a hybrid of single- and half-voltage clamping sets. A critical advantage of this architecture is its capability to achieve capacitor self-voltage balancing within a single AC cycle, thereby simplifying the control strategy. Verification through PSIM 9.1 simulations and a TI F280025C-based hardware prototype confirms the circuit’s operational effectiveness. Notably, the thirteen-level configuration demonstrates superior performance, achieving a total harmonic distortion (THD) of 1.25% and a peak efficiency of 97.5%, significantly outperforming the 1.43% THD and 94.5% efficiency of the nine-level counterpart. Full article

With an emphasis on common-mode voltage (CMV) and leakage current suppression, this research offers a thorough examination of three-phase, two-level buck inverter topologies for transformerless (TL) grid-tied photovoltaic (PV) systems. A comprehensive classification and comparative evaluation of modern voltage-source inverter (VSI) and current-source inverter (CSI) topologies, such as H6, H7, H8, H10, and hybrid setups, constitute the paper’s main contribution. The main conclusions show that CSIs naturally offer better leakage current suppression, albeit at the expense of cost and complexity, while sophisticated VSIs (such as specific H8 and H10 topologies) in conjunction with specialized modulation techniques (like modified discontinuous PWM) provide balanced performance. The study finds intriguing research possibilities for further work in this area and indicates that the ideal topology depends on the specific application. Full article

This paper presents a novel hybrid modulation technique for Asymmetrical Cascaded H-Bridge Multilevel Inverters (ACHBMLIs), specifically designed to enhance both efficiency and harmonic performance. Unlike conventional strategies, the proposed method optimizes the switching scheme by operating the high-voltage H-Bridge at the fundamental frequency, thereby significantly reducing switching losses while maintaining low harmonic distortion levels comparable to traditional Pulse Width Modulation (PWM). To assess the effectiveness of the approach, a comprehensive comparison was conducted against two widely adopted modulation techniques for ACHBMLIs: Multicarrier Pulse Width Modulation (MPWM) and the Staircase Modulation Strategy (SMS). The evaluation involved both simulation and real-time Hardware-in-the-Loop (HIL) testing of a 7-level three-phase ACHBMLI, with a focus on key performance indicators such as voltage and current harmonic distortion, as well as converter efficiency. The results demonstrate that the proposed hybrid modulation achieves higher efficiency than PWM and lower current Total Harmonic Distortion (THD) than SMS. These findings highlight the potential of the hybrid strategy as a compelling solution for applications that demand an optimal balance between energy efficiency and waveform quality. Full article

The electrification of mobility sectors, including automotive, aerospace, and robotics, has accelerated the need for compact and high-efficiency power converters in electric motor drives. Wide-bandgap (WBG) semiconductor–based inverters offer significant advantages over conventional silicon IGBT inverters by enabling higher switching speeds, elevated switching frequencies, and improved power conversion efficiency. However, the adoption of high-frequency switching introduces several challenges, particularly increased motor neutral point voltage stress, originating from inverter common-mode (CM) voltage. The increased neutral point voltage directly elevates motor bearing voltage, the primary driver of motor bearing currents, among which electrostatic discharge machining (EDM) bearing current is the primary cause of bearing degradation in low-power motors. This paper experimentally investigates the root causes of the EDM phenomenon and identifies the key factors influencing its occurrence and severity in WBG-based drive systems. The conventional CM choke designs effectively attenuate motor CM currents and EMI; however, they are ineffective in suppressing EDM bearing currents. In this paper, an alternative CM choke design methodology is proposed to eliminate EDM bearing currents by optimizing the choke inductance to shift the motor CM antiresonance frequency below the inverter switching frequency, thereby ensuring that nearly all source CM voltage is absorbed by the choke. This design approach effectively minimizes the voltage appearing at the motor neutral point and across the bearings, thereby suppressing EDM bearing current spikes without affecting motor DM performance. The choke parameters are mathematically derived for optimal performance and validated through experimental testing on a 2.2 kW three-phase star-connected induction motor powered by a wide-bandgap two-level voltage-source inverter. Full article

In this paper, the optimization of a harmonic-excited synchronous machine (HESM) is carried out. A two-phase harmonic exciter winding of the HESM provides brushless excitation and sufficient starting torque at any rotor position. The HESM under consideration is intended to be used for applications requiring speed control, especially in the field-weakening region. The novelty of the proposed approach is that a two-level optimization based on a two-stage model is used to reduce the computational burden. It includes a finite-element model that takes into account only the fundamental current harmonic (basic model). Using the output of the basic model, a reduced-order model (ROM) is parametrized. The ROM considers pulse-width-modulated components of the inverter output current, zero-sequence current injected into the stator winding, and harmonic excitation winding currents. A two-level optimization technique is developed based on the Nelder–Mead method, taking into account the significantly different computational complexity of the basic and reduced-order models. Optimization is performed considering two operating points: base and maximum speed. The results show that an optimized design provides significantly higher efficiency and reduced inverter power requirements. This allows the use of more compact and cheaper power switches. Therefore, the advantage of the presented approach lies in the computationally effective optimization of HESMs (optimization time is reduced by approximately three orders of magnitude compared to calculations using FEA alone), which enhances HESMs’ performance in various applications. Full article

Induction motors piloted by voltage source inverters constitute a major source of acoustic noise in industry. The discrete tonal bands generated by induction motor stator current spectra controlled by the fixed Pulse Width Modulation (PWM) technique have damaging effects on the electronic noise source. Nowadays, the investigation of new advanced control techniques for variable speed drives has developed a potential investigation field. Finite state model predictive control has recently become a very popular research focus for power electronic converter control. The flexibility of this control shows that the switching times are generated using all the information on the drive status. Predictive Torque Control (PTC), space vector PWM and random PWM are investigated in this paper in terms of acoustic noise emitted by an induction machine fed by a three-phase two-level inverter. A comparative study based on electrical and mechanical magnitudes, as well as harmonic analysis of the stator current, is presented and discussed. An experimental test bench is also developed to examine the effect of the proposed PTC and PWM techniques on the acoustic noise of an induction motor fed by a three-phase two-level voltage source converter. Full article

A three-phase inverter generates non-sinusoidal voltages, contains high order harmonics, and concentrates on switching frequency multiples. Supplying an induction machine (IM) with a voltage source inverter (VSI) increases the acoustic noise content which becomes unbearable, particularly for systems needing a moderate level of electric traction. The discrete tonal bands produced by the IM stator current spectrum controlled by the fixed pulse width modulation (PWM) technique have damaging effects on the electronic noise source. Moreover, it has been factually proven that the noise content is strongly associated with the harmonics of the source feeding electric machine. Thus, the harmonic content is influenced by the control strategy VSI to produce pulse width modulation (PWM). Currently, the investigation of new advanced control techniques for variable speed drives has developed into a potential investigation file. Two fundamental topologies for a three-phase inverter have been suggested in the literature, namely two- and three-level topologies. Therefore, this paper investigated the effect of variable and fixed PWM strategies, such as random PWM (RPWM) and space vector PWM (SVPWM), on the noise generated by an IM, powered with a two- or three-level inverter. Simulation results showed the validity and efficiency of the proposed variable RPWM strategy in reducing sideband harmonics for both the two and three levels at different switching frequencies and modulation indexes. The proposed PWM strategies were further evaluated by the results of equivalent experiments on an IM fed by a two-level VSI. The experimental measurements of harmonic current and noise spectra demonstrate that the acoustic noise is reduced and dispersed totally for the RPWM strategy. Full article

Model predictive control (MPC) has emerged as a favorable control approach for PMSM drives, though its practical deployment is frequently hindered by superior computational complexity and execution burden. This paper presents four finite control set MPC (FCS-MPC) techniques applied to a two-level inverter-fed PMSM drive. Two of the approaches are conventional methods, while the other two are novel developed strategies proposed in this paper. The novel techniques focus on significantly decreasing computational burdens by employing an efficient space-vector selection mechanism that quickly selects the optimum switching vector without exhaustive evaluation. A comprehensive comparative assessment of all four control methods is conducted under various operating conditions, evaluating their dynamic and steady-state performance, computational requirements, and real-time feasibility. Simulation results demonstrate that the proposed techniques achieve a significant reduction in computational effort and faster processing, up to 39.65% faster than conventional full-state evaluation, while maintaining control performances comparable to conventional techniques. These results highlight the potential of the proposed MPC approaches to bridge the gap between advanced control theory and practical implementation in real-time PMSM drive systems, providing effective solutions for installing high-performance PMSM drives on hardware with limited resources. Full article