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Keywords = soft switching condition

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27 pages, 21804 KB  
Article
Analysis and Compensation of Dead-Time Effect in Dual Active Bridge with Asymmetric Duty Cycle
by Pengfei Liu, Shuairan Yu, Ruiyang Zhang, Yanming Cheng and Shaojie Yu
Symmetry 2025, 17(10), 1701; https://doi.org/10.3390/sym17101701 - 10 Oct 2025
Viewed by 172
Abstract
The dead-time effect seriously affects the soft-switching performance and operating efficiency of the dual-active-bridge converter, and also causes problems such as reduced duty cycle, distortion of voltage and current waveforms, and narrowed transmission power range. The proposal of the five-degree-of-freedom modulation strategy transforms [...] Read more.
The dead-time effect seriously affects the soft-switching performance and operating efficiency of the dual-active-bridge converter, and also causes problems such as reduced duty cycle, distortion of voltage and current waveforms, and narrowed transmission power range. The proposal of the five-degree-of-freedom modulation strategy transforms the working voltage waveforms of the primary and secondary sides as well as the inductor current waveform of the DAB converter from symmetric to asymmetric, while the dead-time issue still persists. Based on the five-degree-of-freedom modulation strategy, this paper analyzes the electrical characteristics of the converter before and after the introduction of dead time, designs switch drive pulses to avoid the dead time, and proposes a dead-time compensation modulation strategy based on five-degree-of-freedom phase shift. The results show that the proposed dead-time compensation control strategy can avoid problems such as voltage and current waveform distortion and reduction in the soft-switching power range caused by dead time, realizing dead-time compensation in the full power range. Experimental measurements show that, for different voltage transmission ratios, the maximum efficiency improvement is approximately 3.8–4% and the current stress is reduced by 2.11% to 3.13% under low-power operating conditions. The maximum efficiency improvement is approximately about 1.4–2.8% and the current stress is reduced by 1.84% to 2.53% under high-power operating conditions. Full article
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27 pages, 7591 KB  
Article
Switching Frequency Figure of Merit for GaN FETs in Converter-on-Chip Power Conversion
by Liron Cohen, Joseph B. Bernstein, Roni Zakay, Aaron Shmaryahu and Ilan Aharon
Electronics 2025, 14(19), 3909; https://doi.org/10.3390/electronics14193909 - 30 Sep 2025
Viewed by 397
Abstract
Power converters are increasingly pushing toward higher switching frequencies, with current designs typically operating between tens of kilohertz and a few megahertz. The commercialization of gallium nitride (GaN) power transistors has opened new possibilities, offering performance far beyond the limitations of conventional silicon [...] Read more.
Power converters are increasingly pushing toward higher switching frequencies, with current designs typically operating between tens of kilohertz and a few megahertz. The commercialization of gallium nitride (GaN) power transistors has opened new possibilities, offering performance far beyond the limitations of conventional silicon devices. Despite this promise, the potential of GaN technology remains underutilized. This paper explores the feasibility of achieving sub-gigahertz switching frequencies using GaN-based switch-mode power converters, a regime currently inaccessible to silicon-based counterparts. To reach such operating speeds, it is essential to understand and quantify the intrinsic frequency limitations imposed by GaN device physics and associated parasitics. Existing power conversion topologies and control techniques are unsuitable at these frequencies due to excessive switching losses and inadequate drive capability. This work presents a detailed, systematic study of GaN transistor behavior at high frequencies, aiming to identify both fundamental and practical switching limits. A compact analytical model is developed to estimate the maximum soft-switching frequency, considering only intrinsic device parameters. Under idealized converter conditions, this upper bound is derived as a function of internal losses and the system’s target efficiency. From this, a soft-switching figure of merit is proposed to guide the design and layout of GaN field-effect transistors for highly integrated power systems. The key contribution of this study lies in its analytical insight into the performance boundaries of GaN transistors, highlighting the roles of parasitic elements and loss mechanisms. These findings provide a foundation for developing next-generation, high-frequency, chip-scale power converters. Full article
(This article belongs to the Topic Wide Bandgap Semiconductor Electronics and Devices)
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20 pages, 5246 KB  
Article
Class E ZVS Resonant Inverter with CLC Filter and PLL-Based Resonant Frequency Tracking for Ultrasonic Piezoelectric Transducer
by Apinan Aurasopon, Boontan Sriboonrueng, Jirapong Jittakort and Saichol Chudjuarjeen
J. Low Power Electron. Appl. 2025, 15(3), 54; https://doi.org/10.3390/jlpea15030054 - 22 Sep 2025
Viewed by 373
Abstract
This paper presents a Class E zero-voltage soft-switching (ZVS) resonant inverter integrated with a CLC filter and a digital resonant frequency tracking technique for driving a piezoelectric ceramic transducer (PZT) in ultrasonic cleaning applications. A digital signal processor (DSP) is used to dynamically [...] Read more.
This paper presents a Class E zero-voltage soft-switching (ZVS) resonant inverter integrated with a CLC filter and a digital resonant frequency tracking technique for driving a piezoelectric ceramic transducer (PZT) in ultrasonic cleaning applications. A digital signal processor (DSP) is used to dynamically monitor and adjust the operating frequency in response to slight variations in the cleaning load, employing a phase-locked loop (PLL) control scheme. The proposed method ensures that the inverter maintains ZVS operation across a frequency range from 30.0 kHz to 34.0 kHz, thereby improving energy efficiency and reducing switching losses. The system is capable of delivering a stable power output of 100 W. Both the simulation and experimental results validate the effectiveness of the proposed technique, demonstrating improved performance under varying load conditions. The combination of CLC filtering and frequency tracking offers a compact and robust solution suitable for ultrasonic cleaner systems and similar resonant-load applications. Full article
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18 pages, 9662 KB  
Article
Isolated Bipolar Bidirectional Three-Port Converter with Voltage Self-Balancing Capability for Bipolar DC Microgrids
by Shusheng Wang, Chunxing Lian, Zhe Li, Zhenyu Zheng, Hai Zhou and Binxin Zhu
Electronics 2025, 14(18), 3672; https://doi.org/10.3390/electronics14183672 - 17 Sep 2025
Viewed by 348
Abstract
Bipolar DC microgrids gain significant attention for their flexible structure, high power supply reliability, and strong compatibility with distributed power sources. However, inter-pole voltage imbalance undermines system operational stability. An isolated bipolar bidirectional three-port converter with voltage self-balancing capability is proposed in this [...] Read more.
Bipolar DC microgrids gain significant attention for their flexible structure, high power supply reliability, and strong compatibility with distributed power sources. However, inter-pole voltage imbalance undermines system operational stability. An isolated bipolar bidirectional three-port converter with voltage self-balancing capability is proposed in this paper, which can serve as the interface between the energy storage system and bipolar bus while achieving automatic voltage balance between poles. Unlike traditional bidirectional grid-connected voltage balancers (VBs), the proposed converter requires no additional voltage monitoring or complex control systems. The operating modes, soft-switching boundary conditions, and inter-pole voltage self-balancing mechanism are elaborated. A 1 kW experimental prototype has been built to validate the theoretical analysis of the proposed converter. Full article
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15 pages, 16115 KB  
Article
Fully DC Aggregation Topology with Power Self-Balancing Capacitors for Offshore Wind Power Transmission: Simulation Study
by Huan Li, Qingming Xin, Ruoqing Hong and Qingmin Li
Electronics 2025, 14(17), 3422; https://doi.org/10.3390/electronics14173422 - 27 Aug 2025
Viewed by 378
Abstract
This paper focuses on the Input-Independent Output-Series (IIOS) DC converters within fully DC aggregation systems, which enable independent submodule control and high voltage gain. DC aggregation systems experience output voltage imbalance among submodules due to offshore wind power fluctuations. The proposed isolated DC/DC [...] Read more.
This paper focuses on the Input-Independent Output-Series (IIOS) DC converters within fully DC aggregation systems, which enable independent submodule control and high voltage gain. DC aggregation systems experience output voltage imbalance among submodules due to offshore wind power fluctuations. The proposed isolated DC/DC converter topology incorporates power-balancing capacitors, leveraging intrinsic characteristics to achieve self-power balancing within the system. In addition, this paper proposes an innovative PFMT-PSMN hybrid control strategy that is well-suited for the proposed topology. Firstly, this study performs a time-domain analysis of the intrinsically power-balanced DC series-connected aggregation topology and elucidates the corresponding power-balancing principle. Secondly, based on soft-switching boundary conditions, a hybrid control strategy, PFMT-PSMN, adjusts phase-shift duty cycles to maintain soft-switching conditions while minimizing the system operating frequency. Finally, MATLAB/Simulink simulations validate the power-balancing capability of the intrinsically balanced DC series-connected aggregation system and the effectiveness of the proposed PFMT-PSMN control strategy. Full article
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15 pages, 4451 KB  
Article
Small-Signal Modeling of Asymmetric PWM Control Based Series Resonant Converter
by Gwang-Min Park and Kui-Jun Lee
Electronics 2025, 14(17), 3394; https://doi.org/10.3390/electronics14173394 - 26 Aug 2025
Viewed by 498
Abstract
This paper presents a small-signal model of a series resonant converter under continuous conduction mode, based on asymmetric pulse-width modulation, which is commonly used under light-load conditions. When controlled using conventional pulse-frequency modulation, the series resonant converter (SRC) suffers from insufficient resonant current [...] Read more.
This paper presents a small-signal model of a series resonant converter under continuous conduction mode, based on asymmetric pulse-width modulation, which is commonly used under light-load conditions. When controlled using conventional pulse-frequency modulation, the series resonant converter (SRC) suffers from insufficient resonant current under light loads, leading to degraded soft-switching performance, increased switching losses, and reduced efficiency due to the need for higher switching frequencies to maintain output regulation. To address these issues, the asymmetric pulse-width modulation with a fixed switching frequency is required to improve efficiency. In this study, a small-signal model is derived using the Extended Describing Function method. Based on this model, transfer functions are obtained and verified through MATLAB(R2024a), switching model-based PLECS(4.7.5) simulations, and experimental results. Full article
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15 pages, 1092 KB  
Article
Temperature Adaptive Biofilm Formation in Yersinia enterocolitica in Response to pYV Plasmid and Calcium
by Yunah Oh and Tae-Jong Kim
Antibiotics 2025, 14(9), 857; https://doi.org/10.3390/antibiotics14090857 - 25 Aug 2025
Cited by 1 | Viewed by 723
Abstract
Background/Objectives: Yersinia enterocolitica is a pathogenic bacterium that forms biofilms, enhancing its persistence and resistance to antimicrobial agents. Biofilm formation in Y. enterocolitica is influenced by environmental factors such as temperature, calcium, and the presence of the virulence plasmid pYV. This study [...] Read more.
Background/Objectives: Yersinia enterocolitica is a pathogenic bacterium that forms biofilms, enhancing its persistence and resistance to antimicrobial agents. Biofilm formation in Y. enterocolitica is influenced by environmental factors such as temperature, calcium, and the presence of the virulence plasmid pYV. This study aims to explore how temperature, calcium, and pYV modulate biofilm formation in Y. enterocolitica, with a focus on motility and extracellular polymeric substance (EPS) production as key factors. Methods: Y. enterocolitica strains with and without the pYV plasmid were cultured at two different temperatures (26 °C and 37 °C). The effect of calcium (5 mM) on biofilm formation was tested at both temperatures. Biofilm formation was measured using crystal violet staining, motility was assessed using soft agar plates, and EPS production was quantified to determine its role in biofilm stabilization. Results: At 26 °C, biofilm formation increased in pYV-negative strains, driven primarily by motility and flagellar expression. In contrast, at 37 °C, pYV-positive strains showed strong biofilm formation despite reduced growth, with EPS production as the key stabilizing factor. Calcium modulated biofilm formation in a temperature-dependent manner: at 26 °C, 5 mM calcium modestly reduced biofilm formation in pYV-negative strains, while at 37 °C, it significantly suppressed both EPS production and biofilm formation by approximately 50% in pYV-positive strains. Conclusions: This study reveals a novel regulatory switch where temperature, calcium, and pYV modulate biofilm formation in Y. enterocolitica. These findings suggest that Y. enterocolitica can adapt between motility- and EPS-dominated biofilm strategies depending on environmental conditions. Understanding these mechanisms offers potential targets for controlling biofilm-related persistence in clinical and food safety contexts. Full article
(This article belongs to the Special Issue Antibiofilm Activity against Multidrug-Resistant Pathogens)
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21 pages, 19398 KB  
Article
A Non-Isolated High Gain Step-Up DC/DC Converter Based on Coupled Inductor with Reduced Voltage Stresses
by Yuqing Yang, Song Xu, Wei Jiang and Seiji Hashimoto
J. Low Power Electron. Appl. 2025, 15(3), 48; https://doi.org/10.3390/jlpea15030048 - 22 Aug 2025
Viewed by 678
Abstract
Hybrid electric vehicles (HEVs) have gained significant attention for their superior energy efficiency and are becoming a predominant mode of urban transportation. The DC/DC converter plays a critical role in HEV energy management systems, especially in matching the voltage levels between the battery [...] Read more.
Hybrid electric vehicles (HEVs) have gained significant attention for their superior energy efficiency and are becoming a predominant mode of urban transportation. The DC/DC converter plays a critical role in HEV energy management systems, especially in matching the voltage levels between the battery and DC bus. This paper proposes a novel high-gain DC/DC converter with a wide input voltage range based on coupled inductors. The innovation lies in the integration of a resonant cavity and the simultaneous realization of zero-voltage switching (ZVS) and zero-current switching (ZCS), effectively reducing both voltage/current stresses on the power switches and switching losses. Compared with conventional topologies, the proposed design achieves higher voltage gain without extreme duty cycles, improved conversion efficiency, and enhanced reliability. Detailed operating principles are analyzed, and design conditions for voltage stress reduction, gain extension, and soft switching are derived. The simulation model has been conducted in a PSIM environment, and a 300 W experimental prototype, implemented using a dsPIC33FJ64GS606 digital controller, has been established and demonstrates 93% peak efficiency at a 10 times voltage gain. The performance and practical feasibility of the proposed topology have been evaluated by both simulation and experiments. Full article
(This article belongs to the Topic Advanced Integrated Circuit Design and Application)
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22 pages, 10412 KB  
Article
Design and Evaluation of Radiation-Tolerant 2:1 CMOS Multiplexers in 32 nm Technology Node: Transistor-Level Mitigation Strategies and Performance Trade-Offs
by Ana Flávia D. Reis, Bernardo B. Sandoval, Cristina Meinhardt and Rafael B. Schvittz
Electronics 2025, 14(15), 3010; https://doi.org/10.3390/electronics14153010 - 28 Jul 2025
Viewed by 590
Abstract
In advanced Complementary Metal-Oxide-Semiconductor (CMOS) technologies, where diminished feature sizes amplify radiation-induced soft errors, the optimization of fault-tolerant circuit designs requires detailed transistor-level analysis of reliability–performance trade-offs. As a fundamental building block in digital systems and critical data paths, the 2:1 multiplexer, widely [...] Read more.
In advanced Complementary Metal-Oxide-Semiconductor (CMOS) technologies, where diminished feature sizes amplify radiation-induced soft errors, the optimization of fault-tolerant circuit designs requires detailed transistor-level analysis of reliability–performance trade-offs. As a fundamental building block in digital systems and critical data paths, the 2:1 multiplexer, widely used in data-path routing, clock networks, and reconfigurable systems, provides a critical benchmark for assessing radiation-hardened design methodologies. In this context, this work aims to analyze the power consumption, area overhead, and delay of 2:1 multiplexer designs under transient fault conditions, employing the CMOS and Differential Cascode Voltage Switch Logic (DCVSL) logic styles and mitigation strategies. Electrical simulations were conducted using 32 nm high-performance predictive technology, evaluating both the original circuit versions and modified variants incorporating three mitigation strategies: transistor sizing, D-Cells, and C-Elements. Key metrics, including power consumption, delay, area, and radiation robustness, were analyzed. The C-Element and transistor sizing techniques ensure satisfactory robustness for all the circuits analyzed, with a significant impact on delay, power consumption, and area. Although the D-Cell technique alone provides significant improvements, it is not enough to achieve adequate levels of robustness. Full article
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29 pages, 7562 KB  
Review
COSS Losses in Resonant Converters
by Giuseppe Samperi, Antonio Laudani, Nunzio Salerno, Alfio Scuto, Marco Ventimiglia and Santi Agatino Rizzo
Energies 2025, 18(13), 3312; https://doi.org/10.3390/en18133312 - 24 Jun 2025
Viewed by 536
Abstract
High efficiency and high power density are key targets in modern power conversion. Operating power converters at high switching frequencies enables the use of smaller passive components, which, in turn, facilitate achieving high power density. However, the concurrent increase in switching frequency and [...] Read more.
High efficiency and high power density are key targets in modern power conversion. Operating power converters at high switching frequencies enables the use of smaller passive components, which, in turn, facilitate achieving high power density. However, the concurrent increase in switching frequency and power density leads to efficiency and overheating issues. Soft switching techniques are typically employed to minimize switching losses and significantly improve efficiency by reducing power losses. However, the hysteresis behavior of the power electronics devices’ output capacitance, COSS, is the cause of regrettable losses in Super-Junction (SJ) MOSFETs, SiC MOSFETs, and GaN HEMTs, which are usually adopted in soft switching-based conversion schemes. This paper reviews the techniques for measuring hysteresis traces and power losses, as well as the understanding of the phenomenon to identify current research trends and open problems. A few studies have reported that GaN HEMTs tend to exhibit the lowest hysteresis losses, while Si superjunction (SJ) MOSFETs often show the highest. However, this conclusion cannot be generalized by comparing the results from different works because they are typically made across devices with different (when the information is reported) breakdown voltages, on-state resistances, die sizes, and test conditions. Moreover, some recent investigations using advanced TCAD simulations have demonstrated that newer Si-SJ MOSFETs employing trench-filling epitaxial growth can achieve significantly reduced hysteresis losses. Similarly, while multiple studies confirm that hysteresis losses increase with increasing dv/dt and decreasing temperature, the extent of this dependence varies significantly with device structure and test methodology. This difficulty in obtaining a general conclusion is due to the lack of proper figures of merit that account for hysteresis losses, making it problematic to evaluate the suitability of different devices in resonant converters. This problem highlights the primary current challenge, which is the development of a standard and automated method for characterizing COSS hysteresis. Consequently, significant research effort must be invested in addressing this main challenge and the other challenges described in this study to enable power electronics researchers and practitioners to develop resonant converters properly. Full article
(This article belongs to the Section F3: Power Electronics)
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28 pages, 6345 KB  
Article
Multimodal Switching Control Strategy for Wide Voltage Range Operation of Three-Phase Dual Active Bridge Converters
by Chenhao Zhao, Chuang Huang, Shaoxu Jiang and Rui Wang
Processes 2025, 13(6), 1921; https://doi.org/10.3390/pr13061921 - 17 Jun 2025
Viewed by 512
Abstract
In recent years, to achieve “dual carbon” goals, increasing the penetration of renewable energy has become a critical approach in China’s power sector. Power electronic converters play a key role in integrating renewable energy into the power system. Among them, the Dual Active [...] Read more.
In recent years, to achieve “dual carbon” goals, increasing the penetration of renewable energy has become a critical approach in China’s power sector. Power electronic converters play a key role in integrating renewable energy into the power system. Among them, the Dual Active Bridge (DAB) DC-DC converter has gained widespread attention due to its merits, such as galvanic isolation, bidirectional power transfer, and soft switching. It has been extensively applied in microgrids, distributed generation, and electric vehicles. However, with the large-scale integration of stochastic renewable sources and uncertain loads into the grid, DAB converters are required to operate over a wider voltage regulation range and under more complex operating conditions. Conventional control strategies often fail to meet these demands due to their limited soft-switching range, restricted optimization capability, and slow dynamic response. To address these issues, this paper proposes a multi-mode switching optimized control strategy for the three-port DAB (3p-DAB) converter. The proposed method aims to broaden the soft-switching range and optimize the operation space, enabling high-power transfer capability while reducing switching and conduction losses. First, to address the issue of the narrow soft-switching range at medium and low power levels, a single-cycle interleaved phase-shift control mode is proposed. Under this control, the three-phase Dual Active Bridge can achieve zero-voltage switching and optimize the minimum current stress, thereby improving the operating efficiency of the converter. Then, in the face of the actual demand for wide voltage regulation of the converter, a standardized global unified minimum current stress optimization scheme based on the virtual phase-shift ratio is proposed. This scheme establishes a unified control structure and a standardized control table, reducing the complexity of the control structure design and the gain expression. Finally, both simulation and experimental results validate the effectiveness and superiority of the proposed multi-mode optimized control strategy. Full article
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13 pages, 1456 KB  
Article
Research on ZVS Arc Ignition Circuit and Its Conducted Interference
by Xiaoqing Lv and Yinghao Li
Electronics 2025, 14(11), 2195; https://doi.org/10.3390/electronics14112195 - 28 May 2025
Viewed by 483
Abstract
A zero-voltage switching (ZVS) push–pull self-oscillating arc ignition circuit was proposed, marking the first application of ZVS technology in welding arc ignition systems. The circuit’s working principle was analyzed, and time-domain waveforms of the switching transistors verified the realization of soft switching. A [...] Read more.
A zero-voltage switching (ZVS) push–pull self-oscillating arc ignition circuit was proposed, marking the first application of ZVS technology in welding arc ignition systems. The circuit’s working principle was analyzed, and time-domain waveforms of the switching transistors verified the realization of soft switching. A conducted interference test platform was established in order to assess the circuit’s electromagnetic compatibility under no-load and arc ignition transient conditions. In comparison with conventional domestic arc ignition circuits, the proposed ZVS circuit demonstrated substantially diminished quasi-peak interference levels, with a reduction exceeding 9.5 dB in both instances. Additionally, under no-load conditions, the ZVS circuit demonstrated interference levels comparable to those of a commercial Fronius system, while during arc ignition transients, it exhibited an over 5 dB reduction. The findings of this study demonstrate that the incorporation of soft-switching techniques into arc ignition circuits can effectively mitigate conducted interference, thus providing a promising and practical approach for industrial welding equipment. Full article
(This article belongs to the Special Issue Compatibility, Power Electronics and Power Engineering)
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46 pages, 2208 KB  
Review
A Survey on Free-Space Optical Communication with RF Backup: Models, Simulations, Experience, Machine Learning, Challenges and Future Directions
by Sabai Phuchortham and Hakilo Sabit
Sensors 2025, 25(11), 3310; https://doi.org/10.3390/s25113310 - 24 May 2025
Cited by 3 | Viewed by 3823
Abstract
As sensor technology integrates into modern life, diverse sensing devices have become essential for collecting critical data that enables human–machine interfaces such as autonomous vehicles and healthcare monitoring systems. However, the growing number of sensor devices places significant demands on network capacity, which [...] Read more.
As sensor technology integrates into modern life, diverse sensing devices have become essential for collecting critical data that enables human–machine interfaces such as autonomous vehicles and healthcare monitoring systems. However, the growing number of sensor devices places significant demands on network capacity, which is constrained by the limitations of radio frequency (RF) technology. RF-based communication faces challenges such as bandwidth congestion and interference in densely populated areas. To overcome these challenges, a combination of RF with free-space optical (FSO) communication is presented. FSO is a laser-based wireless solution that offers high data rates and secure communication, similar to fiber optics but without the need for physical cables. However, FSO is highly susceptible to atmospheric turbulence and conditions such as fog and smoke, which can degrade performance. By combining the strengths of both RF and FSO, a hybrid FSO/RF system can enhance network reliability, ensuring seamless communication in dynamic urban environments. This review examines hybrid FSO/RF systems, covering both theoretical models and real-world applications. Three categories of hybrid systems, namely hard switching, soft switching, and relay-based mechanisms, are proposed, with graphical models provided to improve understanding. In addition, multi-platform applications, including autonomous, unmanned aerial vehicles (UAVs), high-altitude platforms (HAPs), and satellites, are presented. Finally, the paper identifies key challenges and outlines future research directions for hybrid communication networks. Full article
(This article belongs to the Special Issue Sensing Technologies and Optical Communication)
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14 pages, 16692 KB  
Article
A New Type of DC-DC Buck Converter with Soft Start Function and Reduced Voltage Stress
by Xin Wang, Zishuo Li, Zhen Lin and Fanyi Meng
J. Low Power Electron. Appl. 2025, 15(2), 29; https://doi.org/10.3390/jlpea15020029 - 7 May 2025
Viewed by 1727
Abstract
This paper introduces a novel topology called the dual-path step-down converter with auxiliary switches to minimize voltage stress and enable wide voltage conversion ranges. The proposed dual-path step-down converter with auxiliary switches, which uses an inductor and flying capacitor as power conversion components, [...] Read more.
This paper introduces a novel topology called the dual-path step-down converter with auxiliary switches to minimize voltage stress and enable wide voltage conversion ranges. The proposed dual-path step-down converter with auxiliary switches, which uses an inductor and flying capacitor as power conversion components, helps to reduce the voltage stress on the power switches. By adding auxiliary switches, the proposed topology achieves the same voltage conversion ratio range as that of a conventional buck converter. Additionally, soft-start technology is incorporated to reduce the initial inrush current. Furthermore, this paper introduces a system-level design procedure for DC-DC converters. Designed for low-power applications with lithium-ion (Li-ion) batteries, the proposed converter steps down the battery voltage to 1.2 V. With a 380 nH inductor and a 5 µF output capacitor, the converter attains a peak efficiency of 90% under the conditions of 2.7 V to 1.2 V conversion. Full article
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15 pages, 16074 KB  
Article
Design on Power Factor Correction of a Digital Soft Switching Single-Phase Arc Welding Power Source
by Xiaoqing Lv and Minhao Jiang
Materials 2025, 18(9), 2138; https://doi.org/10.3390/ma18092138 - 6 May 2025
Cited by 1 | Viewed by 579
Abstract
A power factor correction circuit for a single-phase arc welding power source using digital soft switching technology is proposed. The overall hardware structure of the system, the topology principle of the selected soft switch boost circuit, and the software design approach are discussed. [...] Read more.
A power factor correction circuit for a single-phase arc welding power source using digital soft switching technology is proposed. The overall hardware structure of the system, the topology principle of the selected soft switch boost circuit, and the software design approach are discussed. The power factor correction results of the soft switch are verified under two conditions: electronic load and TIG arc welding. By using the electrical signals of the resonating capacitor and switching tube, it is confirmed that the circuit successfully achieved zero current conduction and zero voltage turn off. Through testing the power factor and efficiency of electronic loads at different powers, it was confirmed that the power factor can reach 0.985 or above, and the overall efficiency has been improved. Through TIG arc welding experiments under different welding currents, the corrected electrical signals are analyzed to verify the effectiveness of power factor correction for single-phase arc welding power. Full article
(This article belongs to the Section Metals and Alloys)
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