Search Results (20)

A new radio frequency (RF) probe using pogo pin tips for integrated chip (IC) measurement up to 50 GHz is proposed. It offers high durability due to the pogo pins and meets three key design criteria for general IC measurement: (1) a 45° tilted shape with a 70 μm tip protrusion for easy microscope inspection, (2) linear pogo pin alignment for commercial chip pad contact, and (3) a 250 μm pitch compatible with standard IC pad pitches. This design is distinct from traditional pogo pin probe cards which place pogo pins in vertical form, in a diagonal arrangement, and at wide intervals. The probe exhibits a low insertion loss of 1.6 dB at 45 GHz. A printed circuit board (PCB)-based calibration standard for the calibration of the designed probe is constructed, which is adjusted to inductance and capacitance values using a simulation to form the Vector Network Analyzer (VNA) calibration set. The measurements of a commercial amplifier IC using this probe show a nearly identical performance to commercial RF probes, confirming its accuracy and reliability. Full article

The implementation of quantum gates by means of microwave cryo-RFICs controlling qubits is a promising path toward scalable quantum processors. Quantum gate fidelity quantifies how well an actual quantum gate produces a quantum state close to the desired ideal one. Regrettably, the literature usually reports on quantum gate fidelity in a highly theoretical way, making it hard for RFIC designers to understand. This paper explains quantum gate fidelity by moving from Shannon’s concept of fidelity and proposing a detailed mathematical proof of a valuable integral formulation of quantum gate fidelity. Shannon’s information theory and the simple mathematics adopted for the proof are both expected to be in the background of electronics engineers. By using Shannon’s fidelity, this paper rationalizes the integral formulation of quantum gate fidelity. Because of the simple mathematics adopted, this paper also demystifies to electronics engineers how this integral formulation can be reduced to a more practical algebraic product matrix. This paper makes evident the practical utility of this matrix formulation by applying it to the specific examples of one- and two-qubit quantum gates. Moreover, this paper also compares mixed states, entanglement fidelity, and the error rate’s upper bound. Full article

The design of transformers, a key component of radio frequency integrated circuits (RFICs), is traditionally carried out through an iterative process involving extensive electromagnetic simulations. While process design kits (PDKs) offer tools based on interpolation or fitting equations to simplify parameter estimation, these tools are restricted to standard geometries, leaving designers to manually simulate and optimize custom designs. This approach is inefficient and resource intensive. This paper proposes an automated process to generate a database containing the physical and electrical parameters of a wide range of transformers. This database is part of a tool designed to efficiently identify the desired transformer. To evaluate the tool’s effectiveness in reducing the time required for design, a millimeter-wave (mm-Wave) 69.4–74.2 GHz differential low-noise amplifier (LNA) is designed using GlobalFoundries 45 nm silicon-on-insulator (SOI) technology. This circuit demonstrates a noise figure (NF) of 4.1 dB, a gain of 10.1 dB, an input third-order intercept point (IIP3) of −10.78 dBm, and a power consumption of 4.7 mW from a 0.406 V DC supply. Moreover, the simulated performance achieves these specifications within a highly compact area of 0.12 mm². The transformer selection process for the circuit takes only a few seconds, whereas the conventional method of manual transformer design and electromagnetic simulation would require a significantly greater amount of time. Full article

This paper presents a 5G new radio (NR) FR2 beamforming system with an integrated transceiver module. A real-time operating module providing enhanced flexibility and capability has been proposed. The integrated RF beamforming system with an integrated transceiver module can be operated in 8Tx-8Rx mode configuration simultaneously. A series-fed structure 8 × 7 microstrip antenna array for compact size and improved directivity is employed in the RF beamforming module. The RF beamforming module incorporates a custom 28 GHz, eight-channel fully differential beamforming IC (BFIC). An eight-channel BFIC in a phased-array beamforming system offers advantages in terms of increased antenna density and improved beam steering precision. The RF beamforming module is integrated with an RF transceiver module that enables the simultaneous up-conversion and down-conversion of the baseband signal. The RF transmitter module consists of a transmitter, a receiver, a signal generator, a power supply, and a control unit. The RF beamforming system can scan horizontally from −50° to +50° with a step of 10°. To achieve an optimized beam pattern, a calibration was conducted. The transmit and receive conversion gain of around 20 dB is achieved with the transceiver module. To verify the communication performance of the manufactured integrated RF beamforming system, a real-time wireless video transmission/reception test was performed at a frequency of 28 GHz, and the video file was transmitted smoothly in real time without interruption within a range of ±50°. Full article

Layout stitching is a repetitive and tedious task of the radio frequency integrated circuit (RFIC) design process. While academic research on layout splicing algorithms mainly focuses on analog and digital circuits, there is still a lack of well-developed algorithms for RFICs. An RFIC system usually has a symmetrical layout, such as transmitter and receiver components, low-noise amplifier (LNA), an SPDT switch, etc. This paper aims to address this gap by proposing an automated procedure for the layout of RFICs by relying on the basic device/PCell structure based on the interconnection among circuit topologies. This approach makes the in-series generation of layouts and automatic splicing based on circuit logic possible, resulting in superior stitching performance compared with related modules in Advanced Design System. To demonstrate the physical application possibilities, we implemented our algorithm on an LNA and a switch circuit. Full article

A novel adaptive mesh generation technique for efficient electromagnetic simulation of radio-frequency integrated circuits (RFICs) is herein presented. By exploring the geometrical and physical characteristics of RFICs, some adaptive mesh treatments, such as mesh projection, edge refinement, via polymerization, etc., are utilized to improve the accuracy and efficiency of electromagnetic computations. For strong coupling structures, such as two conductors in close proximity for a relatively large area, a projection-based mesh scheme is introduced to improve the accuracy of numerical integration. Moreover, the current most likely concentrates near the edges of conductors due to the edge effect. To better model the edge effect, an edge refinement scheme is applied. For via arrays that appear common in RFICs, an automatic via aggregation approach is adopted to improve computational efficiency yet still keep good computational accuracy. Finally, some numerical examples are given to validate the computational accuracy and efficiency of the novel adaptive mesh generation technique. Full article

This paper addresses the design of a hybrid beamforming system considering the circuit parameter of six-bit millimeter-wave phase shifters based on the process design kit. The phase shifter design adopts 45 nm CMOS silicon on insulator (SOI) technology at 28-GHz. Various circuit topologies are utilized, and in particular, a design is presented based on switched LC components, connected in a cascode manner. The phase shifter configuration is connected in a cascading manner to get the 6-bit phase controls. Six different phase shifters are obtained, which are 180°, 90°, 45°, 22.5°, 11.25°, and 5.6°, with a minimum number of LC components. The circuit parameters of the designed phase shifters are then incorporated in a simulation model of hybrid beamforming for a multiuser MIMO system. The number of OFDM data symbols used in the simulation is ten for eight users, 16 QAM modulation schemes, −25 dB SNR, 120 simulation runs, and around 170 h runtime. Simulation results are obtained considering four and eight users, assuming accurate technology-based models of RFIC components of the phase shifter as well as ideal phase shifter parameters. The results indicate that the performance of the multiuser MIMO system is affected by the accuracy level of the phase shifter RF component models. The outcomes also reveal the performance tradeoff based on user data streams and the number of BS antennas. By optimizing the amount of parallel data streams per user, higher data transmission rates are achieved, while maintaining acceptable error vector magnitude (EVM) values. In addition, stochastic analysis is conducted to investigate the distribution of the RMS EVM. The outcomes show that the best fitting of RMS EVM distribution of the actual and ideal phase shifters agreed with the log-logistic and logistic distributions, respectively. The obtained (mean, variance) values of the actual phase shifters based on accurate library models are (46.997, 481.36), and for ideal components the values are (36.47, 10.44). Full article

The development of radio-frequency integrated circuits (RF-IC) necessitates higher requirements for the size of microtransformers. This paper describes millimeter-scale 3D transformers in millimeter-scale, solenoidal, and toroidal transformers manufactured using Micro-electromechanical Systems (MEMS). Two through-silicon via (TSV) copper coils with a high aspect ratio are precisely interleaved on a reserved air core (magnet core cavity) with a vertical height of over 1 mm because of the thickness of the substrate, which increases the performance while reducing the footprint. The effects of the wire width, coil turns, magnetic core, and substrate on the performance of the two transformers are discussed through numerical simulations. When an air core is present, solenoidal transformers are better than toroidal transformers in terms of performance and footprint; however, the gap decreases when the size is reduced. Additionally, the magnetic core significantly improves the performance of the toroidal transformer compared to that of the solenoid. Thus, the toroidal transformer has a higher potential for further size reduction. The two types of transformers were then manufactured completely using MEMS and electroplating. This paper discusses the influence of various parameters on millimeter-scale 3D transformers and realizes processing in silicon, which provides the foundation for integrating transformers in a chip. Full article

In this paper, a wide-band noise-canceling (NC) current conveyor (CC)-based CMOS low-noise amplifier (LNA) is presented. The circuit employs a CC-based approach to obtain wide-band input matching without the need for bulky inductances, allowing broadband performance with a very small area used. The NC technique is applied by subtracting the input transistor’s noise contribution to the output and achieves a noise figure (NF) reduction from 4.8 dB to 3.2 dB. The NC LNA is implemented in a UMC 65-nm CMOS process and occupies an area of only 160 × 80 μm². It achieves a stable frequency response from 0 to 6.2 GHz, a maximum gain of 15.3 dB, an input return loss (S11) < −10 dB, and a remarkable IIP3 of 7.6 dBm, while consuming 18.6 mW from a ±1.2 V DC supply. Comparisons with similar works prove the effectiveness of this new implementation, showing that the circuit obtains a noteworthy performance trade-off. Full article

On-chip spiral inductors with variable line width layouts are known for their high quality factor (Q-factor). In this paper, we present an analytical approach to facilitate the design of such inductors. Based on an analysis of ohmic and eddy-current losses, we first derive an analytical formula for the metal resistance calculation of a spiral inductor. By minimizing the metal resistance, a simple design equation for finding the proper line width of each coil is then presented. Several 0.18 μm CMOS spiral inductors are investigated, via electromagnetic simulations and experimental studies, to test the proposed resistance calculation, as well as the variable line width design method. It is found that the developed resistance calculation can effectively model the metal-line resistance of a spiral inductor. Moreover, the inductor with a variable line width obtained using the proposed method can significantly improve the Q-factor with little compromise to inductance, which validates the capacity of the developed variable line width design technique. Since the proposed approach can be carried out using analytical calculations, it may be a more efficient design method than those previously reported in the literature. Full article

This work details the optimization and evaluation of a CMOS low-noise amplifier by developing a new algorithm for the $g_m/I_D$ approach and combining with a modified figure of merit index method. The amplifier includes on-chip matching elements (such as IC inductors) for resonance at the targeted frequencies. The simulation results of the optimized LNA model showed scattering parameter $S_{21}$ = 19.91 dB, noise figure NF = 3.54 dB and excellent linearity for third-order intermodulation parameter IIP3 = 5.89 dBm for the targeted frequency of $f_0$ = 2.4 GHz. Full article

Today, an electron spin qubit on silicon appears to be a very promising physical platform for the fabrication of future quantum microprocessors. Thousands of these qubits should be packed together into one single silicon die in order to break the quantum supremacy barrier. Microelectronics engineers are currently leveraging on the current CMOS technology to design the manipulation and read-out electronics as cryogenic integrated circuits. Several of these circuits are RFICs, as VCO, LNA, and mixers. Therefore, the availability of a qubit CAD model plays a central role in the proper design of these cryogenic RFICs. The present paper reports on a circuit-based compact model of an electron spin qubit for CAD applications. The proposed model is described and tested, and the limitations faced are highlighted and discussed. Full article

The availability of quantum microprocessors is mandatory, to efficiently run those quantum algorithms promising a radical leap forward in computation capability. Silicon-based nanostructured qubits appear today as a very interesting approach, because of their higher information density, longer coherence times, fast operation gates, and compatibility with the actual CMOS technology. In particular, thanks to their phase noise properties, the actual CMOS RFIC Phase-Locked Loops (PLL) and Phase-Locked Oscillators (PLO) are interesting circuits to synthesize control signals for spintronic qubits. In a quantum microprocessor, these circuits should operate close to the qubits, that is, at cryogenic temperatures. The lack of commercial cryogenic Design Kits (DK) may make the interface between the Voltage Controlled Oscillator (VCO) and the Frequency Divider (FD) a serious issue. Nevertheless, currently this issue has not been systematically addressed in the literature. The aim of the present paper is to investigate the VCO/FD interface when the temperature drops from room to cryogenic. To this purpose, physical models of electronics passive/active devices and equivalent circuits of VCO and the FD were developed at room and cryogenic temperatures. The modeling activity has led to design guidelines for the VCO/FD interface, useful in the absence of cryogenic DKs. Full article

A new sensor topology meant to extract figures of merit of radio-frequency analog integrated circuits (RF-ICs) was experimentally validated. Implemented in a standard 0.35 μm complementary metal-oxide-semiconductor (CMOS) technology, it comprised two blocks: a single metal-oxide-semiconductor (MOS) transistor acting as temperature transducer, which was placed near the circuit to monitor, and an active band-pass filter amplifier. For validation purposes, the temperature sensor was integrated with a tuned radio-frequency power amplifier (420 MHz) and MOS transistors acting as controllable dissipating devices. First, using the MOS dissipating devices, the performance and limitations of the different blocks that constitute the temperature sensor were characterized. Second, by using the heterodyne technique (applying two nearby tones) to the power amplifier (PA) and connecting the sensor output voltage to a low-cost AC voltmeter, the PA’s output power and its central frequency were monitored. As a result, this topology resulted in a low-cost approach, with high linearity and sensitivity, for RF-IC testing and variability monitoring. Full article

Nowadays, technologies have a massive impact on the design of avionic systems, even for the conservative space industry. In this paper, the single event effect (SEE) characterization of a highly integrated and radio frequency (RF) agile transceiver is being presented which is an outstanding candidate for future radio systems in NewSpace applications and space avionics. The device being investigated allows programmable re-configuration of RF specifications, where classical software-defined radios (SDR) only define an on-demand re-configuration of the signal processing. RF related configurations are untouched for common SDR and developed discretely by the specific application requirements. Due to the high integrity and complexity of the device under test (DUT), state-of-the-art radiation test procedures are not applicable and customized testing procedures need to be developed. The DUT shows a very robust response to linear energy transfer (LET) values up to 62.5 MeV.cm²/mg, without any destructives events and a moderate soft error rate. Full article