Search Results (22)

There is a growing trend towards vehicles powered by alternative energy sources due to the environmental pollution caused by fossil fuel vehicles. Electric vehicles (EVs) are thought to make a significant contribution to reducing environmental pollution. This study presents a performance comparison of field-oriented control (FOC) and finite control set-based model predictive current control (FCS-MPCC) methods for controlling PMSM motors, which are commonly preferred for EV applications. A multilevel ANPC inverter topology, which has a higher-quality power flow than classical two-level inverters, was preferred to power the PMSM. While the classical FOC method has a fixed switching frequency by including cascaded PI controllers and a pulse width modulation (PWM) modulator, the FCS-MPCC method determines a variable frequency-switching signal that minimizes the cost function by predicting the future current behavior of the PMSM using the mathematical model of the system. The performance comparison of FOC and FCS-MPCC methods was carried out by conducting real-time experimental studies. Both control algorithms were analyzed under variable speed and load conditions using the same motor and drive structure. Performance analysis of FOC and FCS-MPCC control algorithms was carried out in terms of speed tracking, torque, current, and harmonics. According to the results obtained, the total harmonic distortion (THD) value of the stator current was 7.03% in the FOC method, while it was 22.19% in the FCS-MPCC method. Furthermore, a comparative analysis was conducted on the dynamic performance of the two methods in different scenarios using the mean absolute error (MAE), root mean square error (RMSE), integral absolute error (IAE), integrated time absolute error (ITAE), and integral squared error (ISE) criteria. The FCS-MPCC method was observed to be superior in different speed scenarios according to these criteria. In terms of processor load, it was calculated as 17.09% in the FOC method and 63.75% in the FCS-MPCC method. This study is important for determining the control strategy of PMSMs used in EV drives. Full article

This paper presents a systematic experimental comparison of three sliding-mode-based current control strategies—traditional sliding mode control (SMC), fast terminal sliding mode control (FTSMC), and super-twisting sliding mode control (STSMC)—applied to a grid-connected five-level active neutral point clamped flying capacitor (5L-ANPC-FC) inverter. Unlike existing studies that typically investigate a single controller or topology, this work provides a fair, hardware-validated benchmark under identical operating conditions, enabling a clear assessment of convergence speed, harmonic performance, robustness, and implementation complexity. All controllers are designed within a unified framework and their stability is rigorously analyzed using Lyapunov theory. Experimental evaluations are conducted under steady-state operation, step changes in reference current, grid-voltage sag/swell, and DC-link voltage variations. The results demonstrate that while all three controllers ensure robust current tracking and inherent DC-side capacitor voltage balancing without additional control loops, FTSMC achieves the lowest grid-current total harmonic distortion (THD) and fastest convergence. STSMC effectively suppresses chattering, and traditional SMC offers a simple yet reliable baseline solution. The presented findings provide practical design guidelines for selecting appropriate sliding-mode controllers in high-performance multilevel inverter applications. Among the assessed control techniques, FTSMC has the most rapid dynamic response, characterized by a rise time of 0.1 ms and a minimal grid-current THD of 1.95%, indicating exceptional steady-state and transient performance. STSMC markedly diminishes chattering and ripple, attaining a THD of 2.04% with enhanced waveform smoothness relative to traditional SMC. Conversely, traditional SMC offers a more straightforward implementation but demonstrates elevated ripple and THD levels of around 2.29%, along with a peak current inaccuracy of 6–8%. The results underscore the trade-offs between implementation simplicity, dynamic responsiveness, and harmonic performance of the evaluated control techniques. Full article

The non-uniform thermal distribution in the active neutral-point clamped (ANPC) topology causes significant thermal gradients during high-power operation, restricting its use in large-capacity power conversion systems like variable-speed pumped storage. This study introduces a novel hybrid fundamental frequency modulation strategy. Through a dynamic allocation mechanism based on a reference signal, this strategy alternates inner and outer power switches at the fundamental frequency, ensuring balanced switching frequency across devices. Consequently, it effectively mitigates the inherent loss imbalance in conventional ANPC topologies. Quantitative analysis using a power device loss model shows that, compared to conventional carrier phase-shift modulation, the proposed method reduces total system losses by 39.98% and improves the loss-balancing index by 18.27% over inner-switch fundamental frequency modulation. A multidimensional validation framework, including an MW-level hardware platform, numerical simulations, and test data, was established. The results confirm the proposed strategy’s effectiveness in improving power device thermal balance. Full article

This study examines the impact of midpoint voltage fluctuations on the performance of multilevel converters and proposes an advanced control strategy to reduce the required DC bus capacitance while maintaining system stability. The research demonstrates that active voltage imbalance control in active neutral-point-clamped (ANPC) topologies allows for stable operation with significantly reduced capacitor values. A hybrid control approach, combining fuzzy logic control and third-harmonic injection PWM (THIPWM), is developed to enhance voltage balancing, and modulation techniques are systematically optimized. Both simulation and experimental analyses confirm the efficacy of the proposed method, which achieves superior voltage regulation compared to conventional PI-based control schemes. Specifically, experimental results show a reduction in peak-to-peak DC-link voltage fluctuation from 116 V to just 4 V, and the phase current THD is reduced from 3.6% to 0.8%. The results indicate a substantial reduction in voltage fluctuations, contributing to a total harmonic distortion (THD) as low as 0.8%. Furthermore, the proposed strategy facilitates an approximate 26-fold decrease in DC bus capacitor size without compromising system stability. The reduction in capacitance not only lowers the overall system costs and hardware complexity but also improves reliability. The inverter was tested at a rated power of 62.5 kW using 0.3 mF capacitors instead of the theoretically required 7.8 mF. This work advances power electronics by presenting an efficient voltage balancing methodology, offering a cost-effective and robust solution for multilevel converter applications. The findings are validated through comprehensive simulations and experimental tests, ensuring practical applicability. Full article

Considering the cost, efficiency, power density, and other issues of the power electronic system, many papers have mixed the wide-bandgap (WBG) power devices, mainly SiC MOSFET and GaN FET/HEMT, with Si IGBT/MOSFET in the three-level active neutral-point clamped (T-ANPC) topology, forming the hybrid T-ANPC (HT-ANPC) topology. This paper reviews these latest HT-ANPC topologies from the perspective of the material types of switching devices and compares the advantages and disadvantages of various topologies. The potential challenges of HT-ANPC inverters in several mainstream applications are reviewed, and their improvements are compared and discussed in detail. Next, a brief topology selection and design process are provided based on analyzing various typical topologies. In addition, some future research trends on this topic are discussed. The paper will help researchers to select appropriate HT-ANPC topologies in different applications and have a better understanding of the critical issues to be considered during system design. Full article

In this study, we propose an active junction temperature control method specifically tailored for traction inverters based on active neutral point-clamped (ANPC) three-level topology. This approach not only enables real-time junction temperature equalization across switching devices, but also minimizes switching losses while preserving synchronous modulation. The methodology begins with a detailed formulation of the loss quantification model for ANPC inverters, establishing the relationship between predicted losses and switching vectors. Building on this foundation, we develop a loss equalization modulation control strategy featuring closed-loop loss control. The effectiveness and practicality of the proposed control method are rigorously validated using simulations and low-power experimental testing, demonstrating its potential to enhance both the reliability and efficiency of traction inverters. Full article

This paper proposes an Advanced Hybrid SVPWM (Space Vector Pulse Width Modulation) technique that integrates the benefits of RPS-PWM (Reference Point Saturation-Based PWM) and SVPWM to enhance the performance of three-level ANPC (Active Neutral Point Clamped) inverters. While RPS-PWM effectively reduces switching harmonics, it suffers from lower voltage utilization. In contrast, SVPWM achieves higher voltage utilization but struggles with harmonic suppression. The proposed Advanced Hybrid SVPWM technique addresses these limitations by maintaining the voltage utilization level of RPS-PWM while significantly reducing harmonic distortion and increasing the output $V_{rms}$. To validate the effectiveness of the proposed method, comprehensive PSIM simulations and DSP-based hardware experiments were conducted. Experimental results confirm that the Advanced Hybrid SVPWM achieves superior harmonic suppression compared to conventional RPS-PWM and SVPWM, while also delivering improved output voltage characteristics. These findings highlight the potential of the proposed technique for enhancing the performance of power electronic systems requiring high efficiency and low harmonic distortion. Full article

Multilevel inverters with improved voltage quality are widely used in applications such as motor control and electric vehicles. The four-level active neutral point clamped (4L-ANPC) inverter effectively meets the demands for high power density and low device voltage stress. However, balancing the capacitor voltage and reducing its low-frequency voltage fluctuation are critical challenges that need to be addressed. To address these challenges, this paper proposes a “variable reference + zero-sequence injection” method that requires only three reference voltage signals to determine the injected zero-sequence components. Particularly, the expression of the midpoint current, regarding the modulation index and phase current amplitude, is theoretically derived. This reveals the fundamental connection between the zero-sequence voltage signal and the midpoint current, providing a theoretical foundation for the zero-sequence injection method in four-level inverters. Subsequently, a simulation model and an experimental platform of the 4L-ANPC inverter were developed to compare and analyze the waveforms of the upper and lower capacitor voltages, phase currents, and line voltages under different modulation methods. Additionally, the upper and lower capacitor voltage waveforms were examined for various modulation indices. The results indicate that as the modulation index increases, the low-frequency voltage fluctuation in the upper and lower capacitor voltages also rises. At a modulation index of 0.95, the “variable reference + zero-sequence injection” method effectively suppresses the fluctuation in the upper and lower capacitor voltages to be no more than 1 V. These experimental findings validate the effectiveness of the proposed method. Full article

Voltage source inverters are extensively used in the grid connection of renewable energy-sourced generators, and multilevel converters, in particular, have attracted a great deal of attention in recent years. This paper investigates the application of a novel passivity-based sliding mode (PSM) control scheme on three-level grid-tie active Neutral-Point-Clamped (ANPC) inverters that yield fast and stable responses to grid impedance variations. Simulation studies confirm that this control scheme can produce high tracking performance and is also robust against grid load variations. Furthermore, to enhance ANPC efficiency, the loss distribution of switching devices controlled by the proposed strategy is evaluated. An optimal scheme is finally proposed for allocating silicon and Wide-Band-Gap switching devices, resulting in a hybrid ANPC inverter capable of achieving a desirable trade-off between the power losses and the device cost. Full article

Conventional 5-level active neutral-point-clamped (5L-ANPC) topology and state-of-the-art 5-level hybrid active neutral-point-clamped (5L-HANPC) topology are popular for inverter applications. However, their dc-link voltage utilization is limited to only 50%. With the maximum voltage level generated by only half dc-link voltage, these inverters are not capable of boosting voltage in their ac output. To resolve these drawbacks, this paper proposes a family of four novel 5-level boost-active neutral-point-clamped (5L-BANPC) inverters. Without requiring any flying capacitors, the proposed topologies can generate five voltage levels by effectively using the dc-link capacitors. The dc-link voltage utilization of the proposed 5L-BANPC inverters is twice that of the 5L-ANPC and 5L-HANPC topologies. While generating the five-level ac output voltage, natural voltage balancing of both dc-link capacitors and voltage boosting are achieved. Ease of implementation is another noteworthy merit of the proposed 5L-BANPC inverters because they can be implemented using six widely available commercial half-bridge modules without requiring a dedicated circuit design. The operation of the proposed topologies is analyzed. Experimental results are presented for verification. Full article

Currently, the escalating integration of renewable energy sources is causing a steady weakening of grid strength. When grid strength is weak, interactions between inverters or those between inverters and grid line impedance can provoke widespread oscillations in the power system. Additionally, the diverse DC voltage application characteristics of power converter systems (PCS) may lead to over-modulation, generating narrow pulse issues that further impact control of the midpoint potential balance. Existing dead-time elimination methods are highly susceptible to current polarity judgments, rendering them ineffective in practical use. PCS, due to inherent dead-time effects, midpoint potential imbalances in three-level topologies, and narrow pulses, can elevate low-order harmonic content in the output voltage, ultimately distorting grid-connected currents. This is particularly susceptible to causing resonance in weak grids. To enhance the output voltage waveform of PCS, this article introduces a comprehensive compensation control strategy that combines dead-time elimination, midpoint potential balance, and narrow pulse suppression, all based on an active neutral point clamped (ANPC) three-level topology. This strategy gives precedence to dead-time elimination and calculates the upper and lower limits of the zero-sequence available for midpoint potential balance while fully compensating for narrow pulses. By prioritizing dead-time elimination, followed by narrow pulse suppression and finally midpoint potential balance, this method decouples the coupling between these three factors. The effectiveness of the proposed method is validated through semi-physical simulations. Full article

In this paper, a two-leg-transfer switch structure method that can continuously supply three-phase power even when an accident occurs in a power semiconductor of a three-level active neutral-point-clamped (ANPC) inverter for railway vehicles is presented. The proposed method can minimize the ripple effect caused by power semiconductor faults by separating the faulty leg from the main circuit and connecting the load-side circuit to a neutral point. As a result of simulations, the average values of MAE and RMSE can be reduced by 1.53 [A] and 1.77 [A], respectively, when using the proposed leg-transfer switch structure compared to using the conventional structure. In the IGBT failure experiment, when the proposed method was applied to a three-level ANPC inverter, there was only a 0.21 [%] difference from the THD under normal conditions. As a result, the magnitude, phase, and total harmonic distortion of the three-phase current waveforms measured before and after the fault were identical. Thus, normal three-phase power could be effectively supplied to the load when the proposed leg-transfer switch method was applied after a power semiconductor fault occurred in the three-level ANPC inverter. If this leg-transfer switch method is applied in three-level ANPC inverterd for railway vehicles, track schedule errors can be minimized by continuously supplying three-phase power to the electric motor even when an accident occurs in a power semiconductor. Full article

Targeting the issue of high losses of individual switching tubes in Neutral-Point Clamped (NPC) three-level inverters, an Active Neutral-Point Clamped (ANPC) three-level inverter is used, and a model predictive control strategy using the loss equalization of the inverter is proposed. This method organizes and analyzes multiple zero-state current pathway commutation modes and adds mode three under the original two commonly used zero-state commutation modes. On this basis, the three modes are flexibly switched by model predictive control, and the output is optimized according to the value function for the space vector in each operation, while the midpoint voltage control is added to the value function. The simulation results suggest that the recommended strategy in this study may effectively realize the loss equalization control and midpoint voltage control of the ANPC inverter, which improves the operation efficiency of the electromechanical actuator. Full article

With the development of the photovoltaic industry; there will be an increasing demand for efficient, high-power density, and low-cost grid interface converters. Compared with two-level inverters, multilevel inverters have the following advantages: (1) lower device voltage ratings; (2) better output filtering spectrum; (3) lower electromagnetic interference (EMI) noise; and (4) higher switching speed capability. However, the complex switching circuit of the multilevel inverter will bring more parasitic inductance, resulting in severe switching overvoltage (ringing). Especially in order to reduce the cost of the inverter, using the long-loop modulation mode, the commutation loop will introduce more parasitic inductance, which will make the overvoltage more serious. Consider that commonly used overvoltage absorption schemes are effective only for overvoltage or suppression of oscillations. Therefore, a new overvoltage absorption circuit is proposed in this paper, which can not only alleviate the overvoltage and ringing phenomena but also suppress the effect of voltage jumps during low-frequency switching on high-frequency input voltage. This overvoltage absorption circuit is characterized by low overvoltage, fast ringing damping, and minimum capacitance. Experiments and simulations are conducted to verify the effectiveness of this overvoltage absorption circuit using a three-level ANPC inverter as a prototype. The results show that the proposed overvoltage absorption circuit can significantly reduce the overvoltage level, shorten the oscillation time, and reduce the voltage difference between the upper and lower DC bus capacitors. Full article

Increased performance requirements in new power electronics areas of application, such as electric aircraft, make innovations on different design levels necessary. In order to quickly compare different topologies, analytical loss equations provide a fast and straightforward way to narrow down the possible solution space. The approach widely used in the literature results in long and complex terms, which can only be compared between different literature sources with great effort. Moreover, the literature lacks a detailed summarizing description of these analytical equations and their derivation, starting from the standard two-level VSI up to three-level midpoint clamped inverter topologies, such as the ANPC topology in its different modulation schemes. The application of such higher-level inverter topologies allows hybrid device configurations to become performant solutions. This work aims to give a closed-form description of the analytical loss modeling and the theoretical background and provide an implementation approach for a wide span of inverter topologies and for different modulation methods. Full article