Recent Advances in Field-Effect Transistors: Materials, Devices, and Emerging Applications

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D1: Semiconductor Devices".

Deadline for manuscript submissions: 30 June 2026 | Viewed by 3222

Special Issue Editor


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Guest Editor
1. Hangzhou Institute of Technology, Xidian University, Hangzhou 311231, China
2. Faculty of Integrated Circuits, Xidian University, Xi’an 710071, China
Interests: field-effect transistor; high mobility device; reliability research; memory device; artificial intelligence application

Special Issue Information

Dear Colleagues,

We are pleased to invite you to contribute to this Special Issue titled “Recent Advances in Field-Effect Transistors: Materials, Devices, and Emerging Applications”. Field-effect transistors are the fundamental building blocks of modern electronic systems, from logic circuits and memory arrays to emerging neuromorphic and quantum devices. With the continued scaling of CMOS technology approaching its physical and economic limits, a wide range of innovations—spanning new materials, device architectures, and operation paradigms—are being actively pursued. These developments aim to overcome current challenges in power consumption, performance, integration, and functionality.

This Special Issue aims to bring together recent breakthroughs and state-of-the-art developments in the field of FETs, broadly covering both conventional CMOS logic transistors and emerging devices. Contributions that explore new channel materials (e.g., 2D semiconductors, III-Vs, and Ge), gate stack engineering, ferroelectric and negative-capacitance FETs, steep-slope transistors, and advanced integration schemes (e.g., 3D stacking, CFETs, and BEOL-compatible logic) are especially welcome. This Special Issue also seeks to highlight advances in modeling, reliability, variability analysis, and applications in AI, RF, and sensing.

This Special Issue aligns with the journal’s scope by focusing on foundational and applied research in semiconductor device physics, fabrication, modeling, and novel architectures.

In this Special Issue, original research articles and comprehensive review papers are welcome. Research areas may include (but are not limited to) the following:

  • Gate-all-around (GAA) and nanosheet FETs for sub-3 nm nodes;
  • High-mobility channel materials (e.g., Ge, SiGe, III-V, and 2D TMDs);
  • Ferroelectric and negative capacitance FETs for low-power logic;
  • Tunnel FETs and steep-slope transistors;
  • Advanced gate stack and contact engineering;
  • BEOL-compatible and 3D-integrated logic FETs;
  • Variability, reliability, and aging in advanced FETs;
  • Compact modeling and TCAD simulation for emerging transistors;
  • FET applications in neuromorphic, RF, flexible, and sensing platforms.

We look forward to receiving your contributions and to advancing the frontier of field-effect transistor technology together.

Prof. Dr. Xiao Yu
Guest Editor

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Keywords

  • field-effect transistors
  • CMOS scaling
  • novel channel materials
  • ferroelectric FETs
  • steep-slope devices
  • nanosheet FETs
  • device modeling
  • gate stack engineering
  • 2D materials
  • emerging logic devices

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Published Papers (4 papers)

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Research

15 pages, 3632 KB  
Article
Parasitics-Aware Quantum Transport Simulation of Stacked Si Nanosheet LGAA-nFETs for Sub-2 nm Node RF Applications
by Qi Shen, Shuo Zhang, Zhi-Fa Zhang, Wenchao Chen, Zekai Zhou, Sichao Du, Hao Xie and Wen-Yan Yin
Micromachines 2026, 17(2), 240; https://doi.org/10.3390/mi17020240 - 12 Feb 2026
Viewed by 433
Abstract
This work presents a comprehensive quantum transport modeling and simulation framework to evaluate parasitic effects and radio frequency (RF) performance in stacked silicon (Si) nanosheet (NS) lateral gate-all-around (LGAA) nFETs targeting the sub-2 nm technology node. Leveraging the non-equilibrium Green’s function (NEGF) method, [...] Read more.
This work presents a comprehensive quantum transport modeling and simulation framework to evaluate parasitic effects and radio frequency (RF) performance in stacked silicon (Si) nanosheet (NS) lateral gate-all-around (LGAA) nFETs targeting the sub-2 nm technology node. Leveraging the non-equilibrium Green’s function (NEGF) method, the proposed framework integrates detailed modeling of parasitic resistances (Rpara) and capacitances (Cpara) to enable a holistic analysis of both intrinsic and extrinsic figures-of-merit, including transconductance (gm), output conductance (gd), cutoff frequency (fT), and maximum oscillation frequency (fmax). The effects of nanosheet geometry, crystal orientations, and dual-k spacers on high-frequency performance are systematically investigated. The analysis reveals key design trade-offs, with optimized device configurations yielding fT exceeding 400 GHz and fmax approaching 1.2 THz. These findings highlight the potential of stacked NS LGAA-nFETs for future millimeter-wave and terahertz applications, providing critical insights into parasitics management and quantum-transport-aware design strategies at advanced CMOS nodes. Full article
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17 pages, 5627 KB  
Article
Thermal Management with AlN Passivation in AlGaN/GaN HEMTs with an Air Gap Gate for Improved RF Performance: A Simulation Study
by Young-Hyun Won, Tae-Sung Kim, Jae-Hun Lee, Chae-Yun Lim, Byoung-Gue Min, Dong-Min Kang and Hyun-Seok Kim
Micromachines 2026, 17(1), 92; https://doi.org/10.3390/mi17010092 - 10 Jan 2026
Cited by 1 | Viewed by 743
Abstract
This study introduces an air gap gate with AlN passivation to enhance the radio frequency (RF) performance of AlGaN/GaN high-electron-mobility transistors (HEMTs) while addressing thermal challenges. The air gap gate improves RF performance by reducing gate capacitance, resulting in a 23.9% increase in [...] Read more.
This study introduces an air gap gate with AlN passivation to enhance the radio frequency (RF) performance of AlGaN/GaN high-electron-mobility transistors (HEMTs) while addressing thermal challenges. The air gap gate improves RF performance by reducing gate capacitance, resulting in a 23.9% increase in cutoff frequency (35.82 GHz) and enhancing saturation drain current and maximum transconductance by 3.7% and 10.27%, respectively, compared to a 0.15 μm planar gate baseline. However, reduced heat dissipation degrades thermal performance, as reflected in higher thermal resistance and temperature gradients. Incorporating high thermal conductivity AlN passivation mitigates these drawbacks, lowering operating temperatures and improving heat distribution, while maintaining a 17.5% cutoff frequency improvement over the baseline. These results demonstrate that the air gap gate with AlN passivation provides an effective strategy for achieving reliable, high-performance AlGaN/GaN HEMTs under high-frequency and high-power operations. Full article
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16 pages, 2561 KB  
Article
Study of 3C-SiC Power MOSFETs
by Hamid Fardi
Micromachines 2025, 16(12), 1406; https://doi.org/10.3390/mi16121406 - 14 Dec 2025
Viewed by 767
Abstract
This work presents the simulation and design of 3C-SiC power MOSFETs, focusing on critical parameters including avalanche impact ionization, breakdown voltage, bulk and channel mobilities, and the trade-off between on-resistance and breakdown voltage. The device design is carried out by evaluating the blocking [...] Read more.
This work presents the simulation and design of 3C-SiC power MOSFETs, focusing on critical parameters including avalanche impact ionization, breakdown voltage, bulk and channel mobilities, and the trade-off between on-resistance and breakdown voltage. The device design is carried out by evaluating the blocking voltage of scaled structures as a function of the blocking layer’s doping concentration. To mitigate edge-effect breakdown at the p-well/n-drift interface, a step-profile doping strategy is employed. Multiple transistor layouts with varying pitches are developed using a commercially available device simulator. Results are benchmarked against a one-dimensional analytical model, validating the on-state resistance, current–voltage behavior, and overall accuracy of the simulation approach. For the selected material properties, simulations predict that a 600 V 3C-SiC MOSFET achieves an on-state resistance of 0.8 mΩ·cm2, corresponding to a 7 μm drift layer with a doping concentration of 1 × 1016 cm−3. Full article
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11 pages, 2232 KB  
Article
Research on Radiation-Hardened RCC Isolated Power Supply for High-Radiation-Field Applications
by Xiaojin Lu, Hong Yin, Youran Wu, Lihong Zhu, Ke Hong, Qifeng He, Ziyu Zhou and Gang Dong
Micromachines 2025, 16(10), 1135; https://doi.org/10.3390/mi16101135 - 30 Sep 2025
Cited by 2 | Viewed by 728
Abstract
A radiation-hardened RCC (Ring Choke Converter) isolated power supply design is proposed, which provides an innovative solution to the challenge of providing stable power to the PWM controller in DC-DC converters under nuclear radiation environments. By optimizing circuit architecture and component selection, and [...] Read more.
A radiation-hardened RCC (Ring Choke Converter) isolated power supply design is proposed, which provides an innovative solution to the challenge of providing stable power to the PWM controller in DC-DC converters under nuclear radiation environments. By optimizing circuit architecture and component selection, and incorporating transformer isolation and dynamic parameter compensation technology, the RCC maintains an 8.9 V output voltage after exposure to neutron irradiation of 3 × 1013 n/cm2, significantly outperforming conventional designs with a failure threshold of 1 × 1013 n/cm2. For the first time, the degradation mechanisms of VDMOS devices under neutron irradiation during switching operations are systematically revealed: a 32–36% reduction in threshold voltage (with the main power transistor dropping from 5 V to 3.4 V) and an increase in on-resistance. Based on these findings, a selection criterion for power transistors is established, enabling the power supply to achieve a 2 W output in extreme environments such as nuclear power plant monitoring and satellite systems. The results provide a comprehensive solution for radiation-hardened power electronics systems, covering device characteristic analysis to circuit optimization, with significant engineering application value. Full article
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