Special Issue "Low Power Hardware Security"

A special issue of Journal of Low Power Electronics and Applications (ISSN 2079-9268).

Deadline for manuscript submissions: closed (31 October 2018).

Special Issue Editor

Guest Editor
Prof. Ioannis Savidis Website E-Mail
Integrated Circuits and Electronics (ICE) Design and Analysis Laboratory, Drexel University, Philadelphia, PA, USA
Interests: on-chip power management; 3-D Integration; hardware security and trust; analog circuit security

Special Issue Information

Dear Colleagues,

The globalization of the integrated circuit (IC) supply chain has resulted in increased concern for the authenticity and security of components included in anything from consumer electronics to the most sensitive circuits managing our financial and military systems. Of particular concern is the reliance on third-party entities for tasks that range from circuit design to the fabrication and packaging of the IC. An untrusted third-party is capable of intellectual property (IP) theft, IC counterfeiting, IC overproduction, and the insertion of malicious circuitry (hardware Trojans). Even less sinister, but of equal concern, companies in competitive markets often seek the tiniest of advantages, which incentivizes reverse engineering of a competing product. Therefore, there has been significant effort in the past decade to advance many aspects of hardware security, with diverse topics that range from the development of novel security primitives and circuit techniques to the mathematical proofing and validation of implemented security measures.

As the protection of the integrated circuit supply chain is of critical importance, this Special Issue of the JLPEA is dedicated to advances in all aspects of hardware security and trust. Original contributions from the following non-exhaustive list of topics are solicited:

  • Hardware Trojan attacks, detection, and countermeasures
  • Hardware obfuscation and reverse engineering
  • Metrics, assessment, and security policies
  • Hardware security primitives (TRNGs, PUFs)
  • Fault injection, detection, and mitigation
  • Reconfigurable devices for security
  • System-on-chip and FPGA security
  • Machine learning for hardware security
  • Security for emerging technologies
  • Architectural security methods
  • Trustworthy manufacturing (split manufacturing, 2.5/3-D integration)
  • Security for IoT, automotive, and cyber-physical system
  • Side-channel attacks and protections
  • Analog circuit security
Prof. Ioannis Savidis
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All papers will be peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Journal of Low Power Electronics and Applications is an international peer-reviewed open access quarterly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 1000 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • Hardware security and trust
  • Integrated circuit protection
  • Attack vectors and countermeasures
  • Security metrics and assessment

Published Papers (1 paper)

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Research

Open AccessArticle
Security Implications for Ultra-Low Power Configurable SoC FPAA Embedded Systems
J. Low Power Electron. Appl. 2018, 8(2), 17; https://doi.org/10.3390/jlpea8020017 - 05 Jun 2018
Cited by 2
Abstract
We discuss the impact of physical computing techniques to classifying network security issues for ultra-low power networked IoT devices. Physical computing approaches enable at least a factor of 1000 improvement in computational energy efficiency empowering a new generation of local computational structures for [...] Read more.
We discuss the impact of physical computing techniques to classifying network security issues for ultra-low power networked IoT devices. Physical computing approaches enable at least a factor of 1000 improvement in computational energy efficiency empowering a new generation of local computational structures for embedded IoT devices. These techniques offer computational capability to address network security concerns. This paper begins the discussion of security opportunities for, and issues using, FPAA devices for small embedded IoT platforms. These FPAAs enable devices often utilized for low-power context aware computation. Embedded FPAA devices have both positive Security attributes, as well as potential vulnerabilities. FPAA devices can be part of the resulting secure computation, such as implementing unique functions. FPAA devices can be used investigate security of analog/mixed signal capabilities. The paper concludes with summarizing key improvements for secure ultra-low power embedded FPAA devices. Full article
(This article belongs to the Special Issue Low Power Hardware Security)
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