Advances in Analog and RF Circuit Design

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 15 February 2026 | Viewed by 1645

Special Issue Editor


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Guest Editor
School of Information Communications Convergence Engineering, Chungnam National University, Daejeon 34134, Republic of Korea
Interests: delta–sigma modulation; CMOS integrated circuits; operational amplifiers; resonator filters; switching convertors; CMOS digital integrated circuits; DC-DC power convertors; analog–digital
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Special Issue Information

Dear Colleagues,

Analog and radiofrequency (RF) circuit design remains a cornerstone of modern electronics, enabling critical functionality in applications ranging from wireless communication and sensor interfaces to biomedical systems and high-performance computing. As digital systems continue to scale and diversify, the demand for robust, power-efficient, and high-performance analog and RF front ends is greater than ever.

Recent advances in circuit design methodologies, device modeling, and system-level integration have opened up new possibilities for performance optimization, noise reduction, bandwidth extension, and ultra-low-power operation. At the same time, emerging application areas such as 6G communications, quantum systems, wearable health monitoring, and automotive radar are driving innovation in analog/RF design far beyond the traditional paradigms.

This Special Issue aims to present the latest progress in analog and RF circuit design, with an emphasis on novel architectures, design techniques, modeling approaches, and circuit implementations. We invite submissions that address challenges and breakthroughs in the design of low-noise amplifiers, mixers, power amplifiers, phase-locked loops, data converters, and other key building blocks, particularly in the context of system integration and real-world application. Topics of interest include, but are not limited to the following:

  • Analog and RF circuit design;
  • Data converters, phase-locked loop, voltage-controlled oscillator, and sensor interface circuit;
  • Low-noise amplifier and mixer and power amplifier;
  • Key building blocks for analog/RF circuits;

I look forward to receiving your contributions.

Prof. Dr. Youngkyun Cho
Guest Editor

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Keywords

  • analog circuit design
  • radio frequency (RF) circuit design
  • data converters
  • phase-locked loops (PLLs)
  • voltage-controlled oscillators (VCOs)
  • sensor interface circuits
  • low-noise amplifiers (LNAs)
  • mixers and power amplifiers
  • high-frequency amplifiers
  • key building blocks for analog/RF circuits

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Published Papers (2 papers)

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12 pages, 3747 KB  
Article
Design of a Sub-6 GHz CMOS Power Amplifier with a High-Q Glass Transformer for Off-Chip Output-Matching Networks
by Jaeyong Lee, Jong-Min Yook, Jinho Yoo and Changkun Park
Electronics 2025, 14(21), 4261; https://doi.org/10.3390/electronics14214261 - 30 Oct 2025
Viewed by 396
Abstract
This paper investigates and evaluates a compact, high-Q glass transformer with a 3D spiral structure that offers low loss and high area efficiency. Furthermore, we designed a CMOS power amplifier (PA) with an output-matching network implemented using an off-chip high-Q glass transformer to [...] Read more.
This paper investigates and evaluates a compact, high-Q glass transformer with a 3D spiral structure that offers low loss and high area efficiency. Furthermore, we designed a CMOS power amplifier (PA) with an output-matching network implemented using an off-chip high-Q glass transformer to validate its operation. Two transformer types were developed: a five-port transformer with a center-tap and a four-port transformer without a center tap. The high-Q property of the transformer leads to low loss and tight coupling, as evidenced by an increase in maximum available gain (MAG). Compared with an integrated CMOS transformer, the high-Q transformer exhibits significantly lower loss while maintaining similar area and inductance, despite being an external component. A test PA comprising the CMOS PA and the off-chip transformer was evaluated with simulations and measurements, and it was also compared with a fully integrated PA at the simulation level to verify performance improvements. The proposed PA achieved a saturation power of 29.8 dBm, which was 1.7 dB higher than that of the fully integrated PA. The PAE also improved by 11 percentage points, from 32.1% to 43.1% in simulation. The results show substantial performance gains in simulation, while the total area increases only slightly. Measurements show the same trend as the simulations; with shorter bond-wire lengths, the measured results are expected to approach the simulated performance. These findings demonstrate the feasibility of an ultra-compact CMOS–off-chip hybrid PA that delivers high performance while maintaining a footprint comparable to that of a fully integrated PA, enabling applications in compact devices including mobile products. Full article
(This article belongs to the Special Issue Advances in Analog and RF Circuit Design)
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22 pages, 1308 KB  
Article
Capacitor-Less LDO with Fast Transient Response Implemented via Bulk-Driven Technique
by Yuxin Li, Shijindian Tang, Xiao Zhao and Yanlong Liu
Electronics 2025, 14(18), 3617; https://doi.org/10.3390/electronics14183617 - 12 Sep 2025
Viewed by 963
Abstract
Improving the transient response performance is a critical challenge in low-dropout regulator (LDO) design. This paper proposes a novel on-chip capacitor-less LDO based on substrate technology implemented in an SMIC (Semiconductor Manufacturing International Corporation) 0.18 μm CMOS (complementary metal oxide semiconductor technology) process. [...] Read more.
Improving the transient response performance is a critical challenge in low-dropout regulator (LDO) design. This paper proposes a novel on-chip capacitor-less LDO based on substrate technology implemented in an SMIC (Semiconductor Manufacturing International Corporation) 0.18 μm CMOS (complementary metal oxide semiconductor technology) process. Central to this innovation is a fast response loop between the PMOS driver’s body and gate, which leverages the body effect to enhance driver control without complex bulk-driven techniques. The proposed LDO achieves a quiescent current of 4.5 μA, an efficiency of 88%, an overshoot/undershoot of 12mV/22mV, and a settling time of 1.2 μs. The comparative analysis confirms that this structure increases the maximum load current and reduces the loop response time relative to those for conventional LDOs. These results validate a significant improvement in the transient performance, marking an important advance in integrated voltage regulator technology. Full article
(This article belongs to the Special Issue Advances in Analog and RF Circuit Design)
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