New Trends for Power Optimizations in FPGA-Based Embedded Systems
A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".
Deadline for manuscript submissions: 15 October 2025 | Viewed by 25
Special Issue Editors
Interests: reconfigurable computing; electronic design automation; software-defined hardware
Special Issues, Collections and Topics in MDPI journals
Interests: cryptography; field programmable gate arrays; microprocessor chips; reconfigurable architecture
Special Issues, Collections and Topics in MDPI journals
Special Issue Information
Dear Colleagues,
The aim of this Special Issue is to bring together the latest research and developments in power optimizations for field programmable gate array (FPGA)-based embedded systems. With the increasing demand for energy-efficient computing in various applications, from portable devices to industrial control systems, understanding and implementing effective power optimization techniques in FPGA-based embedded systems is crucial. This Special Issue aims to provide a platform for researchers and practitioners to share their insights and findings, ultimately driving the progress of power-efficient FPGA-based embedded system design.
The scope encompasses a wide range of aspects related to power optimizations in FPGA-based embedded systems. It includes both theoretical studies exploring new algorithms and models for power analysis and prediction, as well as practical implementation and evaluation of power-saving techniques. Papers within this Special Issue cover different levels of the design flow, from high-level system architecture to low-level circuit design.
This Special Issue will focus on (but is not limited to) the following topics:
- Power-aware design methodologies: Novel approaches for designing FPGA-based embedded systems with power consumption as a primary consideration. This may involve techniques such as power aware floor planning, placement, and routing.
- Dynamic power management: Strategies for reducing dynamic power consumption during the operation of FPGA based systems, including clock gating, voltage scaling, and power gating techniques.
- Low-power FPGA architectures: Exploration of new FPGA architectures that inherently consume less power, such as those with optimized logic elements and interconnect structures.
- Power optimization in application-specific FPGA designs: Case studies and techniques for optimizing power in FPGA-based implementations of specific applications like image processing, wireless communication, and automotive electronics.
Prof. Andrea Guerrieri
Dr. Mohamed El-Hadedy Aly
Guest Editors
Manuscript Submission Information
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Keywords
- FPGA-based embedded systems
- power optimization
- power management
- architectural optimization
- low-power design
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