Review Reports

Round 1

Reviewer 1 Report

This paper is introducing new PUF design which is implemented and tested in real hardware.

The author made clear explanations of the basic idea and contributions of  paper and I recommend it for acceptance  with no any comments

Reviewer 2 Report

Cloning of electronic components are increasing rapidly due to outsourcing. Due to advances in nano-technologies, it is getting impossible to clone chips, whereas cloning PCBs are still possible.

To avoid cloning of hardware, physical unclonable functions (PUF) are used. However, they are typically implemented in silicon.  In this paper, the authors propose a method to extend this feature to PCB, thereby making cloning impossible.

Strengths of the paper:

• The Paper is well written and the concepts are well synthesised.
• Section 2 presents a concise background to this problem and the current state-of-art.
• Section 3 presents their methodology and evaluated through simulation in Section 4 and experimental results.

In order to improve the overall presentation, the following suggestions may be considered:

• Why 1, 2, 3GhZ are used
• Is there a general derivable closed formula in terms of L1, L2, S1, W2 and G1 and turning parameters?
• How to avoid the generation of possible noise during bit string generation?
• How to ensure that NotchPUF cannot be bypassed.

Author Response

Reviewer 1
==========
Point 1: Why 1, 2, 3GhZ are used?

Response 1:
1, 2, and 3 GHz were used to provide enough separation for each individual NotchPUF structure. By doing this, we can prevent any possible attenuation
aliasing from the response of the adjacent filters. From Table 1, we see that the fractional bandwidth (FBW) ranges from 13-17%. At 2Ghz, the filter
response spans just about 350MHz, and gets slightly wider with the 3GHz structure. To decrease this, optimization to more than just the L1 physical
length parameter would be needed.

Will add clarification to why these 3 frequencies were chosen to paper.

Point 2: Is there a general derivable closed formula in terms of L1, L2, S1, W2 and G1 and turning parameters?

Response 2:
To maximize the effect of variations, L2, S1, W2 and G1 needed to be constant and were set to the minimum accepted by the manufacturer. In addition,
the number of "fingers" was also chosen to be constant at 6. From this, we are able to use Eq(1) to estimate the size needed for W1 to achieve close
to the desired capacitance. This structure can be also be tuned by varying the length of S1, but because this was at a constant minimum length, L1 was used
to tune each structure. The NotchPUF response of length changes (L1), has a logarithmic correlation to the frequency response as shown in Figure 3. After using
eq (1), we were able to get a design close enough to move into simulations to optimize L1. So because of this, we determined that an equation for capacitance
approximation proved to be far more useful for optimization.

Point 3: How to avoid the generation of possible noise during bit string generation?

Response 3:
With the NotchPUF, the bitstrings that had the most amount of noise were those that had the greatest amount of attenuation. Those that had the most
attenuation, had close to the optimal characteristics (trace width, spacing, Er, etc). Because this filter response is so sharp, the measured data
points tend to get scattered more along the y axis by up to 2dB. To avoid this, each structure could be tuned slightly past the optimal
physical dimensions to ensure a smoother response from the NotchPUF structures.

By embedding the NotchPUF into internal layers, we could help shield it by be adjacent to a ground plane if we were concerned about any coupled RF noise.
Eliminating noise entirely is infeasible, especially for a PUF of this type. Because of this, there are many solid error correction schemes such as :
Yu, M.D.; Devadas, S. Secure and Robust Error Correction for Physical Unclonable Functions’ Design511Test of Computers2010,27, 48–65. doi:10.1109/MDT.2010.25.
Helper data would be added in addition to the generated bitstring in this scenario, but the added benefit of error correction works very well for these types
of PUFs.

Point 4: How to ensure that NotchPUF cannot be bypassed.

Response 4:
Embedding the NotchPUF into internal PCB signal planes would greatly help in this regard. In addition to relocating to an internal layer, adjacent ground planes
can be used to help shield from tampering. If done, the NotchPUF can get smaller due to the closer proximity to the ground plane (vs 1.6mm apart on a 2-layer PCB).
Therefore, any modification to the surrounding ground planes would significantly change the NotchPUF response. I provide some detail on this in the paragraph right
before section 6.3 bitstring analysis.

Reviewer 3 Report

Please refer to the attached pdf file.

Comments for author File: Comments.pdf

Author Response

Reviewer 2
===========
Point 1: In the introduction, I think that it would be interesting to add some more facts about
counterfeiting of electronic components. Could the Authors provide some more information
about this issue and its impact on global production, possibly citing some industrial
engineering journals and magazines (just to make an example, the Authors could try to
insert some statement like "counterfeiting caused a damage of X billions dollars to company
around the world in 2018")?

Response 1:
I concur. I will make this introduction stronger by including a few of the many references I have on exactly this.
eg: Horvath, B. T.
Not All Parts Are Created Equal: The Impact Of Counterfeit Parts In The Air Force Supply Chain
Air War College, Air University Maxwell AFB United States, Air War College, Air University Maxwell AFB United States, 2017

Point 2: In lines 40-42, the Authors state that "we design the filters’ dimensions to the minimum
design rule sizes supported by the fabrication house, thereby maximizing the amount of
manufacturing variation effects."
It would be useful to provide a bit more details about how the minimum design leads to a
maximization in the manufacturing variation effects.

Response 2:
Based on the manufacturer tolerances of +/-20% for these boards, we found this percentage to be slightly misleading. For example, on this NotchPUF board, length L3
was 3.0mm. Using the same analysis on that of the interdigital fingers, we determined that this had a 3 sigma variation of approximately .03 mm as well. From simulations,
this .03mm variation on the Port1/2 and resonator connections had very little to no impact on the NotchPUF response. Now, this same variation on the .2mm trace widths
had a significantly high impact on the NotchPUF response, often shifting by up to 70MHz (in simulations).

I will provide some additional details in section 5.1 trace width variations.

Point 3: In my opinion, the final section would profit from including a discussion about possible
directions of future research, which is currently missing. This could provide useful and
represent a source of inspiration for interested readers who intends to build upon the
presented results.

Response 3:
I concur. Will add some details about various future directions that can be taken to further improve.

Point 4:Line 330: please improve the aspect of the formula included in the line (e.g., separating dB)

Response 4:
I concur. Will fix.