Next Article in Journal / Special Issue
Bias-Flip Technique for Frequency Tuning of Piezo-Electric Energy Harvesting Devices
Previous Article in Journal / Special Issue
A Digital Auto-Zeroing Circuit to Reduce Offset in Sub-Threshold Sense Amplifiers
Open AccessArticle

Reconfigurable Threshold Logic Gates using Memristive Devices

Department of Electrical and Computer Engineering, Boise State University, 1910 University Drive, Boise, ID 83725, USA
*
Authors to whom correspondence should be addressed.
J. Low Power Electron. Appl. 2013, 3(2), 174-193; https://doi.org/10.3390/jlpea3020174
Received: 4 February 2013 / Revised: 4 April 2013 / Accepted: 25 April 2013 / Published: 24 May 2013
(This article belongs to the Special Issue Selected Papers from SubVt 2012 Conference)
We present our design exploration of reconfigurable Threshold Logic Gates (TLG) implemented using silver–chalcogenide memristive devices combined with CMOS circuits. Results from simulations and physical circuits are shown. A variety of linearly separable logic functions including AND, OR, NAND, NOR have been realized in discrete hardware using a single-layer TLG. The functionality can be changed between these operations by reprogramming the resistance of the memristive devices. View Full-Text
Keywords: memristors; threshold logic gates; reconfigurable circuits memristors; threshold logic gates; reconfigurable circuits
Show Figures

Figure 1

MDPI and ACS Style

Rothenbuhler, A.; Tran, T.; Smith, E.H.B.; Saxena, V.; Campbell, K.A. Reconfigurable Threshold Logic Gates using Memristive Devices. J. Low Power Electron. Appl. 2013, 3, 174-193.

Show more citation formats Show less citations formats

Article Access Map by Country/Region

1
Only visits after 24 November 2015 are recorded.
Back to TopTop