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Threshold Voltage Degradation for n-Channel 4H-SiC Power MOSFETs

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Facultad de Informática y Electrónica, Escuela Superior Politécnica del Chimborazo (ESPOCH), Riobamba 060150, Ecuador
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Sistemas de Comunicaciones y Electrónica Aplicada (SICOMEL), Universidad Nacional de Chimborazo (UNACH), Riobamba 060151, Ecuador
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Author to whom correspondence should be addressed.
J. Low Power Electron. Appl. 2020, 10(1), 3; https://doi.org/10.3390/jlpea10010003
Received: 16 November 2019 / Revised: 27 December 2019 / Accepted: 3 January 2020 / Published: 8 January 2020
In this study, threshold voltage instability on commercial silicon carbide (SiC) power metal oxide semiconductor field electric transistor MOSFETs was evaluated using devices manufactured from two different manufacturers. The characterization process included PBTI (positive bias temperature instability) and pulsed IV measurements of devices to determine electrical parameters’ degradations. This work proposes an experimental procedure to characterize silicon carbide (SiC) power MOSFETs following two characterization methods: (1) Using the one spot drop down (OSDD) measurement technique to assess the threshold voltage explains temperature dependence when used on devices while they are subjected to high temperatures and different gate voltage stresses. (2) Measurement data processing to obtain hysteresis characteristics variation and the damage effect over threshold voltage. Finally, based on the results, it was concluded that trapping charge does not cause damage on commercial devices due to reduced value of recovery voltage, when a negative small voltage is applied over a long stress time. The motivation of this research was to estimate the impact and importance of the bias temperature instability for the application fields of SiC power n-MOSFETs. The importance of this study lies in the identification of the aforementioned behavior where SiC power n-MOSFETs work together with complementary MOS (CMOS) circuits. View Full-Text
Keywords: silicon carbide MOSFET; pulsed IV measurements; stress modeling; hysteresis; threshold voltage; recovery voltage silicon carbide MOSFET; pulsed IV measurements; stress modeling; hysteresis; threshold voltage; recovery voltage
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Guevara, E.; Herrera-Pérez, V.; Rocha, C.; Guerrero, K. Threshold Voltage Degradation for n-Channel 4H-SiC Power MOSFETs. J. Low Power Electron. Appl. 2020, 10, 3.

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