Search Results (15)

A Si/SiC heterojunction double-trench MOSFET with improved conduction characteristics is proposed. By replacing the N+ source and P-ch regions with silicon, the device forms a Si/SiC heterojunction that exhibits Schottky-like characteristics, effectively deactivating the parasitic PiN body diode and improving third-quadrant performance. A high-k gate dielectric is incorporated to induce a strong electron accumulation layer at the heterointerface, thinning the energy barrier and enabling tunneling-dominated current transport, thereby significantly enhancing the first-quadrant performance. TCAD simulation results demonstrate that the proposed device achieves a specific on-resistance (R_on,sp) of 1.78 mΩ·cm², representing a 20.5% reduction compared to the conventional SiC DTMOS, while maintaining a comparable breakdown voltage (BV) of approximately 1380 V. A significant reduction in the third-quadrant turn-on voltage (V_on) is achieved with the proposed structure, from 2.74 V to 1.53 V. Meanwhile, the unipolar conduction mechanism similar to that of Schottky effectively suppresses bipolar degradation. To enhance device reliability, the design incorporates a trenched source and heavily doped P-well, which collectively mitigate high electric field concentrations at the trench corners. The proposed device offers an integration strategy enhancing both forward conduction and reverse conduction in high-voltage power electronics. Full article

In this study, a novel silicon carbide (SiC) double-trench MOSFET (DT-MOS) combined Schottky barrier diode (SBD) and MOS-channel diode (MCD) is proposed and investigated using TCAD simulations. The integrated MCD helps inactivate the parasitic body diode when the device is utilized as a freewheeling diode, eliminating bipolar degradation. The adjustment of SBD position provides an alternative path for reverse conduction and mitigates the electric field distribution near the bottom source trench region. As a result of the Schottky contact adjustment, the reverse conduction characteristics are less influenced by the source oxide thickness, and the breakdown voltage (BV) is largely improved from 800 V to 1069 V. The gate-to-drain capacitance is much lower due to the removal of the bottom oxide, bringing an improvement to the turn-on switching rise time from 2.58 ns to 0.68 ns. These optimized performances indicate the proposed structure with both SBD and MCD has advantages in switching and breakdown characteristics. Full article

A 4H-silicon carbide (SiC) trench gate metal–oxide–semiconductor field-effect transistor (MOSFET) with dual integrated Schottky barrier diodes (SBDs) was characterized using numerical simulations. The advantage of three-dimensional stacked integration is that it allows the proposed structure to obtain an electric field of below 0.6 MV/cm in the gate oxide and SBD contacts and achieve ~10% lower forward voltage of SBDs than the planar gate SBD-integrated MOSFET (PSI-MOS) and the trench gate structure with three p-type-protecting layers (TPL-MOS). The dual-SBD-integrated MOSFET (DSI-MOS) also highlights the better influences of the more than 70% reduction in the miller charge, as well as the over 50% reduction in switching loss compared to the others. Furthermore, the short-circuit (SC) robustness of the three devices was identified. The DSI-MOS attains the critical energy and the aluminum melting point in a longer SC time interval than the TPL-MOS. The p-shield layers in the DSI-MOS are demonstrated to yield the huge benefit of improving the reliability of the contacts when SC reliability is considered. Full article

Trench MOS Barrier Schottky (TMBS) rectifiers offer superior static and dynamic electrical characteristics when compared with planar Schottky rectifiers for a given active die size. The unique structure of TMBS devices allows for efficient manipulation of the electric field, enabling higher doping concentrations in the drift region and thus achieving a lower forward voltage drop (VF) and reduced leakage current (IR) while maintaining high breakdown voltage (BV). While the use of trenches to push electric fields away from the mesa surface is a widely employed concept for vertical power devices, a significant gap exists in the analytical modeling of this effect, with most prior studies relying heavily on computationally intensive numerical simulations. This paper introduces a new physics-based analytical model to elucidate the behavior of electric field and potential in the mesa region of a TMBS rectifier in reverse bias. Our model leverages the concept of shared charge between the Schottky and MOS junctions, capturing how electric field distribution is altered in response to trench geometry and bias conditions. This shared charge approach not only simplifies the analysis of electric field distribution but also reveals key design parameters, such as trench depth, oxide thickness, and doping concentration, that influence device performance. This model employs the concept of shared charge between the vertical Schottky and MOS junction. Additionally, it provides a detailed view of the electric field suppression mechanism in the TMBS device, highlighting the significant effects of the inversion charge on the MOS interface. By comparing our analytical results with TCAD simulations, we demonstrate strong agreement, underscoring the model’s accuracy and its potential to serve as a more accessible alternative to resource-intensive simulations. This work contributes to a valuable tool for TMBS device design, offering insights into electric field management that support high-efficiency, high-voltage applications, including power supplies, automotive electronics, and renewable energy systems. Full article

In this paper, a novel 3300 V/40 A 4H-SiC junction barrier Schottky diode (JBS) with a multi-step separated trench (MST) structure is proposed and thoroughly investigated using TCAD simulations. The results show that the introduction of MST expands the Schottky contact area, resulting in a decrease in the forward voltage drop. Furthermore, the combination of the deep P⁺ shielded region and the central P⁺ region effectively reduces the leakage current, leading to a 43.7% increase in the blocking voltage compared to conventional 4H-SiC JBS. The effects of the step depth (d_s) and the width of the central P⁺ region (w_m) on the device performance are analyzed in depth. In addition, a multi-step trenched linearly graded field-limiting rings (MTLG-FLR) termination ensures a more uniform electric field distribution, and the terminal protection efficiency reaches up to 90%, which further enhances the reliability of the terminal structure. Full article

A silicon carbide (SiC) SGT MOSFET featuring a “一”-shaped P+ shielding region (PSR), named SPDT-MOS, is proposed in this article. The improved PSR is introduced as a replacement for the source trench to enhance the forward performance of the device. Its improvement consists of two parts. One is to optimize the electric field distribution of the device, and the other is to expand the current conduction path. Based on the improved PSR and grounded split gate (SG), the device remarkably improves the conduction characteristics, gate oxide reliability, and frequency response. Moreover, the integrated sidewall Schottky barrier diode (SBD) prevents the inherent body diode from being activated and improves the reverse recovery characteristics. As a result, the gate-drain capacitance, gate charge, and reverse recovery charge (Q_rr) of the SPDT-MOS are 81.2%, 41.2%, and 90.71% lower than those of the DTMOS, respectively. Compared to the double shielding (DS-MOS), the SPDT-MOS exhibits a 20% reduction in on-resistance and an 8.1% increase in breakdown voltage. Full article

β-Ga₂O₃ Schottky barrier diodes (SBDs) suffer from the electric field crowding and barrier height lowering effect, resulting in a low breakdown voltage (BV) and high reverse leakage current. Here, we developed β-Ga₂O₃ trench MOS-type Schottky barrier diodes (TMSBDs) on β-Ga₂O₃ single-crystal substrates with halide vapor phase epitaxial layers based on ultraviolet lithography and dry etching. The $1/C^2-V$ plots are deflected at 2.24 V, which is caused by the complete depletion in the mesa region of the TMSBDs. A close-to-unity ideality factor of 1.02 and a low turn-on voltage of 0.72 V are obtained. This is due to the low interface trap density in the metal/semiconductor interface of TMSBDs, as confirmed by the current–voltage ($I–V$) hysteresis measurements. The specific on-resistance calculated with the actual Schottky contact area increases as the area ratio ($AR$) increases because of the current spreading phenomenon. Furthermore, the reverse leakage current of the TMSBDs is smaller and the BV is increased by 120 V compared with the regular SBD. This work paves the way for further improving the overall performance of β-Ga₂O₃ TMSBDs. Full article

This review explores the performance and reliability of power semiconductor devices required to enable the electrification of heavy goods vehicles (HGVs). HGV electrification can be implemented using (i) batteries charged with ultra-rapid DC charging (350 kW and above); (ii) road electrification with overhead catenaries supplying power through a pantograph to the HGV powertrain; (iii) hydrogen supplying power to the powertrain through a fuel cell; (iv) any combination of the first three technologies. At the heart of the HGV powertrain is the power converter implemented through power semiconductor devices. Given that the HGV powertrain is rated typically between 500 kW and 1 MW, power devices with voltage ratings between 650 V and 1200 V are required for the off-board/on-board charger’s rectifier and DC-DC converter as well as the powertrain DC-AC traction inverter. The power devices available for HGV electrification at 650 V and 1.2 kV levels are SiC planar MOSFETs, SiC Trench MOSFETs, silicon super-junction MOSFETs, SiC Cascode JFETs, GaN HEMTs, GaN Cascode HEMTs and silicon IGBTs. The MOSFETs can be implemented with anti-parallel SiC Schottky diodes or can rely on their body diodes for third quadrant operation. This review examines the various power semiconductor technologies in terms of losses, electrothermal ruggedness under short circuits, avalanche ruggedness, body diode and conduction performance. Full article

Achieving low conduction loss and good channel mobility is crucial for SiC MOSFETs. However, basic planar SiC MOSFETs provide challenges due to their high density of interface traps and significant gate-to-drain capacitance. In order to enhance the reverse recovery property of the device, a Schottky barrier diode (SBD) was added to the source contact area, the top of the current spreading region, of a trench-etched double-diffused SiC MOS (TED MOS). Two types of SBD structures were optimized to improve the electrical properties using 3D simulation software, “TCAD Silvaco”. During reverse recovery simulation, the carriers of the device were withdrawn from the SBD, indicating that the new design was effective. It also showed that the recovery properties of the new design depended on temperature, carrier lifetime, and the work functions of metals. All the new designs were evaluated in various circumstances to determine the trend. Ultimately, in high-speed switching circuits, the SiC TED MOS with SBD structure efficiently boosted switching speed, while reducing switching loss. Full article

Bidirectional current-regulating ability is needed for AC light emitting diode (LED) drivers. In previous studies, various rectifier circuits have been used to provide constant bidirectional current. However, the usage of multiple electronic components can lead to additional costs and power consumption. In this work, a novel AlGaN/GaN lateral bidirectional current-regulating diode (B-CRD) featuring two symmetrical hybrid-trench electrodes is proposed and demonstrated by TCAD Sentaurus (California USA) from Synopsys corporation. Through shortly connecting the Ohmic contact and trench Schottky contact, the unidirectional invariant current can be obtained even with the applied voltage spanning a large range of 0–200 V. Furthermore, with the combination of two symmetrical hybrid-trench electrodes at each side of the device, the proposed B-CRD can deliver an excellent steady current in different directions. Through the TCAD simulation results, it was found that the device’s critical characteristics (namely knee voltage and current density) can be flexibly modulated by tailoring the depth and length of the trench Schottky contact. Meanwhile, it was also demonstrated through the device/circuit mixed-mode simulation that the proposed B-CRD can respond to the change in voltage in a few nanoseconds. Such a new functionality combined with excellent performance may make the proposed B-CRD attractive in some special fields where the bidirectional current-limiting function is needed. Full article

We report gallium nitride (GaN) vertical trench junction barrier Schottky (TJBS) diodes and systematically analyzed the effects of the key design parameters on the reverse and forward characteristics of the devices. By taking advantage of the shielding effects from both the trenches and pn junctions in the TJBS structure, the high electric field at the Schottky contact region can be effectively suppressed. We found that the doping concentration, thickness, and spacing of p-GaN, as well as the depth and angle of the trench sidewalls are closely associated with the electric field distribution and the reverse characteristics of the TJBS diodes. With an optimal set of design parameters, the local electric field crowding at either the corner of the trench or the edge of the p-GaN can also be alleviated, resulting in a boosted breakdown voltage of up to 1250 V in the TJBS diodes. In addition, an analytical model was developed to explore the physical mechanism behind the forward conduction behaviors. We believe that the results can provide a systematical design strategy for the development of low-loss, high-voltage, and high-power GaN power diodes towards an efficient power system. Full article

A silicon carbide (SiC) trench MOSFET featuring fin-shaped gate and integrated Schottky barrier diode under split P type shield (SPS) protection (FS-TMOS) is proposed by finite element modeling. The physical mechanism of FS-TMOS is studied comprehensively in terms of fundamental (blocking, conduction, and dynamic) performance and transient extreme stress reliability. The fin-shaped gate on the sidewall of the trench and integrated Schottky diode at the bottom of trench aim to the reduction of gate charge and improvement on the third quadrant performance, respectively. The SPS region is fully utilized to suppress excessive electric field both at trench oxide and Schottky contact when OFF-state. Compared with conventional trench MOSFET (C-TMOS), the gate charge, Miller charge, V_on at third quadrant, R_on,sp·Q_gd, and R_on,sp·Q_g of FS-TMOS are significantly reduced by 34%, 20%, 65%, 0.1%, and 14%, respectively. Furthermore, short-circuit and avalanche capabilities are discussed, verifying the FS-TMOS is more robust than C-TMOS. It suggests that the proposed FS-TMOS is a promising candidate for next-generation high efficiency and high-power density applications. Full article

An electrostatic discharge (ESD) event can negatively affect the reliability of integrated circuits. Therefore, improving on ESD immunity in high-voltage (HV) n-channel (n) lateral diffused metal–oxide–semiconductor field-effect transistor (HV nLDMOS) components through drain-side layout engineering was studied. This involved adjusting the operating voltage, improving the non-uniform turned-on phenomenon, and examining the effects of embedded-device structures on ESD. All proposed architectures for improving ESD immunity in this work were measured and evaluated using a transmission-line pulse system. The corresponding trigger voltage (V_t1), holding voltage (V_h) and secondary breakdown current (I_t2) results of the tested devices were obtained. This paper first addresses the drift-region length modulation to design different operating voltages, which decreased as the drift region length and shallow trench isolation (STI) length shrunk. When an HV nLDMOS device decreased to the shortest drift region length, the V_t1 and V_h values were closest to 21.85, and 9.27 V, respectively. The I_t2 value of a low-voltage operated device could be increased to a maximum value of 3.25 A. For the channel width modulation, increasing the layout finger number of an HV LDMOS device did not really help the ESD immunity that because it may suffer the problem of non-uniform turned-on phenomenon. Therefore, adjusting the optimized channel width was the best one method of improvement. Furthermore, to improve the low ESD reliability problem of nLDMOS devices, two structures were used to improve the ESD capability. The first was a drain side—embedded silicon-controlled rectifier (SCR). Here, the SCR PNP-arranged type in the drain side had the best ESD capability because the SCR path was short and had been prior to triggering; however, it also has a latch-up risk and low V_h characteristic. By removing the entire heavily doped drain-side N⁺ region, the equivalent series resistance in the drain region was increased, so that the I_t2 performance could be increased from 2.29 A to 3.98 A in the structure of a fully embedded drain-side Schottky diode. This component still has sufficiently high V_h behaviour. Therefore, embedding a full Schottky-diode into an HV nLDMOS in the drain side was the best method and was efficient for improving the ESD/Latch-up abilities of the device. The figure of merit (FOM) of ESD, Latch-up, and cell area considerations improved to approximately 80.86%. Full article

AlGaN/GaN lateral Schottky barrier diodes (SBDs) with three different anode geometries (stripe, circular, and the conventional plane one) and different rows of anode trenches are fabricated and electrically characterized to study the influence of anode trench geometries. The SBDs with anode trenches exhibit the lower on-state resistance (R_ON) than that with the conventional plane one. It can be explained that the anode trenches made the Schottky metal directly contact to the 2DEG at the sidewall of the AlGaN/GaN interface, removing the AlGaN barrier layer in the conventional plane anode. In addition, the R_ON of the SBDs with circular trenches is smaller than that of the SBDs with stripe ones. Furthermore, the R_ON decreases with the increasing rows of anode trenches, which can be attributed to the increased contact area between the Schottky metal and the 2DEG. For the reverse characteristics, the anode trenches do not lead to performance degradation. The fabricated devices exhibit the low reverse current (I_R, I_R < 1 μA/mm), and the breakdown voltage (V_BK) remains unchanged with different anode geometries. Full article

Graphene’s superior electronic and thermal properties have gained extensive attention from research and industrial sectors to study and develop the material for various applications such as in sensors and diodes. In this paper, the characteristics and performance of carbon-based nanostructure applied on a Trench Metal Oxide Semiconductor MOS barrier Schottky (TMBS) diode were investigated for high temperature application. The structure used for this study was silicon substrate with a trench and filled trench with gate oxide and polysilicon gate. A graphene nanowall (GNW) or carbon nanowall (CNW), as a barrier layer, was grown using the plasma enhanced chemical vapor deposition (PECVD) method. The TMBS device was then tested to determine the leakage current at 60 V under various temperature settings and compared against a conventional metal-based TMBS device using TiSi₂ as a Schottky barrier layer. Current-voltage (I-V) measurement data were analyzed to obtain the Schottky barrier height, ideality factor, and series resistance (R_s) values. From I-V measurement, leakage current measured at 60 V and at 423 K of the GNW-TMBS and TiSi₂-TMBS diodes were 0.0685 mA and above 10 mA, respectively, indicating that the GNW-TMBS diode has high operating temperature advantages. The Schottky barrier height, ideality factor, and series resistance based on dV/dln(J) vs. J for the GNW were calculated to be 0.703 eV, 1.64, and 35 ohm respectively. Full article