Search Results (28)

Considering the cost, efficiency, power density, and other issues of the power electronic system, many papers have mixed the wide-bandgap (WBG) power devices, mainly SiC MOSFET and GaN FET/HEMT, with Si IGBT/MOSFET in the three-level active neutral-point clamped (T-ANPC) topology, forming the hybrid T-ANPC (HT-ANPC) topology. This paper reviews these latest HT-ANPC topologies from the perspective of the material types of switching devices and compares the advantages and disadvantages of various topologies. The potential challenges of HT-ANPC inverters in several mainstream applications are reviewed, and their improvements are compared and discussed in detail. Next, a brief topology selection and design process are provided based on analyzing various typical topologies. In addition, some future research trends on this topic are discussed. The paper will help researchers to select appropriate HT-ANPC topologies in different applications and have a better understanding of the critical issues to be considered during system design. Full article

In this study, we propose an active junction temperature control method specifically tailored for traction inverters based on active neutral point-clamped (ANPC) three-level topology. This approach not only enables real-time junction temperature equalization across switching devices, but also minimizes switching losses while preserving synchronous modulation. The methodology begins with a detailed formulation of the loss quantification model for ANPC inverters, establishing the relationship between predicted losses and switching vectors. Building on this foundation, we develop a loss equalization modulation control strategy featuring closed-loop loss control. The effectiveness and practicality of the proposed control method are rigorously validated using simulations and low-power experimental testing, demonstrating its potential to enhance both the reliability and efficiency of traction inverters. Full article

This paper proposes an Advanced Hybrid SVPWM (Space Vector Pulse Width Modulation) technique that integrates the benefits of RPS-PWM (Reference Point Saturation-Based PWM) and SVPWM to enhance the performance of three-level ANPC (Active Neutral Point Clamped) inverters. While RPS-PWM effectively reduces switching harmonics, it suffers from lower voltage utilization. In contrast, SVPWM achieves higher voltage utilization but struggles with harmonic suppression. The proposed Advanced Hybrid SVPWM technique addresses these limitations by maintaining the voltage utilization level of RPS-PWM while significantly reducing harmonic distortion and increasing the output $V_{rms}$. To validate the effectiveness of the proposed method, comprehensive PSIM simulations and DSP-based hardware experiments were conducted. Experimental results confirm that the Advanced Hybrid SVPWM achieves superior harmonic suppression compared to conventional RPS-PWM and SVPWM, while also delivering improved output voltage characteristics. These findings highlight the potential of the proposed technique for enhancing the performance of power electronic systems requiring high efficiency and low harmonic distortion. Full article

Multi-level inverters have characteristics suitable for high-voltage and high-power applications through various topology configurations. These reduce harmonic distortion and improve the quality of the output waveform by generating a multi-level output voltage waveform. In particular, an active neutral-point-clamped topology is one of the multi-level inverters advantageous for high-power and medium-voltage applications. It has the advantage of controlling the output waveform more precisely by actively clamping the neutral point using an active switch and diode. However, it has a problem, which is that an unwanted zero-crossing current may occur if an inaccurate switching signal is applied at the time when the polarity of the output voltage changes. In this paper, a control strategy to suppress the zero-crossing current of a single-phase half-bridge three-level active neutral-point-clamped inverter is proposed. The operating principle of a single-phase half-bridge three-level active neutral-point-clamped inverter is identified through an operation mode analysis. In addition, how the switching signal is reflected in an actual digital signal processor is analyzed to determine the situation in which the zero-crossing current occurs. Through this, a control strategy capable of suppressing zero-crossing current is designed. The proposed method prevents a zero-crossing current by appropriately modifying the update timing of reference voltages at the point where the polarity of the output changes. The validity of the proposed method is verified through simulation and experiments. Based on the proposed method, the total harmonic distortion of the output current is significantly reduced from 12.15% to 4.59% in a full-load situation. Full article

Multilevel inverters with improved voltage quality are widely used in applications such as motor control and electric vehicles. The four-level active neutral point clamped (4L-ANPC) inverter effectively meets the demands for high power density and low device voltage stress. However, balancing the capacitor voltage and reducing its low-frequency voltage fluctuation are critical challenges that need to be addressed. To address these challenges, this paper proposes a “variable reference + zero-sequence injection” method that requires only three reference voltage signals to determine the injected zero-sequence components. Particularly, the expression of the midpoint current, regarding the modulation index and phase current amplitude, is theoretically derived. This reveals the fundamental connection between the zero-sequence voltage signal and the midpoint current, providing a theoretical foundation for the zero-sequence injection method in four-level inverters. Subsequently, a simulation model and an experimental platform of the 4L-ANPC inverter were developed to compare and analyze the waveforms of the upper and lower capacitor voltages, phase currents, and line voltages under different modulation methods. Additionally, the upper and lower capacitor voltage waveforms were examined for various modulation indices. The results indicate that as the modulation index increases, the low-frequency voltage fluctuation in the upper and lower capacitor voltages also rises. At a modulation index of 0.95, the “variable reference + zero-sequence injection” method effectively suppresses the fluctuation in the upper and lower capacitor voltages to be no more than 1 V. These experimental findings validate the effectiveness of the proposed method. Full article

The three-level neutral-point-clamped (NPC) active power filter (APF) is suitable for harmonic compensation in high voltage and large capacity applications. And, the harmonic compensation effect of APF depends on its dynamic performance and control. This paper propose a repeat proportional integral (PI) decoupling control strategy with linear active disturbance rejection (LADRC) to address the issues of detection in complex harmonic current and power supply current distortion when the nonlinear load varies. To simplify the design of LADRC, this paper adopts inverter current feedback control. Firstly, repeat control is introduced to optimize the traditional PI controller, which improves the compensation accuracy while ensuring the dynamic response capability of the control system. Then, to address the serious coupling of the system model in the d-q coordinate system, a reduced order linear active disturbance rejection (LADRC) control is introduced. The PI and linear extended state observer (LESO) control method is adopted in the outer voltage loop to maintain stable DC voltage and improve the ability to suppress voltage overshoot during grid connection. The effectiveness of this control method has been verified through MATLAB/Simlink. The results show that, compared with the repeat PI method, the control method based on repeat PI–LADRC can achieve better decoupling control, improve robustness and anti-interference ability, enhance the performance of the original system, and can significantly improve the harmonic suppression capability of the APF. Full article

Voltage source inverters are extensively used in the grid connection of renewable energy-sourced generators, and multilevel converters, in particular, have attracted a great deal of attention in recent years. This paper investigates the application of a novel passivity-based sliding mode (PSM) control scheme on three-level grid-tie active Neutral-Point-Clamped (ANPC) inverters that yield fast and stable responses to grid impedance variations. Simulation studies confirm that this control scheme can produce high tracking performance and is also robust against grid load variations. Furthermore, to enhance ANPC efficiency, the loss distribution of switching devices controlled by the proposed strategy is evaluated. An optimal scheme is finally proposed for allocating silicon and Wide-Band-Gap switching devices, resulting in a hybrid ANPC inverter capable of achieving a desirable trade-off between the power losses and the device cost. Full article

Currently, the escalating integration of renewable energy sources is causing a steady weakening of grid strength. When grid strength is weak, interactions between inverters or those between inverters and grid line impedance can provoke widespread oscillations in the power system. Additionally, the diverse DC voltage application characteristics of power converter systems (PCS) may lead to over-modulation, generating narrow pulse issues that further impact control of the midpoint potential balance. Existing dead-time elimination methods are highly susceptible to current polarity judgments, rendering them ineffective in practical use. PCS, due to inherent dead-time effects, midpoint potential imbalances in three-level topologies, and narrow pulses, can elevate low-order harmonic content in the output voltage, ultimately distorting grid-connected currents. This is particularly susceptible to causing resonance in weak grids. To enhance the output voltage waveform of PCS, this article introduces a comprehensive compensation control strategy that combines dead-time elimination, midpoint potential balance, and narrow pulse suppression, all based on an active neutral point clamped (ANPC) three-level topology. This strategy gives precedence to dead-time elimination and calculates the upper and lower limits of the zero-sequence available for midpoint potential balance while fully compensating for narrow pulses. By prioritizing dead-time elimination, followed by narrow pulse suppression and finally midpoint potential balance, this method decouples the coupling between these three factors. The effectiveness of the proposed method is validated through semi-physical simulations. Full article

In this paper, a two-leg-transfer switch structure method that can continuously supply three-phase power even when an accident occurs in a power semiconductor of a three-level active neutral-point-clamped (ANPC) inverter for railway vehicles is presented. The proposed method can minimize the ripple effect caused by power semiconductor faults by separating the faulty leg from the main circuit and connecting the load-side circuit to a neutral point. As a result of simulations, the average values of MAE and RMSE can be reduced by 1.53 [A] and 1.77 [A], respectively, when using the proposed leg-transfer switch structure compared to using the conventional structure. In the IGBT failure experiment, when the proposed method was applied to a three-level ANPC inverter, there was only a 0.21 [%] difference from the THD under normal conditions. As a result, the magnitude, phase, and total harmonic distortion of the three-phase current waveforms measured before and after the fault were identical. Thus, normal three-phase power could be effectively supplied to the load when the proposed leg-transfer switch method was applied after a power semiconductor fault occurred in the three-level ANPC inverter. If this leg-transfer switch method is applied in three-level ANPC inverterd for railway vehicles, track schedule errors can be minimized by continuously supplying three-phase power to the electric motor even when an accident occurs in a power semiconductor. Full article

Targeting the issue of high losses of individual switching tubes in Neutral-Point Clamped (NPC) three-level inverters, an Active Neutral-Point Clamped (ANPC) three-level inverter is used, and a model predictive control strategy using the loss equalization of the inverter is proposed. This method organizes and analyzes multiple zero-state current pathway commutation modes and adds mode three under the original two commonly used zero-state commutation modes. On this basis, the three modes are flexibly switched by model predictive control, and the output is optimized according to the value function for the space vector in each operation, while the midpoint voltage control is added to the value function. The simulation results suggest that the recommended strategy in this study may effectively realize the loss equalization control and midpoint voltage control of the ANPC inverter, which improves the operation efficiency of the electromechanical actuator. Full article

The main aim of this work is to present a step-by-step procedure to model and analyze the power loss distribution of three-level Gallium Nitride (GaN) inverters. It has been applied to three distinct three-phase three-level voltage source inverters utilized in electric traction drives: Active Neutral Point Clamped, Neutral Point Clamped and T-Type Neutral Point Clamped. The proposed analytical power loss modelling, combined with an equivalent representation of the electrical machine proved to be a viable solution to achieve a time-saving and low computational burden simulation platform, leading to satisfying accurate results. This has been confirmed by comparing the results carried out from the simulations of a 110 kW permanent magnet synchronous motor drive and those determined by considering a simplified circuital representation based on the proposed analytical power loss modelling. Full article

Increased performance requirements in new power electronics areas of application, such as electric aircraft, make innovations on different design levels necessary. In order to quickly compare different topologies, analytical loss equations provide a fast and straightforward way to narrow down the possible solution space. The approach widely used in the literature results in long and complex terms, which can only be compared between different literature sources with great effort. Moreover, the literature lacks a detailed summarizing description of these analytical equations and their derivation, starting from the standard two-level VSI up to three-level midpoint clamped inverter topologies, such as the ANPC topology in its different modulation schemes. The application of such higher-level inverter topologies allows hybrid device configurations to become performant solutions. This work aims to give a closed-form description of the analytical loss modeling and the theoretical background and provide an implementation approach for a wide span of inverter topologies and for different modulation methods. Full article

This paper introduces a state-of-the-art inverter–machine codesign methodology for achieving an energy-efficient electric drive system. The methodology is applied in an optimal design case study with the context of the latest trend in the 800 V system. To reduce the voltage rating, a three-level active neutral point clamped topology is utilized in the inverter design, incorporating silicon carbide technology for high-speed operation. This combination allows for efficient power conversion with reduced losses. In the machine design, the increased number of poles that can be achieved in the design phase, along with the utilization of high-speed switching frequencies, enables the development of more efficient machines. Based on the design of the experiment method, by optimizing the parameters of both the inverter and machine simultaneously, using a cosimulation model, the 7.7% of total energy loss during drive cycle operation can be improved. Full article

This study proposes a simplified super-twisting algorithm (SSTA) control strategy for improving the power quality of grid-connected photovoltaic (PV) power systems. Some quality issues are considered in this study including the power factor, reducing the total harmonic distortion (THD) of current, compensating the reactive power, and injecting at the same time the energy supplied by the PV system into the grid considering non-linear load. This improvement is achieved by two topologies; controlling both the boost DC–DC converter and the DC–AC inverter that links the PV system to the grid. The DC–DC converter is controlled using proportional-integral (PI) and SSTA to maximize the power generated from the PV panel regardless of its normal and abnormal conditions, while the DC–AC inverter is employed to direct power control strategy with modified space vector modulation using the phase-locked loop (PLL) technique of a three-level neutral-point-clamped (NPC) inverter based on the proposed strategies (PI and SSTA). In addition, a shunt active power filter (SAPF) is used to connect the PV system to the AC grid and feed a non-linear load. To validate the simulation results presented in this paper using Matlab software, a comparative study between the PI controller and the SSTA is presented. The results show the effectiveness and moderation of the suggested SSTA technique in terms of feasibility, tracking performance, less power ripple, dynamic response, THD value, overshoot, steady-state error, and robustness under varying irradiation, temperature, and non-linear conditions. Full article

The authors propose a technique for reactive power compensation using a powerful regenerative controlled-speed synchronous motor drive (SMD) based on a three-level (3L) neutral point clamped (NPC) active front-end rectifier (AFE) and a voltage source inverter (VSI). The review of technical solutions for reactive power compensation showed that the limitations on the transmitted reactive power in the system under consideration still have not been studied. The paper provides a mathematical description and proposes synthesis-friendly block diagrams of the mathematical 3L-NPC-AFE-VSI and SMD models. The developed models allow defining the instantaneous values of the total 3L-NPC-AFE power consumed from the grid depending on the SMD load diagram. It is noted that the 3L-NPC-AFE-VSI-SMD system is designed without considering the opportunities for reactive power generation. It was determined that the limit value of reactive power generated by a 3L-NPC-AFE depends on the DC link voltage, the grid current consumption and the modulation index. The possibility of reactive power compensation by the SMD system through a 3L-NPC-AFE was experimentally tested on the main drive of a metal plate hot rolling mill. The analysis of the results obtained showed that during the breakdown, an SMD can generate reactive power equal to 16% of the total rated power using a 3L-NPC-AFE at a rated DC link voltage and without overcurrent. It was shown that generating reactive power is expedient in low-load SMD operation modes or at idle. Research in this area is promising due to the widespread use of high-power SMD based on a 3L-NPC-AFE-VSI and the tightening of requirements for energy saving and efficiency and supply voltage quality. The proposed reactive power control technique can be used as part of an industrial smart grid. Full article