Search Results (19)

The article presents basic information about the induction heating of gears, which are widely used in various industries. This article presents the methodology and results of a coupled FEM simulation of a circuit model for a power electronics converter connected to an inductor-charged heating system. The induction heating of gears was performed using a high-frequency inverter with SiC MOSFET transistors. A prototype inverter was built using a full-bridge structure with a series-parallel resonant circuit. The operating frequency was 350 kHz, the output power of the inverter was 3.5 kW, and the drain efficiency was equal to 96%. Coupled simulation was performed for a charge in the form of a gear made of 42CrMo4 steel (material parameters are provided in the article) for two types of heating: with and without a magnetic field concentrator. In addition, the article presents the results of co-simulation studies in the following form: a distribution of magnetic induction in the gear, energy density in the gear, the characteristics of energy density in a single tooth on the 8 mm length and the temperature of the tooth tip for two types of induction heating. Full article

Solid-state DC circuit breakers provide crucial support for the safe and reliable operation of low-voltage DC distribution networks. A hardware topology based on a cascaded structure with dual-stage, current-limiting, small-capacity, solid-state DC circuit breakers has been proposed. The hardware topology uses a series–parallel configuration of cascaded SCR (thyristors) and MOSFETs (metal oxide semiconductor field-effect transistors) in the transfer branch, which enhances the breaking capacity of the transfer branch. Additionally, a secondary current-limiting circuit composed of an inductor and resistor in parallel is integrated at the front end of the transfer branch to effectively improve the current-limiting performance of the circuit breaker. Meanwhile, a dissipation branch is introduced on the fault side to reduce the energy consumption burden on surge arresters. For the power supply system of the hardware part, a capacitor-powered method is adopted for safety and efficiency, with a capacitor switch serially connected to the capacitor power supply for high-precision control of the power supply. Current detection branches are introduced into each branch to provide conditions for the on–off control of semiconductor switching devices and experimental data analysis. The high-frequency control of semiconductor devices is achieved using optocoupler signal isolation chips and high-speed drive chips through a microcontroller STM32. Simulation verification based on MATLAB/SIMULINK software and experimental prototype testing have been conducted, and the results show that the hardware topology is correct and effective. Full article

Power devices in series are low-voltage power devices used in medium- and high-voltage applications in a more direct program. However, when power devices in series are used, because of their electrical performance parameters or external circuit conditions, there are unique short-circuit voltage imbalances, a serious threat to the safety of the device. The article first summarizes the research status and characteristics of the four models of SiC MOSFETs based on the domestic and international research on the models of SiC MOSFETs in recent years; second, the voltage balancing technology of series-connected SiC MOSFETs is sorted out and summarized, and then the driving circuits of SiC MOSFETs are sorted out and summarized. Again, several voltage balancing techniques reviewed are compared in six different aspects: cost, modularity, complexity, speed of voltage balancing, losses, and effectiveness of voltage balancing. Finally, an outlook of voltage balancing techniques for series SiC MOSFETs is provided. Full article

A novel clamped voltage equalization strategy is presented for series-connected Silicon Carbide (SiC) Metal–Oxide semiconductor Field-Effect transistors (MOSFETs) in this paper. Differences in device parameters and circuit asymmetry result in the uneven voltage distribution of series-connected SiC MOSFETs, which threatens the safe operation of the circuit. Dynamic voltage equalization is difficult to achieve due to the fast switching speed of SiC MOSFETs. This paper analyzes the switching characteristics and dynamic voltage equalization characteristics of SiC MOSFETs. Based on the analysis, an energy recovery strategy based on the clamping auxiliary circuit is proposed. A 2.8 kW (50 KHz) prototype is fabricated and tested to verify the strategy. Measurement results show that the maximum voltage stress is suppressed from 600 V to less than 320 V in the experimental condition. Full article

In order to solve problems such as a slow switching speed, a high switching power, a loss of pure IGBT modulators, and the weak withstanding load short-circuit ability of pure SiC MOSFET modulators used for vacuum loads, this paper proposes a new scheme for high-voltage pulse modulators based on SiC MOSFET/IGBT hybrid connecting circuits. It has a low power loss like the pure SiC MOSFET modulator and a strong withstanding load short-circuit ability like the pure IGBT modulator. Firstly, the principle circuit of the hybrid connecting modulator are discussed and chosen. And the basic working processes of the hybrid parallel-series modulator is described in detail. Secondly, three key points in this new scheme are analyzed and designed as follows: the static and dynamic voltage sharing; the actualizing of the ZVS process for IGBTs; the improvement of short-circuit protection for SiC MOSFETs. A modulator consisting of 16-stage 1200 V-SiC MOSFETs and 1200 V-IGBTs in hybrid parallel-series states is tested. Based on the sample circuit, the working data, such as high-voltage pulse waveforms of 10 kV/2 KHz/10 μs, static and dynamic voltage sharing, the driving control sequence, the U/I sequence of the IGBT, the short-circuit protection waveform, and the calculation, are obtained and discussed. Full article

This paper comprehensively reviews several techniques that address the static and dynamic voltage balancing of series-connected MOSFETs. The effectiveness of these techniques was validated through simulations and experiments. Dynamic voltage-balancing techniques include gate signal delay adjustment methods, passive snubbers, passive clamping circuits, and hybrid solutions. Based on the experimental results, the advantages and disadvantages of each technique are investigated. Combining the gate-balancing core method with an RC snubber, which has proven both technically and commercially attractive, provides a robust solution. If the components are sorted and binned, voltage-balancing techniques may not be necessary, further enhancing the commercial viability of series-connected MOSFETs. An investigation of gate driver topologies yields one crucial conclusion: magnetically isolated gate drivers offer a simple and cost-effective solution for high-frequency (HF) applications (2.5–50 kHz) above 8 kV with an increased number of series devices. Below 8 kV, it is advantageous to move the isolation barrier from the gate drive IC to an optocoupler and isolated supply, allowing for a simple design with commercially available components. Full article

Hyper-field effect transistors (hyper-FETs) are crucial in the development of low-power logic devices. With the increasing significance of power consumption and energy efficiency, conventional logic devices can no longer achieve the required performance and low-power operation. Next-generation logic devices are designed based on complementary metal-oxide-semiconductor circuits, and the subthreshold swing of existing metal-oxide semiconductor field effect transistors (MOSFETs) cannot be reduced below 60 mV/dec at room temperature owing to the thermionic carrier injection mechanism in the source region. Therefore, new devices must be developed to overcome these limitations. In this study, we present a novel threshold switch (TS) material, which can be applied to logic devices by employing ovonic threshold switch (OTS) materials, failure control of insulator–metal transition materials, and structural optimization. The proposed TS material is connected to a FET device to evaluate its performance. The results demonstrate that commercial transistors connected in series with GeSeTe-based OTS devices exhibit significantly lower subthreshold swing values, high on/off current ratios, and high durability of up to 10⁸. Full article

A series connection of SiC MOSFETs for kV blocking capability can enable more design flexibility in modular multi-level converters as well as other topologies. In this paper, a novel gate driver circuit capable of driving series-connected SiC MOSFETs for high voltage applications is proposed. The primary advantage of the proposed design is that a single gate driver was used to switch all the series devices. The circuit used switching capacitors to sequentially charge and discharge device gate capacitances during switching and enable a negative turn-off voltage to avoid device coupling from Miller-capacitive feedback effects. With the proposed gate driver design and appropriate component values selection, avalanche breakdown due to voltage divergence during switching transients could be avoided with only a minor imbalance in the top device. Simulations and experimental measurements showed that the zero-current turn-off transition of all switches was achieved, and this approved the validity of the design. Full article

This paper mainly studies the hardware implementation of a fully connected neural network based on the 1T1R (one-transistor-one-resistor) array and its application in handwritten digital image recognition. The 1T1R arrays are prepared by connecting the memristor and nMOSFET in series, and a single-layer and a double-layer fully connected neural network are established. The recognition accuracy of 8 × 8 handwritten digital images reaches 95.19%. By randomly replacing the devices with failed devices, it is found that the stuck-off devices have little effect on the accuracy of the network, but the stuck-on devices will cause a sharp reduction of accuracy. By using the measured conductivity adjustment range and precision data of the memristor, the relationship between the recognition accuracy of the network and the number of hidden neurons is simulated. The simulation results match the experimental results. Compared with the neural network based on the precision of 32-bit floating point, the difference is lower than 1%. Full article

Series connection is an attractive approach to increase the blocking voltage of SiC power MOSFETs. Currently, the voltage balancing design of the series connection of the SiC MOSFETs highly relies on offline calibration and is challenging in the complex field operation. In this paper, a quantitative model to assess the voltage balancing performance is proposed to achieve a clear mathematical interpretation of the dynamic response of the voltage imbalance control loop. To begin with, an analytical model of the drain-source voltage rising time during the turn-off transient concerning the non-constant Miller plateau is proposed. Based on the turn-off model of the single device, the voltage imbalance sensitivity (VIS) is proposed to describe the influence of the parameters on the gate driving signals on the voltage imbalance. The VIS parameter can be easily achieved from the behavior of single devices, abandoning the complex variables in series connection. Further, for the typical case, active time delay voltage balancing methods are selected to demonstrate the application of the VIS analysis method. Based on VIS, the accurate close-loop design is proposed for controlling the delayed time among the devices. The proposed analysis and method are verified in simulation and experiment. The paper offers a generalized approach to assess the performance and the design of the series connection of the SiC MOSFETs, which can be further applied in many other methods for parameter design and engineering applications. Full article

Controlling the cost of electricity consumption remains a major concern, particularly in the residential sector. Smart home electricity management systems (HEMS) are becoming increasingly popular for providing uninterrupted power and improved power quality, as well as for reducing the cost of electricity consumption. When power transfer is required between a storage system and the AC grid, and vice versa, these HEMS require the use of a bidirectional DC–AC converter. This paper emphasizes the potential value of an almost unexplored topology, the design of which was based on the generation of sinusoidal signals from sinusoidal half waves. A DC–DC stage, which behaved as a configurable voltage source, was in series with a DC–AC stage, i.e., an H-bridge, to achieve an architecture that could operate in both grid and off-grid configurations. Wide bandgap power switches (silicon carbide metal-oxide-semiconductor field-effect transistors [MOSFETs]), combined with appropriate control strategies, were the keys to increasing compactness of the converter while ensuring good performance, especially in terms of efficiency. The converter was configured to automatically change the operating mode, i.e., inverter or rectifier in power factor correction mode, according to an instruction issued by the HEMS; the latter being integrated in the control circuit with automatic duty cycle management. Therefore, the HEMS set the amount of energy to be injected into the grid or to be stored. The experimental results validate the operating modes of the proposed converter and demonstrate the relevance of such a topology when combined with an HEMS, especially in the case of an AC grid connection. The efficiency measurements of the bidirectional DC–AC converter, performed in grid-connected inverter mode, show that we exceeded the efficiency target of 95% over the entire output power range studied, i.e., from 100 W to 1.5 kW. Full article

To improve the efficiency of photovoltaic (PV) grid-tied systems and simplify the circuit structure, many pseudo DC-link inverters have been proposed by combining a sinusoidal pulse-width modulation (SPWM) controlled buck-boost converter and a low-frequency polarity unfolder. However, due to the non-ideal characteristics of power diodes, the voltage-gain of a buck-boost converter is limited. To meet the needs of grid-connected systems with low input voltage and 220 V_rms utility, this paper uses two two-switch buck-boost converters with coupled inductors to develop a transformer-less buck-boost grid-tied inverter with low leakage-current and high voltage-gain. The proposed inverter is charging on the primary side of the coupled inductor and discharging in series on the primary side and the secondary side so that the voltage-gain can be greatly increased. Furthermore, the utility line can be connected to the negative end of the PV array to suppress leakage current, and the unfolding circuit can be simplified to reduce the conduction losses. High-frequency switching is only performed in one metal-oxide-semiconductor field-effect transistor (MOSFET) in each mode, which can effectively improve conversion efficiency. A prototype was implemented to obtain experimental results and to prove the validity of the proposed circuit structure. Full article

In this paper, a multi-step packaging (MSP) concept for series-connected SiC-MOSFETs is analyzed. The parasitic capacitance generated by the dielectric isolation of each device in the stack has a significant impact on the dynamic behavior of SiC devices, which impacts the voltage-sharing performances. The study performed in this work reveals that the parasitic capacitance network introduced by the classical planar packaging unbalances the voltage across the series-connected SiC-MOSFETs. Therefore, a new drain-source parasitic capacitance network configuration provided by the MSP is proposed in order to improve the voltage balancing across the series-connected devices. The concept is introduced and analyzed thanks to equivalent models and time domain simulations. To verify the analysis, the voltage sharing between four series-connected 1.2 kV SiC MOSFETs is tested in a double pulse test setup. The experimental results confirm that the MSP has a better performance than the classical one in terms of voltage sharing. Furthermore, the proposed investigation shows that the MSP increases the middle point dv/dt of the switching cell. Sensitive analysis and thermal management considerations are also discussed in order to clarify the MSP limitations and indicate the ways to optimize the MSP from a thermal point of view. Full article

This research proposes a power loss analysis and a control strategy of an active cell balancing system based on a bidirectional flyback converter. The system aims to achieve an energy storage application with cells connected in 6 series and 1 parrarel (6S1P) design. To reduce the structural complexity, Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) array commonly used in balancing system is replaced with the photovoltaic Metal-Oxide-Semiconductor (photoMOS) array. Power loss analysis is utilized for the system operating in the proper current to reach higher efficiency. The proposed loss models are divided into conduction loss, switching loss, and copper and core loss of the transformer. Besides, the models are used to estimate the loss of converter operating in different balance conditions to evaluate the system efficiency and verified by the implemented balancing circuit. By way of the loss models, the balancing current can be determined to reach higher efficiency of the proposed system. For further improvement of the balancing process, the system has also applied a control strategy to enhance the balancing performance that reduces 50% maximum voltage difference than traditional cell-to-pack architecture, and 47% balancing duration than traditional pack-to-cell architecture. Full article

An organic ferroelectric capacitor, using polyvinylidene difluoride (PVDF) as the dielectric, was fabricated. By connecting the PVDF capacitor in series to the gate of a commercially purchased metal-oxide–semiconductor field-effect transistor (MOSFET), drain current (I_D)–drain voltage (V_D) characteristics and drain current (I_D)–gate voltage (V_G) characteristics were measured. In addition, the subthreshold slopes of the MOSFET were determined from the I_D–V_G curves. It was found that the subthreshold slope could be effectively reduced by 23% of its original value when the PVDF capacitor was added to the gate of the MOSFET. Full article