Search Results (19)

Edge-computing applications demand ultra-low-power architectures for both feature extraction and classification tasks. In this manuscript, a Keyword Spotting (KWS) system tailored for energy-constrained portable environments is proposed. A 16-channel analog filter bank is employed for audio feature extraction, followed by a digital Gated Recurrent Unit (GRU) classifier. The filter bank is behaviorally modeled, making use of second-order band-pass transfer functions, simulating the analog front-end (AFE) processing. To enable efficient deployment, the GRU classifier is trained using a Learned Step Size (LSQ) and Look-Up Table (LUT)-aware quantization method. The resulting quantized model, with 4-bit weights and 8-bit activation functions (W4A8), achieves 91.35% accuracy across 12 classes, including 10 keywords from the Google Speech Command Dataset v2 (GSCDv2), with less than 1% degradation compared to its full-precision counterpart. The model is estimated to require only 34.8 kB of memory and 62,400 multiply–accumulate (MAC) operations per inference in real-time settings. Furthermore, the robustness of the AFE against noise and analog impairments is evaluated by injecting Gaussian noise and perturbing the filter parameters (center frequency and quality factor) in the test data, respectively. The obtained results confirm a strong classification performance even under degraded circuit-level conditions, supporting the suitability of the proposed system for ultra-low-power, noise-resilient edge applications. Full article

This paper analyzes two main categories of feature selection: filter methods (such as minimum redundancy maximum relevance, CHI2, Kruskal–Wallis, and ANOVA) and embedded methods (such as alternating direction method of multipliers (BP_ADMM), least absolute shrinkage and selection operator, and orthogonal matching pursuit). The mathematical foundations of feature selection methods inspired by compressed detection are presented, highlighting how the principles of sparse signal recovery can be applied to identify the most relevant features. The results have been obtained using two biomedical databases. The used algorithms have, as their starting point, the notion of sparsity, but the version implemented and tested in this work is adapted for feature selection. The experimental results show that BP_ADMM achieves the highest classification accuracy (77% for arrhythmia_database and 100% for oncological_database), surpassing both the full feature set and the other methods tested in this study, which makes it the optimal feature selection option. The analysis shows that embedded methods strike a balance between accuracy and efficiency by selecting features during the model training, unlike filtering methods, which ignore feature interactions. Although more accurate, embedded methods are slower and depend on the chosen algorithm. Although less comprehensive than wrapper methods, they offer a strong trade-off between speed and performance when computational resources allow for it. Full article

Sustainability is becoming increasingly important in the world we live in, because of the rapid global population growth and climate change (drought, extreme temperature fluctuations). People in developing countries need more sustainable protein sources instead of the traditional, less sustainable meat, fish, egg, and dairy products. Alternative sources (plant-based, such as grains (wheat, rice sorghum), seeds (chia, hemp), nuts (almond, walnut), pulses (beans, lentil, pea, lupins), and leaves (duckweed), as well as mycoproteins, microalgae, and insects) can compensate for the increased demand for animal protein. In this context, our attention has been specifically focused on duckweed—which is the third most important aquatic plant after the microalgae Chlorella and Spirulina—to explore its potential for use in a variety of areas, particularly in the food industry. Duckweed has special properties: It is one of the fastest-growing plants in the world (in freshwater), multiplying its mass in two days, so it can cover a water surface quickly even in filtered sunlight (doubling its biomass in 96 hours). During this time, it converts a lot of carbon dioxide into oxygen. It is sustainable, environmentally friendly (without any pesticides), and fast growing; can be grown in indoor vertical farms and aquaculture, so it does not require land; is easy to harvest; and has a good specific protein yield. Duckweed belongs to the family Araceae, subfamily Lemnoideae, and has five genera (Lemna, Spirodela, Wolffia, Wolffiella, Landolita) containing a total of approximately 36–38 recognised species. Duckweed is gaining attention in nutrition and food sciences due to its potential as a sustainable source of protein, vitamins, minerals, and other bioactive compounds. However, there are several gaps in research specifically focused on nutrition and the bioaccessibility of its components. While some studies have analysed the variability in the nutritional composition of different duckweed species, there is a need for comprehensive research on the variability in nutrient contents across species, growth conditions, harvesting times, and geographic locations. There has been limited research on the digestibility, bioaccessibility (the proportion of nutrients that are released from the food matrix during digestion), and bioavailability (the proportion that is absorbed and utilised by the body) of nutrients in duckweed. Furthermore, more studies are needed to understand how food processing (milling, fermentation, cooking, etc.), preparation methods, and digestive physiology affect the nutritional value and bioavailability of the essential bioactive components in duckweed and in food matrices supplemented with duckweed. This could help to optimise the use of duckweed in human diets (e.g., hamburgers or pastas supplemented with duckweed) or animal feed. More research is needed on how to effectively incorporate duckweed into diverse cuisines and dietary patterns. Studies focusing on recipe development, consumer acceptance, palatability, and odour are critical. Addressing these gaps could provide valuable insights into the nutritional potential of duckweed and support its promotion as a sustainable food source, thereby contributing to food security and improved nutrition. In summary, this article covers the general knowledge of duckweed, its important nutritional values, factors that may affect their biological value, and risk factors for the human diet, while looking for technological solutions (covering traditional and novel technologies) that can be used to increase the release of the useful, health-promoting components of duckweed and, thus, their bioavailability. This article, identifying gaps in recent research, could serve as a helpful basis for related research in the future. Duckweed species with good properties could be selected by these research studies and then included in the human diet after they have been tested for food safety. Full article

This work presents the design of optimal and multiplierless compensators for Chebyshev sharpened comb decimation filters. The narrowband and wideband compensators are proposed. For the narrowband, the compensator with a magnitude response is proposed in a sinusoidal form, while for the wideband, two compensators with magnitude responses of two sinusoidal functions are introduced. The optimum design is performed using particle swarm optimization (PSO), while the multiplierless design is realized by presenting optimum parameters in a signed-power-of-two (SPT) form. Unlike the methods in the literature, this approach presents flexibility in design, allowing for an exchange between the quality of optimization and the complexity. Comparisons with the compensators from the literature demonstrated that the proposed method provides much better compensation while requiring fewer or slightly increased number of adders. Possible practical applications and potential future research work are also included. Full article

In this paper, we propose a compact and low-power mixed-signal approach to implementing convolutional operators that are often responsible for most of the chip area and power consumption of Convolutional Neural Network (CNN) processing chips. The convolutional operators consist of several multiply-and-accumulate (MAC) units. MAC units are the primary components that process convolutional layers and fully connected layers of CNN models. Analog implementation of MAC units opens a new paradigm for realizing low-power CNN processing chips, benefiting from less power and area consumption. The proposed mixed-signal convolutional operator comprises low-power binary-weighted current steering digital-to-analog conversion (DAC) circuits and accumulation capacitors. Compared with a conventional binary-weighted DAC, the proposed circuit benefits from optimum accuracy, smaller area, and lower power consumption due to its symmetric design. The proposed convolutional operator takes as input a set of 9-bit digital input feature data and weight parameters of the convolutional filter. It then calculates the convolutional filter’s result and accumulates the resulting voltage on capacitors. In addition, the convolutional operator employs a novel charge-sharing technique to process negative MAC results. We propose an analog max-pooling circuit that instantly selects the maximum input voltage. To demonstrate the performance of the proposed mixed-signal convolutional operator, we implemented a CNN processing chip consisting of 3 analog convolutional operators, with each operator processing a 3 × 3 kernel. This chip contains 27 MAC circuits, an analog max-pooling, and an analog-to-digital conversion (ADC) circuit. The mixed-signal CNN processing chip is implemented using a CMOS 55 nm process, which occupies a silicon area of 0.0559 mm² and consumes an average power of 540.6 μW. The proposed mixed-signal CNN processing chip offers an area reduction of 84.21% and an energy reduction of 91.85% compared with a conventional digital CNN processing chip. Moreover, another CNN processing chip is implemented with more analog convolutional operators to demonstrate the operation and structure of an example convolutional layer of a CNN model. Therefore, the proposed analog convolutional operator can be adapted in various CNN models as an alternative to digital counterparts. Full article

This paper investigates the effects of macroeconomic uncertainty on economic growth in the presence of fiscal consolidation in South Africa. Markov-switching dynamic regression (MSDR) and time-varying parameter vector autoregression (TVP-VAR) were performed using time series data from 1994 to 2022. Less attention has been given directly to the investigation of macroeconomic uncertainty in different regimes of economic growth in South Africa. Three states are found for economic growth, with mean growth rates of negative 6.29% and positive 3.90% and 1.47%, respectively. Macroeconomic uncertainty was found to have a negative impact of 6.72%, 4.38%, and 3.08% in states 1 to 3, respectively. Fiscal consolidation provided an accommodative policy, as it reduced the negative impact of macroeconomic uncertainty by 3.17%, 1.80%, and 0.92% in states 1 to 3, respectively. However, fiscal consolidation does not completely reduce the negative impact of macroeconomic uncertainty. The transition probabilities of economic growth moving and returning to the same states are 29.46%, 34.07%, and 58.02%, in each state, respectively. The time-varying impulse response functions showed that the shock of macroeconomic uncertainty harms economic growth. Nevertheless, the multiplier effect is not large; however, the economy operates below equilibrium and does not restore equilibrium after the effect of macroeconomic uncertainty. This reflects that it takes time for macroeconomic uncertainty to filter out of the South African economy. It is recommended that fiscal consolidation be considered as an accommodative fiscal policy to reduce macroeconomic uncertainty but not as a main policy for economic growth. Full article

In ultrasound B-mode imaging, the axial resolution (AR) is commonly determined by the duration or bandwidth of an excitation signal. A shorter-duration pulse will produce better resolution compared to a longer one but with compromised penetration depth. Instead of relying on the pulse duration or bandwidth to improve the AR, an alternative method termed filtered multiply and sum (FMAS) has been introduced in our previous work. For spatial-compounding, FMAS uses the autocorrelation technique as used in filtered-delay multiply and sum (FDMAS), instead of conventional averaging. FMAS enables a higher frame rate and less computational complexity than conventional plane-wave compound imaging beamformed with delay and sum (DAS) and FDMAS. Moreover, it can provide an improved contrast ratio and AR. In previous work, no explanation was given on how FMAS was able to improve the AR. Thus, in this work, we discuss in detail the theory behind the proposed FMAS algorithm and how it is able to improve the spatial resolution mainly in the axial direction. Simulations, experimental phantom measurements and in vivo studies were conducted to benchmark the performance of the proposed method. We also demonstrate how the suggested new algorithm may be used in a practical biomedical imaging application. The balloon snake active contour segmentation technique was applied to the ultrasound B-mode image of a common carotid artery produced with FMAS. The suggested method is capable of reducing the number of iterations for the snake to settle on the region-of-interest contour, accelerating the segmentation process. Full article

This paper presents a fast lock-in time clock frequency multiplier without using traditional clock generation circuits such as PLLs and DLLs. We propose a novel technique based on capacitive finite impulse response (FIR) filters to generate clock phases while reducing the input clock phase noise at the same time. A new delay line circuit is also proposed for improving power supply rejection. In addition, to improve the matching quality as well as the end-effects tolerance of the on-chip capacitors, a single-value series/parallel algorithm is proposed. Designed in a 0.18 $\mathsf{\mu }$m digital CMOS process, with a 20 MHz input clock frequency, the multiplier achieves a multiplication factor of 5 with a lock-in time of less than 4 clock cycles. The input clock jitter is reduced from 7ns RMS to 153 ps RMS after frequency multiplication. Full article

The creation of multiple applications with a higher level of complexity has been made possible by the usage of artificial neural networks (ANNs). In this research, an efficient flexible finite impulse response (FIR) filter structure called ADALINE (adaptive linear element) that makes use of a MAC (multiply accumulate) core is proposed. The least mean square (LMS) and recursive least square (RLS) algorithms are the most often used methods for maximizing filter coefficients. Despite outperforming the LMS, the RLS approach has not been favored for real-time applications due to its higher design arithmetic complexity. To achieve less computation, the fundamental filter has utilized an LMS-based tapping delay line filter, which is practically a workable option for an adaptive filtering algorithm. To discover the undiscovered system, the adjustable coefficient filters have been developed in the suggested work utilizing an optimal LMS approach. The 10-tap filter being considered here has been analyzed and synthesized utilizing field programmable gate array (FPGA) devices and programming in hardware description language. In terms of how well the resources were used, the placement and postrouting design performed well. If the implemented filter architecture is compared with the existing filter architecture, it reveals a 25% decrease in resources from the existing one and an increase in clock frequency of roughly 20%. Full article

This paper presents a digital decimation filter based on a third-order four-bit Sigma-Delta modulator. The digital decimation filter is an important part of the Sigma-Delta ADC and is designed to make the Sigma-Delta ADC (Analog-to-Digital Converter) meets the requirements of Signal-to-Noise Ratio (SNR) not less than 120 dB and Equivalent Number of Bits (ENOB) not less than 20 bits. It adopts a three-stages cascaded structure including a Cascaded Integrator Comb (CIC) decimation filter, a Finite Impulse Response (FIR) compensation filter, and a half-band (HB) filter. This structure effectively reduces about 13% multiplier cells and memory cells. The coefficient symmetry technique and CSD (Canonic Signed Digit) coding technique are used to optimize the parameters of the filter, which further reduces the computational complexity. After optimization, the circuit area is reduced by about 15%, and the logic resources are decreased by about 23%. The Verilog hardware description language is used to describe the behavior of the digital decimation filter, and the simulation is carried out based on the VCS (Verilog Compile Simulator) platform. At the same time, the prototype verification is implemented on the Xilinx Artix-7 series FPGA, and the ADC achieves 113 dB SNR and 18.5 bits ENOB. Finally, the Sigma-Delta ADC is fabricated on SMIC 0.18 $\mathsf{\mu }$m CMOS process with the layout area of 714.8 $\mathsf{\mu }$m × 628.4 $\mathsf{\mu }$m and the power consumption of 11.2 mW. The more tests for the fabricated prototypes will be performed in the future to verify that the Sigma-Delta ADC complies with the design specifications. Full article

In infrared small target detection, the infrared patch image (IPI)-model-based methods produce better results than other popular approaches (such as max-mean, top-hat, and human visual system) but in some extreme cases it suffers from long processing times and inconsistent performance. In order to overcome these issues, we propose a novel approach of dividing the traditional target detection process into two steps: suppression of background noise and elimination of clutter. The workflow consists of four steps: after importing the images, the second step applies the alternating direction multiplier method to preliminarily remove the background. Comparatively to the IPI model, this step does not require sliding patches, resulting in a significant reduction in processing time. To eliminate residual noise and clutter, the interim results from morphological filtering are then processed in step 3 through an improved new top-hat transformation, using a threefold structuring element. The final step is thresholding segmentation, which uses an adaptive threshold algorithm. Compared with IPI and the new top-hat methods, as well as some other widely used methods, our approach was able to detect infrared targets more efficiently (90% less computational time) and consistently (no sudden performance drop). Full article

In multiplierless finite impulse response (FIR) filters, the product accumulation block (PAB) could be the major contributor to hardware complexity, especially for high-order filters. In this paper, an optimization scheme where the constant multiplication block and the PAB are jointly optimized at the bit-level is proposed to minimize the hardware complexity. In the proposed joint optimization, the multiple constant multiplications (MCM) block is rearranged into several MCM sub-blocks. The products are summed locally before accumulation to reduce the word-length of the structural adders. It is shown that the symmetric property of linear phase FIR filters can be utilized in some cases to further reduce the complexity of the constant multiplications. Quantitative analyses are also presented to study the relationship between the optimum group size and the coefficient values as well as the filter orders. It is shown that there is no fixed optimum structure for filters with different coefficient word-lengths and filter orders, and each filter needs to be optimized specifically to achieve the minimum hardware complexity. Implementation results are presented to validate the effectiveness of the proposed method. Full article

Realising a low-complexity Farrow channelisation algorithm for multi-standard receivers in software-defined radio is a challenging task. A Farrow filter operates best at low frequencies while its performance degrades towards the Nyquist region. This makes wideband channelisation in software-defined radio a challenging task with high computational complexity. In this paper, a hybrid Farrow algorithm that combines a modulated Farrow filter with a frequency response interpolated coefficient decimated masking filter is proposed for the design of a novel filter with low computational complexity. A design example shows that the HFarrow filter bank achieved multiplier reduction of 50%, 70% and 64%, respectively, in comparison with non-uniform modulated discrete Fourier transform (NU MDFT FB), coefficient decimated filter bank (CD FB) and interpolated coefficient decimated (ICDM) filter algorithms. The HFarrow filter bank is able to provide the same number of sub-band channels as other algorithms such as non-uniform modulated discrete Fourier transform (NU MDFT FB), coefficient decimated filter bank (CD FB) and interpolated coefficient decimated (ICDM) filter algorithms, but with less computational complexity. Full article

The dynamic performance of the local control of single-phase voltage source inverters (VSIs) can be degraded when supplying to nonlinear loads (NLLs) in microgrids. When this control is based on the droop principles, a proper calculation of the active and reactive averaged powers (P–Q) is essential for a proficient dynamic response against abrupt NLL changes. In this work, a VSI supplying to an NLL was studied, focusing the attention on the P–Q calculation stage. This stage first generated the direct and in-quadrature signals from the measured load current through a second-order generalized integrator (SOGI). Then, the instantaneous power quantities were obtained by multiplying each filtered current by the output voltage, and filtered later by utilizing a SOGI to acquire the averaged P–Q parameters. The proposed algorithm was compared with previous proposals, while keeping the active power steady-state ripple constant, which resulted in a faster calculation of the averaged active power. In this case, the steady-state averaged reactive power presented less ripple than the best proposal to which it was compared. When reducing the velocity of the proposed algorithm for the active power, it also showed a reduction in its steady-state ripple. Simulations, hardware-in-the-loop, and experimental tests were carried out to verify the effectiveness of the proposal. Full article

We propose an adaptive weighted high frequency iterative algorithm for a fractional-order total variation (FrTV) approach with nonlocal regularization to alleviate image deterioration and to eliminate staircase artifacts, which result from the total variation (TV) method. The high frequency gradients are reweighted in iterations adaptively when we decompose the image into high and low frequency components using the pre-processing technique. The nonlocal regularization is introduced into our method based on nonlocal means (NLM) filtering, which contains prior image structural information to suppress staircase artifacts. An alternating direction multiplier method (ADMM) is used to solve the problem combining reweighted FrTV and nonlocal regularization. Experimental results show that both the peak signal-to-noise ratios (PSNR) and structural similarity index (SSIM) of reconstructed images are higher than those achieved by the other four methods at various sampling ratios less than 25%. At 5% sampling ratios, the gains of PSNR and SSIM are up to 1.63 dB and 0.0114 from ten images compared with reweighted total variation with nuclear norm regularization (RTV-NNR). The improved approach preserves more texture details and has better visual effects, especially at low sampling ratios, at the cost of taking more time. Full article