Search Results (28)

Understanding microscale dynamic behavior in heterogeneous materials (e.g., polycrystalline or semiconductor systems) under impact loading requires diagnostics capable of resolving ~100 μm features. This study introduces a 19-core fiber-optic array probe with 100 μm spatial resolution, integrated with DISAR velocimetry on a light gas gun platform, enabling two-dimensional continuous measurement of free-surface velocity. The system overcomes limitations of conventional single-point methods (e.g., VISAR’s millimeter-scale resolution and reflectivity constraints) by achieving nanosecond temporal resolution and sub-nanometer displacement sensitivity. Under ~8 GPa impact loading, the probe captures spatiotemporal velocity heterogeneity in polycrystalline materials, including localized pull-back signals and periodic oscillations caused by shock wave reflections at microstructural interfaces. These observations reveal dynamic processes such as damage initiation and evolution, directly linking velocity profiles to microscale material response. The results provide experimental evidence of how grain-scale defects influence shock propagation and energy dissipation, advancing predictive models for extreme-condition material performance. This high-resolution, multi-channel approach offers a paradigm shift in diagnosing heterogeneous material behavior under high-strain-rate loading. Full article

Millimeter-wave devices have great application value and development prospects in military radar, satellite communication, and other fields. Extended interaction devices (EIDs) are widely used in various fields because of their small size, light weight, large bandwidth, and high output power, which are of great significance to the research of millimeter-wave sources. This article presents the design of a sheet beam, dual-beam, dual-cavity coupled extended interaction oscillator (EIO) that can operate separately at 94 GHz and 140 GHz. The coupling coefficient, characteristic impedance, and other parameters were analyzed to optimize the cavity structure and improve transmission performance. The results of the 3D particle-in-cell (PIC) simulation demonstrated that the designed EIO reached a peak output power of 6.3 kW and 41 kW, respectively, when driven by sheet electron beams of 3 A, 34 kV and 3 A, 56 kV. Full article

In this paper, we present a millimeter-wave CMOS down-conversion mixer designed for 5G cellular communications. The proposed mixer integrates a local oscillator buffer, an RF transconductance (Gm) stage, and a switching stage. A transformer-based harmonic suppression technique and separate RF Gm stage and switching stage are employed to achieve a low noise figure (NF), high conversion gain (CG), and effective harmonic suppression. Intermodulation and gain characteristics are analyzed, demonstrating enhanced harmonic suppression, high gain, and low NF. Implemented in 65 nm CMOS technology, the proposed mixer occupies a core chip area of 0.51 mm² and consumes a dc power of 7 mW. The implemented design achieves a CG of 6.4 dB, an NF of 6.1 dB, and an output third-order intercept point of 9.0 dBm at an RF frequency of 38.2 GHz. Additionally, harmonic suppression exceeds −26 dBc, highlighting the performance advantages of the proposed architecture. Full article

This paper demonstrates that potential oscillations in various frequency bands of monolithic microwave integrated circuits (MMICs) can be effectively suppressed using well-designed dual RC traps in the bias networks. The proposed approach is applied to the design and development of a highly stable W-band low-noise amplifier (LNA) MMIC for high-precision millimeter-wave applications. The amplifier is fabricated using the 0.1 µm GaAs pHEMT process from Win Semiconductors. The cascaded four-stage design consists of two low-noise-optimized stages, followed by two high-gain-tuned stages. Stability is enhanced through the integration of dual RC traps in the bias networks, which is rigorously evaluated using stability factors (K and μ) and network determinant function (NDF) encirclement analysis. In low-noise mode, the developed low-noise amplifier MMIC achieves a noise figure of 5.6−6.2 dB and a linear gain of 17.8−19.8 dB over the 90−98 GHz frequency range, while only consuming a DC power of 96 mW. In high-gain mode, it has a noise figure of 6.2−6.9 dB and a linear gain of 19.8−21.7 dB. Full article

This paper presents the design and the performance of a wide tuning-range millimeter-wave (mm-wave) two-core class-C 60 GHz VCO in 40 nm CMOS process, which can be integrated into wireless communication transceivers and radar sensors. The proposed architecture consists of a two-core 30 GHz fundamental VCO, a gain-boosted frequency doubler and an adaptive bias configuration. The two-core fundamental VCO structure achieves frequency generation in the vicinity of 30 GHz, where each VCO core targets a different frequency band. The two bands have sufficient overlap to accommodate for corner variations providing a large continuous tuning range. The desired frequency band is selected by activating or deactivating the appropriate VCO core, resulting in a robust switchless structure. This approach enables a considerably broad tuning range without compromising phase noise performance. Furthermore, the proposed topology utilizes an adaptive bias mechanism for robust start-up. Initially, the selected VCO core begins oscillating in class-B mode, and subsequently it transitions into class-C operation to offer improved performance. From post-layout simulations, after frequency doubling, the low-band VCO covers frequencies from 50.25 to 60.40 GHz, while the high-band VCO core spans frequencies from 58.8 to 73 GHz, yielding an overall tuning range of 36.92%. Owing to the gain-boosting topology, output power exceeds −14.2 dBm across the whole bandwidth. Simulated phase noise remains better than −92.1 dBc/Hz at a 1 MHz offset for all bands. Additionally, the two VCO cores never operate simultaneously, aiding in power efficiency. Full article

Optoelectronic oscillators (OEOs) have emerged as indispensable tools for generating low-phase-noise microwave and millimeter-wave signals, which are critical for a variety of high-performance applications. These include radar systems, satellite links, electronic warfare, and advanced instrumentation. The ability of OEOs to produce signals with exceptionally low phase noise makes them ideal for scenarios demanding high signal purity and stability. In radar systems, low-phase-noise signals enhance target detection accuracy and resolution, while, in communication networks, such signals enable higher data throughput and improved signal integrity over extended distances. Furthermore, OEOs play a pivotal role in precision instrumentation, where even minor noise can compromise the performance of sensitive equipment. This review examines the progress in OEO technology, transitioning from classical designs relying on long optical fiber delay lines to modern integrated systems that leverage photonic integration for compact, efficient, and tunable solutions. Key advancements, including classical setups, hybrid designs, and integrated configurations, are discussed, with a focus on their performance improvements in phase noise, side-mode suppression ratio (SMSR), and frequency tunability. A 20-GHz oscillation with an SMSR as high as 70 dB has been achieved using a classical dual-loop configuration. A 9.867-GHz frequency with a phase noise of −142.5 dBc/Hz @ 10 kHz offset has also been generated in a parity–time-symmetric OEO. Additionally, integrated OEOs based on silicon photonic microring resonators have achieved an ultra-wideband tunable frequency from 3 GHz to 42.5 GHz, with phase noise as low as −93 dBc/Hz at a 10 kHz offset. The challenges in achieving fully integrated OEOs, particularly concerning the stability and phase noise at higher frequencies, are also explored. This paper provides a comprehensive overview of the state of the art in OEO technology, highlighting future directions and potential applications. Full article

A millimeter-wave (mmWave) gallium nitride (GaN) high-power amplifier (HPA) monolithic microwave-integrated circuit (MMIC) was implemented, considering a source via effect. In this paper, we introduce guidelines for designing GaN HPA MMICs, from device sizing to meeting high-power specifications, power matching considering source via effects, schematic design of three-stage amplifier structures, and electromagnetic (EM) simulation. Based on the results of load pull simulation and small-signal maximum stable gain (MSG) simulation, the GaN high-electron-mobility transistor (HEMT) size was selected to be 8 × 70 μm. However, since the source via model provided by the foundry was significantly different from the EM results, it was necessary to readjust the power matching considering this. Additionally, when selecting the source via size, the larger the size, the easier the matching, but since the layout of the peripheral bias circuit is not possible, a compromise was required considering the actual layout. To prevent in-band oscillation, an RC parallel circuit was added to the input matching circuit, and low-frequency oscillation was solved by adding a gate resistor on the PCB module. The proposed PA was fabricated with a commercial 0.1 μm GaN HEMT MMIC process. It exhibited 38.56 to 39.71 dBm output power (P_out), 14.2 to 16.7 dB linear gain, and 14.1% to 18.2% power-added efficiency (PAE) in the upper Ka band. The fabricated GaN power amplifier MMIC shows competitive P_out in the upper Ka band above 33 GHz. Full article

In this study, we developed and demonstrated a millimeter-wave electric field imaging system using an electro-optic crystal and a highly sensitive polarization measurement technique using a polarization image sensor, which was fabricated using a 0.35-µm standard CMOS process. The polarization image sensor was equipped with differential amplifiers that amplified the difference between the 0° and 90° pixels. With the amplifier, the signal-to-noise ratio at low incident light levels was improved. Also, an optical modulator and a semiconductor optical amplifier were used to generate an optical local oscillator (LO) signal with a high modulation accuracy and sufficient optical intensity. By combining the amplified LO signal and a highly sensitive polarization imaging system, we successfully performed millimeter-wave electric field imaging with a spatial resolution of $30\times 60$ µm at a rate of 1 FPS, corresponding to 2400 pixels/s. Full article

The power gain and output power of millimeter-wave (mm-Wave) and terahertz (THz) amplifiers are critical performance metrics, particularly when the operating frequencies of amplifiers are near to the maximum oscillator frequency ($f_{max}$) of the transistor. This paper presents the design of a 110 GHz amplifier based on the quasi-linear method. The power gain can be boosted to maximum achievable gain ($G_{max}$) using a linear, lossless, reciprocal feedback network, though this leads to a simultaneous decrease in output power. Based on quasi-linear analysis, for an amplifier with $G_{max}$ gain, when the K-factor is equal to 1, the output power is zero. To avoid the very low output power of amplifiers, a new approach is proposed to balance power gain and output power. A 110 GHz six-stage feedback amplifier was designed using the proposed approach and fabricated using 40 nm CMOS technology. The measured power gain is 26.5 dB, and the saturation output power is 13 dBm at 110 GHz. Full article

This paper presents a 52-to-57 GHz CMOS quadrature voltage-controlled oscillator (QVCO) with a novel I/Q phase tuning technique based on a body bias control method. The QVCO employs an in-phase injection-coupling (IPIC) network comprising four diode-connected FETs for the quadrature phase generation. The I/Q phase error is calibrated by controlling the body bias voltage offset of the QVCO’s four core FETs. This technique effectively covers a wide range of I/Q phase error between −13.4° and +10.7°. It also minimally induces the unwanted variations in the phase noise, current dissipation, and oscillation frequency, which were found to be only 0.4 dB, 0.07%, and 36 MHz, respectively. After the IPIC-QVCO, a phase-tunable two-stage LO buffer employing a 3-bit switched-capacitor bank was added for additional phase tuning, leading to the extension of the phase tuning range up to −22.7–+20.0°. The proposed QVCO is implemented in a 40 nm RF CMOS process. The measured results show that the QVCO covers a frequency band from 52.4 to 57.6 GHz while consuming 26.2 mW. The phase noise and the figure-of-merit of the QVCO are −91.8 dBc/Hz at 1 MHz offset and −172.4 dBc/Hz, respectively. We also realized a fully integrated 55 GHz quadrature RF transmitter employing the phase-tunable QVCO and LO generator. The effectiveness of the proposed phase-tunable LO generator was confirmed by verifying the image rejection ratio (IRR) calibration at the RF output. Full article

Low-phase noise and wideband phased-locked loops (PLLs) are crucial for high-data rate communication and imaging systems. Sub-millimeter-wave (sub-mm-wave) PLLs typically exhibit poor performance in terms of noise and bandwidth due to higher device parasitic capacitances, among other reasons. In this regard, a low-phase-noise, wideband, integer-N, type-II phase-locked loop was implemented in the 22 nm FD-SOI CMOS process. The proposed wideband linear differential tuning I/Q voltage-controlled oscillator (VCO) achieves an overall frequency range of 157.5–167.5 GHz with 8 GHz linear tuning and a phase noise of −113 dBc/Hz @ 100 KHz. Moreover, the fabricated PLL produces a phase noise less than −103 dBc/Hz @ 1 KHz and −128 dBc/Hz @ 100 KHz, corresponding to the lowest phase noise generated by a sub-millimeter-wave PLL to date. The measured RF output saturated power and DC power consumption of the PLL are 2 dBm and 120.75 mW, respectively, whereas the fabricated chip comprising a power amplifier and an integrated antenna occupies an area of 1.25 × 0.9 mm². Full article

Positronium (Ps) is an unstable system created by the temporary combination of electrons and negative electrons, and Ps generation technology under resonance conditions at millimeter waves is emerging as a new research topic. In general, Ps can be observed when an unstable separate state remains after electron and positron pair annihilation, as in positron emission tomography (PET). However, in this study, a plasma wakefield accelerator based on vacuum electronics devices (VEDs) was designed in the ponderomotive force generating electrons and positrons simultaneously using annular relativistic electron beams. It can induce Cherenkov radiation from beam–wave interaction by using dielectric materials. According to the size of dielectric materials, the frequency of oscillation is approximately 203 GHz at the range of millimeter waves. At this time, the output power is about 10⁹ watts-levels. Meanwhile, modes of millimeter waves polarized by a three-stepped axicon lens are used to apply the photoconversion technology. Thus, it is possible to confirm light emission in the form of a light-converted Bessel beam. Full article

In this paper, the results of the microfabrication, characterization, and cold-test study of the previously proposed truncated sine-waveguide interaction structure with wideband-matched output couplers for the millimeter-band backward-wave oscillator (BWO) driven by a high-current-density sheet electron beam are presented. Computer-numerical-control (CNC) micromilling was used to fabricate the designed interaction structure. The first sample was microfabricated from an aluminum alloy to test the milling process. The final sample was made from oxygen-free copper. Scanning electron microscopy (SEM) and optical microscopy were used to investigate the morphology of the microfabricated samples, and stylus profilometry was used to estimate the level of the surface roughness. Cold S-parameters were measured in Q- and V-bands (40–70 GHz), using a vector network analyzer (VNA). Using the experimentally measured phase data of the transmitted signal, the dispersion of the fabricated interaction structure was evaluated. The experimentally measured dispersion characteristic is in good agreement with the numerically calculated. Full article

This paper presents a design of a 48 GHz CMOS phase-locked loop (PLL) for 60 GHz millimeter-wave (mmWave) communication systems. For the sliding intermediate frequency (sliding-IF) transceiver applications, a fundamental frequency PLL with quadrature clock generation scheme is proposed. Specifically, with an implicit capacitive-bridged shunt peaking network, a second order harmonic filtering technique is realized in the voltage control oscillator (VCO) to broaden the bandpass response, thereby avoiding the complex common-mode resonant tank calibration and improving the phase noise performance. A robust current mode logic (CML) static frequency divider topology is adopted to realize the prescaler and to generate the quadrature clock. With the capacitive-bridged shunt peaking load and robust biasing circuit, the static frequency divider locking range and high frequency performance is improved and its reliability is enhanced over the PVT corners. To improve the image suppression ratio of the transceiver, a quadrature clock phase calibration scheme is proposed and verified. Fabricated in a 65 nm CMOS process, the PLL occupies a core area of 800 μm × 950 μm. Over the frequency range of 45.2 to 52.6 GHz, the measured PLL in-band phase noise PLL is better than −90 dBc/Hz@100 KHz offset, and its jitter is less than 155 fs. Moreover, the reference spur is less than −60 dBc/Hz. Full article

This paper presents a 40 GHz voltage-controlled oscillator (VCO) and frequency divider chain fabricated in STMicroelectronics 28 nm ultrathin body and box (UTBB) fully depleted silicon-on-insulator (FD-SOI) complementary metal-oxide–semiconductor (CMOS) process with eight metal layers back-end-of-line (BEOL) option. VCOs architecture is based on an LC-tank with p-type metal-oxide–semiconductor (PMOS) cross-coupled transistors. VCOs exhibit a tuning range (TR) of 3.5 GHz by exploiting two continuous frequency tuning bands selectable via a single control bit. The measured phase noise (PN) at 38 GHz carrier frequency is −94.3 and −118 dBc/Hz at 1 and 10 MHz frequency offset, respectively. The high-frequency dividers, from 40 to 5 GHz, are made using three static CMOS current-mode logic (CML) Master-Slave D-type Flip-Flop stages. The whole divider factor is 2048. A CMOS toggle flip-flop architecture working at 5 GHz was adopted for low frequency dividers. The power dissipation of the VCO core and frequency divider chain are 18 and 27.8 mW from 1.8 and 1 V supply voltages, respectively. Circuit functionality and performance were proved at three junction temperatures (i.e., −40, 25, and 125 °C) using a thermal chamber. Full article