Search Results (89)

The exponential growth of AI-driven data traffic necessitates the evolution of Data Center Networks toward high bandwidths and sub-microsecond latency. While co-packaged optics (CPO) offer a pathway to reduced energy consumption and increased capacity, they introduce significant challenges in optical chip coupling and packaging complexity. This study explores monolithically integrated metasurfaces as an alternative for optical interfaces, potentially reducing the need for bulky external microlens arrays or extremely precise mechanical alignment. We design an amorphous silicon (a-Si) metasurface on a Silicon-On-Insulator (SOI) platform operating at 1310 nm. By spatially mapping nanopillar radii to satisfy a spherical phase profile, we achieved near-vertical beam emission with an emission angle of 0.88° focused at a focal length of 98.99 μm. Broadband characterization across a 20 nm band confirms stable focusing and a confined spot size with moderate roll-off toward the band edges. The sensitivity of the emission profile of the device to fabrication imperfections in pillar radius, height, and sidewall taper is quantified. The coupling to a polymer-based optical redistribution layer (ORDL) is also studied, and the corresponding modal analysis demonstrates a maximum coupling efficiency of 68.2% into an SU-8 polymer waveguide. Tolerance analysis results reveal deterioration of 0.9 dB and 0.4 dB for $\pm 0.6 \mathsf{\mu }\mathrm{m}$ horizontal and $\pm 1.5 \mathsf{\mu }\mathrm{m}$ vertical misalignment respectively, making the interface compatible with relaxed alignment assembly assumptions, although experimental packaging validation remains required. The methodology is further validated at 1550 nm, demonstrating its applicability across telecom bands. These results suggest that integrated metasurfaces may simplify the packaging stack and enhance density for next-generation CPO links by providing precise, on-chip wavefront manipulation. Full article

Fiber Bragg Grating (FBG) sensors are widely used for strain and temperature monitoring due to their high sensitivity, compact size, electromagnetic immunity, and multiplexing capability. While conventional FBG interrogators remain bulky and costly, Photonic Integrated Circuit (PIC) platforms provide a promising route toward compact, scalable, and low-power FBG interrogation. However, the choice of architecture strongly determines the achievable resolution, bandwidth, multiplexing capacity, and robustness. This review compares on-chip demodulation architectures, evaluating their performance in resolution, bandwidth, and interrogation speed. We show that the optimal architecture depends strongly on the application: AWG-based schemes excel in compact, multi-FBG readout; ring-resonator systems are highly effective for tunable filtering; and interferometric phase-domain schemes offer the highest sensitivity for dynamic strain sensing. Despite these architectural advances, practical deployment remains constrained by system-level bottlenecks. These challenges primarily include source/detector integration, fiber–chip coupling, packaging robustness, and thermal drift. Overcoming these barriers requires a shift in future development from isolated photonic-device optimization toward comprehensive, system-level co-design. Full article

Silicon photonic integrated circuit (Si-PIC) components/devices based on silicon-on-insulator (SOI) waveguides have become critical components in modern optoelectronic information systems. This investigation systematically examines optical propagation losses (OPLs) induced by the sidewall roughness (SWR) of a waveguide through comparative analysis of two scattering-loss theoretical frameworks: the SWR-improved Payne–Lacey (P-L) three-dimensional (3-D) formalism and Hörmann’s 3-D perturbation model. Crucially, our computational results identify SWR = 10 nm as the convergence threshold where both models exhibit consistent OPL predictions across waveguide architectures. Single-mode SOI rib waveguides with 0.5 µm high ribs on 2.0 µm silicon film and a 2.0 μm BOX layer were designed and fabricated using the classic ICP-RIE technique. Furthermore, SWRs of 28 nm were obtained with confocal laser scanning microscopy for SOI waveguides, leading to OPLs of 2.66 and 2.67 dB/cm for TE and TM modes, respectively, from the 2-D SWR-enhanced P-L model, and 1.7 and 1.9 dB/cm, respectively, from the Hörmann 3-D model. Finally, the average experimental result of OPL for the same waveguide was 2.61 dB/cm, showing a strong agreement with the numerical values of the SWR-improved P-L 3-D formalism, providing a robust framework for optimizing industrial-grade SOI waveguide-based PIC devices/components. Full article

This work presents a silicon-on-insulator (SOI) refractive index sensor based on a coupled resonator optical waveguide (CROW) architecture employing two inversely coupled Sagnac loop reflectors (SLRs) connected through a self-coupled feedback waveguide. The structure exploits bidirectional propagation and discrete–continuum interference to produce sharp Fano-type asymmetric resonances with steep spectral slopes, enabling enhanced wavelength sensitivity. Numerical analysis demonstrates that tuning the loop radius, directional-coupler length, coupling gap, and feedback-path length provides precise control over free spectral range (FSR), resonance asymmetry, and spectral sharpness. The sensor exhibits consistent and monotonic resonance shifts for refractive index variations from 1.33 to 1.36, with sensitivities ranging from 106 to 120 nm/RIU for the ridge feedback configuration. Sensitivity is further improved by introducing a subwavelength grating (SWG) segment into the feedback waveguide, which enhances evanescent-field interaction and increases the overlap factor without compromising compactness or Fano asymmetry. The SWG-assisted design attains sensitivities of 185.8–212.2 nm/RIU, nearly doubling sensitivity. The proposed coupled-SLR CROW provides a compact footprint, high-Q resonances, and flexible spectral engineering through accessible geometric parameters. These characteristics highlight the potential of the coupled-SLR and SWG-enhanced CROW as a promising platform for high-resolution, photonic refractive index sensing applications on SOI. Full article

Silicon–nitride (SiN) waveguides have emerged as fundamental building blocks in silicon photonic integrated circuits (Si-PICs), offering advantages that compensate for the intrinsic limitations of silicon-on-insulator (SOI) and silica-on-silicon (SOS) platforms. In this work, two sizes of single-mode SiN strip waveguides are investigated: (i) 600 nm wide strip waveguide cores on a 400 nm thick Si₃N₄ film and (ii) 1.0 µm wide strip waveguide cores on a 1.0 µm thick Si₃N₄ film. First, we design two AWG architectures and develop a generalized theoretical model for one of the key specifications—polarization mode dispersion (PMD)—by considering a pair of orthogonal polarization states in these two waveguides. Then, as the two-size SiN waveguides are generally fabricated via multiple operating processes of coating, photolithography, and etching, we investigate the dependences of PMD performances on the device errors of the two AWG architectures caused by the coating/manufacturing qualities and accuracies, and the dependences of PMD performance on the refractive index errors of the waveguide core. As a consequence, the softwaretool simulations for the two AWG architectures of 40-channel 0.8 nm channelspacing show that the average PMDs of the above two waveguide sizes are <0.50 ps and <0.35 ps, respectively, and the PMD responses to the ±10% fabrication error are < ±0.20 ps and ±10% fluctuation, respectively, but the ±2.5% variations have no obvious impacts upon the PMD performance. Therefore, it turns out that the PMD performance of a smaller waveguide has a relatively strong error sensitivity to the AWG architecture, while the larger waveguide size has a relatively weak error sensitivity to the AWG architecture. Full article

Silicon–germanium (Si-Ge) avalanche photodiodes (APDs), fully compatible with complementary metal–oxide–semiconductor (CMOS) processes, are critical devices for high-speed optical communication. In this work, we propose a three-terminal Si-Ge APD on a silicon-on-insulator (SOI) substrate based on device simulation studies. The proposed APD employs a separate absorption and multiplication structure, achieving an ultra-low breakdown voltage of 6.8 V. The device operates in the O-band, with optical signals laterally coupled into the Ge absorption layer via a silicon nitride (Si₃N₄) waveguide. At a bias of 2 V, the APD exhibits a responsivity of 0.85 A/W; under a bias of 6.6 V, it achieves a 3-dB optoelectronic (OE) bandwidth of 51 GHz, a direct current gain of 27, and a maximum gain–bandwidth product (GBP) of 1377 GHz. High-speed performance is further confirmed through eye-diagram simulations at 100 Gbps non-return-to-zero (NRZ) and 200 Gbps four-level pulse amplitude modulation (PAM4). These results clearly show the strong potential of the proposed APD for optical communication and interconnect applications under stringent power and supply voltage constraints. Full article

As an emerging platform for high-precision sensing, integrated silicon-waveguide-based cavity optomechanical devices face a critical fabrication challenge in the co-fabrication of silicon-on-insulator (SOI) micromechanical structures and optical waveguides: the silicon oxide (SiO₂) layer beneath the waveguides is susceptible to etching during hydrofluoric acid (HF) release of the microstructures, leading to waveguide collapse and significantly reducing production yields. This study proposes a novel selective protection process based on a magnesium fluoride (MgF₂) thin film to address the critical challenge of long-range waveguide collapse during hydrofluoric acid (HF) etching. By depositing a MgF₂ protective layer over the waveguide regions via optical coating technology, localized protection of specific SiO₂ areas during HF etching is achieved. The experimental results demonstrate the successful release of silicon waveguides with lengths of up to 5000 μm and a significant improvement in production yield. This work provides a compatible and efficient strategy for the fabrication of robust photonic–microelectromechanical integrated devices. Full article

In this article, one-dimensional photonic crystal cavities on bending waveguides (PCCoBW) used for achieving high-contrast spectra are proposed, analyzed, and experimentally verified on silicon on insulator (SOI). Both air and dielectric modes of the PCCoBW calculated by the finite-difference time-domain (FDTD) method show finger-ring-like mode profiles with the achievement of high-quality factors (Q∼10⁶), even when the bending radius is less than 50 times the lattice constant. Straight waveguides side-coupled to the cavity are used to access and measure mode resonances. The measured spectra show a high extinction ratio over 40 dB for dielectric modes and 20 dB for air modes, respectively. Both dielectric and air resonant modes are revealed with Q-factors over 3.3 × 10⁴ and 7.9 × 10⁴, respectively, for the coupled PCCoBWs. The proposed PCCoBW could be implemented as high-contrast notch filtering and would benefit a broad range of applications such as optical filters, modulators, sensors, or switches. Full article

To improve the efficiency and stability of the system, this paper proposes a monolithic integrated optical path design for a cavity optomechanical accelerometer based on a 250 nm top silicon thickness silicon-on-insulator (SOI) wafer instead of readout through U-shape fiber coupling. Finite Element Analysis (FEA) and Finite-Difference Time-Domain (FDTD) methods are employed to systematically investigate the performance of key optical structures, including the resonant modes and bandgap characteristics of photonic crystal (PhC) microcavities, transmission loss of strip waveguides, coupling efficiency of tapered-lensed fiber-to-waveguide end-faces, coupling characteristics between strip waveguides and PhC waveguides, and the coupling mechanism between PhC waveguides and microcavities. Simulation results demonstrate that the designed PhC microcavity achieves a quality factor (Q-factor) of 2.26 × 10⁵ at a 1550 nm wavelength while the optimized strip waveguide exhibits a low loss of merely 0.2 dB over a 5000 μm transmission length. The strip waveguide to PhC waveguide coupling achieves 92% transmittance at the resonant frequency, corresponding to a loss below 0.4 dB. The optimized edge coupling structure exhibits a transmittance of 75.8% (loss < 1.2 dB), with a 30 μm coupling length scheme (60% transmittance, ~2.2 dB loss) ultimately selected based on process feasibility trade-offs. The total optical path system loss (input to output) is 5.4 dB. The paper confirms that the PhC waveguide–microcavity evanescent coupling method can effectively excite the target cavity mode, ensuring optomechanical coupling efficiency for the accelerometer. This research provides theoretical foundations and design guidelines for the fabrication of high-precision monolithic integrated cavity optomechanical accelerometers. Full article

We developed the Global–Local Integrated Topology inverse design algorithm (denoted as the GLINT algorithm), which employs a trajectory-based optimization strategy with waveguide–substrate material-flipping structural modifications, enabling the direct optimization of discrete waveguide–substrate binary structures. Compared to the conventional Direct Binary Search (DBS), the GLINT algorithm not only significantly enhances computational efficiency through its global search–local refinement framework but also achieves a superior 20 nm × 20 nm optimization resolution while maintaining its optimization speed—substantially advancing the design capability. Utilizing this algorithm, we designed and experimentally demonstrated a 3.5 µm × 3.5 µm dual-port wavelength division multiplexer (WDM), achieving a minimum crosstalk of −11.3 dB and a 2 µm × 2 µm 90-degree bending waveguide exhibiting a 0.31–0.52 dB insertion loss over the 1528–1600 nm wavelength range, both fabricated on silicon-on-insulator (SOI) wafers. Additionally, a 4.5 µm × 4.5 µm three-port WDM structure was also designed and simulated, demonstrating crosstalk as low as −36.5 dB. Full article

This study presents a photonic integrated optical sensor based on a dual-polarization microring resonator with angular gratings on a silicon-on-insulator (SOI) waveguide, enabling simultaneous and precise refractive index (RI) and temperature measurements. Due to the distinct energy distributions for transverse electric ($\mathit{TE}$) and transverse magnetic ($\mathit{TM}$) modes in SOI waveguides, these modes show distinct sensitivity responses to the variation in ambient RI and temperature. Simultaneous measurements of both temperature and RI are enabled by exciting both these transverse modes in the microring resonator structure. Furthermore, incorporating angular gratings into the microring resonator’s inner sidewall extends the temperature measurement range by mitigating free spectral range limitations. This work presents a novel approach to dual-polarization microring resonators with angular gratings, offering an enhanced temperature measurement range and detection limit in optical sensing applications requiring an extended temperature range. The proposed structure is able to yield a simulated temperature measurement range of approximately 35 nm with a detection limit as low as $2.99\times {10}^{-5}$. The achieved temperature sensitivity is 334 pm/°C and RI sensitivity is 13.33 nm/RIU for the ${\mathit{TE}}_0$ mode, while the ${\mathit{TM}}_0$ mode exhibits a temperature sensitivity of 260 pm/°C and an RI sensitivity of 76.66 nm/RIU. Full article

In recent years, research on light-matter interactions in silicon-based micro/nano cavity optomechanical systems demonstrates high-resolution sensing capabilities (e.g., sub-fm-level displacement sensitivity). Conventional 2D photonic crystal (PhC) cavity optomechanical sensors face inherent limitations: thin silicon layers (200–300 nm) restrict both the mass block (critical for thermal noise suppression) and optical Q-factor. Enlarging the detection mass in such thin layers exacerbates in-plane height nonuniformity, severely limiting high-precision sensing. This study proposes a 500 nm thick silicon-based 2D slot-type PhC cavity design for advanced sensing applications, fabricated on a silicon-on-insulator (SOI) substrate with optimized air slot structures. Systematic parameter optimization via finite element simulations defines structural parameters for the 1550 nm band, followed by 6 × 6 × 6 combinatorial experiments on lattice constant, air hole radius, and line-defect waveguide width. Experimental results demonstrate a loaded Q-factor of 57,000 at 510 nm lattice constant, 175 nm air hole radius, and 883 nm line-defect waveguide width (measured sidewall angle: 88.4°). The thickened silicon layer delivers dual advantages: enhanced mass block for thermal noise reduction and high Q-factor for optomechanical coupling efficiency, alongside improved ridge waveguide compatibility. This work advances the practical development of CMOS-compatible micro-opto-electromechanical systems (MOEMS). Full article

Many current 1 × 2 splitter couplers based on multimode interference (MMI) face difficulties such as significant back reflection and limited flexibility in waveguide segmentation at the output, which necessitate the addition of transitional structures like tapered waveguides or S-Bends. These limitations reduce their effectiveness as photonic data-center applications, where precise waveguide configurations are crucial. To address these challenges, we propose a novel nanoscale 1 × 2 angled multimode interference (AMMI) power splitter with silicon nitride (SiN) buried core and silica cladding. The innovative angled light path design improved performance by minimizing back reflections back to the source and by providing greater flexibility of waveguide interconnections, making the splitter more adaptable for data-center applications. The SiN core was selected due to its lower refractive index contrast with silica compared to silicon, which helps further reduce back reflection. The dimensions of the splitter were optimized using full vectorial beam propagation method (FV-BPM), finite-difference time domain (FDTD), and multivariable optimization scanning tool (MOST) simulations to support transmission across the O-band. Our proposed device demonstrated excellent performance, achieving an excess loss of 0.22 dB and an imbalance of <0.01 dB at the output ports at an operational wavelength of 1.31 µm. The total device length is 101 µm with a thickness of 0.4 µm. Across the entire O-band range (1260–1360 nm), the performance of the splitter presented excess loss of up to 1.57 dB and an imbalance of up to 0.05 dB. Additionally, back reflections at the operational wavelength were measured at −40.96 dB and up to −39.67 dB over the O-band. This silicon-on-insulator (SOI) complementary metal-oxide semiconductor (CMOS) compatible AMMI splitter demonstrates high tolerance for manufacturing deviations due to its geometric layout, dimensions, and material selection. Furthermore, the proposed splitter is well-suited for use in O-band transceiver systems and can enhance data-center optical networks by supporting high-speed, low-loss data transmission. The compact design and CMOS compatibility make this device ideal for integrating into dense, high-performance computing environments, ensuring reliable signal distribution and minimal power loss. The splitter can support multiple communication channels, thus enhancing bandwidth and scalability for next-generation data-center infrastructures. Full article

The demand for faster and more efficient optical communication systems has driven significant advancements in integrated photonic technologies, with optical switches playing a pivotal role in high-speed, low-latency data transmission. In this work, we introduce a novel design for an adiabatic optical switch based on the thermo-optic effect using silicon-on-insulator (SOI) technology. The approach relies on slow optical signal evolution, minimizing power dissipation and addressing challenges of traditional optical switches. Machine learning (ML) techniques were employed to optimize waveguide designs, ensuring polarization-independent (PI) and single-mode (SM) conditions. The proposed design achieves low-loss and high-performance operation across a broad wavelength range (1500–1600 nm). We demonstrate the effectiveness of a Y-junction adiabatic switch, with a tapered waveguide structure, and further enhance its performance by employing thermo-optic effects in hydrogenated amorphous silicon (a-Si:H). Our simulations reveal high extinction ratios (ERs) exceeding 30 dB for TE mode and 15 dB for TM mode, alongside significant improvements in coupling efficiency and reduced insertion loss. This design offers a promising solution for integrating efficient, low-energy optical switches into large-scale photonic circuits, making it suitable for next-generation communication and high-performance computing systems. Full article

The Talbot effect concerns the periodic self-imaging along an optical axis of a free-space optical field that is periodic in an initial transverse plane. It may be modeled by a shift-invariant linear system, fully characterized by the convolution of its impulse response. Self-imaging at integer and fractional Talbot distances of point sources on a regular grid in free space may then be represented by a transmission matrix that is circulant, symmetric, and persymmetric. The free-space Talbot effect may be mapped to the Talbot effect in a multimode waveguide by imposing the anti-symmetry of the mirror-like sidewalls created by the tight confinement of light within a high-index contrast multimode waveguide. The position of the anti-symmetry axis controls the distribution of discrete lattice points in a unit cell. For different distributions, interesting features such as conditional flexibility in the placement of access ports without altering amplitude and phase relationships, omitting ports without power penalty, closed form uneven splitting ratios, and offset access ports can be derived from the MMI coupler. As a specific example, a simple $2\times 2$ MMI coupler is shown to provide a power-splitting ratio related to the golden ratio $\phi$. The structure is amenable to planar photonic integration on any high-index contrast platform. The predictions of the theory are confirmed by simulation and verified by experimental measurements on a golden ratio MMI coupler fabricated using an SOI process. Full article