Design and Application of Spintronic Devices

A special issue of Magnetochemistry (ISSN 2312-7481). This special issue belongs to the section "Spin Crossover and Spintronics".

Deadline for manuscript submissions: 30 June 2026 | Viewed by 1849

Special Issue Editor

School of Physics and Wuhan National High Magnetic Field Center, Huazhong University of Science and Technology, Wuhan, China
Interests: spintronics devices; new molecular magnets; low-dimensional materials; multifunctional materials
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Special Issue Information

Dear Colleagues,

Spintronic devices represent a leading field in modern electronics, allowing the spin of electrons—in addition to their charge—to store and process information. This emerging technology offers the potential to overcome the limitations of traditional electronic devices, such as energy consumption and scalability. By harnessing the quantum mechanical properties of electron spin, spintronics promises faster, more efficient, and more reliable computation. Applications range from high-performance memory devices to energy-efficient sensors and quantum computing systems. The design of spintronic devices involves the intricate manipulation of magnetic materials and nanostructures, often using novel concepts such as spin-transfer torque and magnetic tunnel junctions. As the field continues to evolve, spintronic devices are poised to revolutionize the electronics industry, leading to more sustainable and powerful computing solutions in the future.

Guest Editors

Dr. Lin Zhu
Guest Editor

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Keywords

  • spintronic devices
  • electron spin
  • magnetic materials
  • nanostructures spin
  • transfer torque
  • magnetic tunnel junctions
  • high-performance memory
  • energy-efficient sensors
  • quantum computing systems

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Published Papers (2 papers)

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Research

15 pages, 2498 KB  
Article
A Hybrid CMOS-MTJ Polymorphic Logic for Secure and Versatile IC Design
by Rajat Kumar, Yogesh Sharma and Amit Kumar Goyal
Magnetochemistry 2025, 11(12), 108; https://doi.org/10.3390/magnetochemistry11120108 - 8 Dec 2025
Viewed by 175
Abstract
Recent advancements in nanotechnology have intensified research efforts to address security concerns like hardware trojans and intellectual property (IP) piracy, particularly by exploring novel alternatives to traditional MOSFET devices. Spin-based devices, known for their low power consumption, non-volatility, and seamless integration with silicon [...] Read more.
Recent advancements in nanotechnology have intensified research efforts to address security concerns like hardware trojans and intellectual property (IP) piracy, particularly by exploring novel alternatives to traditional MOSFET devices. Spin-based devices, known for their low power consumption, non-volatility, and seamless integration with silicon substrates, have emerged as promising candidates. This research proposes a novel approach to enhance the security of integrated circuits using spin-based devices known as magnetic tunnel junctions (MTJs). A Non-volatile Polymorphic Logic (NPL) is optimized and designed to perform multiple operations, effectively concealing its true functionality. The analytical studies conducted on the Cadence Virtuoso platform using TSMC 65 nm MOS technology demonstrate the feasibility and efficacy of the proposed approach. The proposed NPL circuit enables polymorphism by allowing the circuit to perform all one- and two-input Boolean logic operations, including NOT, AND/NAND, OR/NOR, and XOR/XNOR, through adjustments of applied keys. This dynamic functionality makes it challenging for attackers to determine the circuit’s true operation. The proposed design exhibits similar timing characteristics for different logic operations, which further complicates the tampering attempts. Additionally, the circuit’s layout is designed to be symmetric, ensuring the execution of all possible operations by the same physical layout. This provides post-manufacturing security from reverse engineering and finds its applications in securing custom IC designs against the evolving landscape of hardware-based threats. Full article
(This article belongs to the Special Issue Design and Application of Spintronic Devices)
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13 pages, 3859 KB  
Article
Design of a 2–4 Decoder Based on All-Spin Logic and Magnetic Tunnel Junction
by Sen Wang, Yongfeng Zhang and Dan Shan
Magnetochemistry 2025, 11(2), 17; https://doi.org/10.3390/magnetochemistry11020017 - 15 Feb 2025
Viewed by 994
Abstract
A 2–4 decoder based on all-spin logic (ASL) and magnetic tunnel junction (MTJ) is proposed. The decoder employs five-input minority gates to realize three-input NOR gates, which reduces the circuit size compared to the three-input minority gates. Simultaneously, the inputs of the original [...] Read more.
A 2–4 decoder based on all-spin logic (ASL) and magnetic tunnel junction (MTJ) is proposed. The decoder employs five-input minority gates to realize three-input NOR gates, which reduces the circuit size compared to the three-input minority gates. Simultaneously, the inputs of the original and reverse variables are implemented by initializing the MTJ fixed layer magnetization in different directions, which avoids the use of inverters. In addition, the 2–4 decoder adopts a single-input single-fan-out (SISF) structure, which reduces the channel length. To illustrate the advantages of the five-input minority gate, inverter-free structure, and SISF structures in designing the proposed 2–4 decoder, a second 2–4 decoder is proposed that uses three-input minority gates, inverters, and a single-input multiple-fan-out structure. Compared with the second decoder, the first decoder has the layout area reduced to 37.9%, the total channel length reduced to 40.8%, and the number of clock cycles reduced to one-third. Importantly, the design methods used in this work, such as multi-input minority gates, SISF structure, and inverter-free structure, provide an interesting approach for designing large-scale ASL logic circuits. Full article
(This article belongs to the Special Issue Design and Application of Spintronic Devices)
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