Emerging Network-on-Chip Architectures for Low Power Embedded Systems
A special issue of Journal of Low Power Electronics and Applications (ISSN 2079-9268).
Deadline for manuscript submissions: closed (31 January 2017) | Viewed by 54480
Special Issue Editor
Interests: network-on-chip; blockchains; machine learning; hardware accelerators
Special Issues, Collections and Topics in MDPI journals
Special Issue Information
Dear Colleagues,
Manycore architectures, formed by hundreds of processing elements, will soon replace traditional multicore architectures, bringing new opportunities and effective energy-performance trade-offs, but also introducing new design challenges.
Network-on-Chip emerged in recent years as a viable solution for the design of manycore embedded systems of the next generation. However, communication infrastructure scalability, memory bottleneck and parallelization of tasks, just to cite few examples, are becoming the limiting factors that hardware designers and software developers will be facing in the upcoming years.
This Special Issue on “Emerging Network-on-Chip Architectures for Low Power Embedded Systems” will focus on emerging approaches and recent advances on architectures, design techniques, modeling and prototyping solutions for the design of power/performance efficient Network-on-Chip systems in the manycore era.
Prof. Dr. Davide Patti
Guest Editor
Manuscript Submission Information
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Keywords
- Power Management algorithms and strategies for manycore architectures
- Novel architectures for embedded low power computing
- Energy-aware Parallel architectures for high performance computing
- Design Platforms and Tools for optimizing energy/performance tradeoffs
- New trends in Network-on-Chip architectures
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