Low-Power and High-Efficiency Circuit Design for Next-Generation Microchips
A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Microelectronics".
Deadline for manuscript submissions: 20 December 2026 | Viewed by 72
Special Issue Editors
Interests: analog/mixed-signal integrated circuit design; power management IC; data converters; low-power circuit design for next-generation communication and sensor systems
Interests: AI semiconductor and neuromorphic computing hardware; emerging memory devices and in-memory computing; device-circuit co-design for energy-efficient neural network accelerators; spintronic and post-CMOS device-based circuits; low-power circuit design for next-generation AI and edge computing systems
Special Issues, Collections and Topics in MDPI journals
Interests: energy-efficient data converters (SAR ADC, pipelined-SAR ADC, delta-sigma modulator); NAND flash readout circuits; neuromorphic computing hardware; mixed-signal IC design for biomedical, memory, and communication systems
Special Issue Information
Dear Colleagues,
The continuous scaling of CMOS technology and the rapid emergence of new application domains—including artificial intelligence accelerators, high-bandwidth memory interfaces, biomedical sensing, the Internet of Things (IoT), high-speed wireline and wireless communications, and edge computing—have made low-power and high-efficiency circuit design one of the most critical research challenges for next-generation microchips. As supply voltages continue to decrease and integration density grows, designers must simultaneously address energy efficiency, signal integrity, thermal constraints, process variability, and reliability, while still delivering high performance.
This Special Issue aims to bring together recent advances in the design, modeling, and implementation of low-power and high-efficiency circuits and systems for next-generation microchips. We welcome original research and comprehensive review articles covering—but not limited to—energy-efficient data converters (SAR, pipelined-SAR, delta-sigma, time-domain ADCs/DACs), low-power analog and mixed-signal building blocks, high-speed serial link transceivers (PCIe, DDR, Ethernet) and equalization techniques, RF and millimeter-wave front-ends, power management ICs and voltage regulators, memory interface and readout circuits (including NAND/DRAM/CXL), neuromorphic and in-memory computing hardware, AI accelerator circuits, biomedical and sensor interface electronics, and design methodologies and EDA techniques that enable low-power and high-efficiency implementation.
By gathering high-quality contributions from both academia and industry, this Special Issue will complement the existing literature by providing an up-to-date perspective on practical circuit techniques, architectural innovations, and design methodologies that push the boundaries of energy efficiency in modern integrated systems. We sincerely invite researchers and practitioners working in these areas to share their latest findings and contribute to shaping the future of low-power microelectronics.
Dr. Joongho Choi
Dr. Minsuk Koo
Dr. Minjae Seo
Guest Editors
Manuscript Submission Information
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Keywords
- low-power circuit design
- high-efficiency integrated circuits
- mixed-signal IC
- data converters (ADC/DAC)
- delta-sigma modulator
- high-speed serial links/equalization
- RF and millimeter-wave circuits
- power management IC
- memory interface and readout circuits
- neuromorphic and in-memory computing
- AI accelerator hardware
- biomedical and sensor interfaces
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