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Electronics
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Advanced Applications of Smart Power Technologies and Wide-Bandgap Semiconductors
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Advanced Applications of Smart Power Technologies and Wide-Bandgap Semiconductors

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Power Electronics".

Deadline for manuscript submissions: 15 July 2026 | Viewed by 4394

Special Issue Editor

Dr. Fortunato Pezzimenti

E-Mail Website
Guest Editor
Department of Information Engineering, Infrastructure and Sustainable Energy, Mediterranea University of Reggio Calabria, Via Salita Melissari, 89124 Reggio Calabria, Italy
Interests: power electronics; wide-bandgap semiconductors; energy systems; semiconductor device modelling; device physics; TCAD simulations
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

In recent years, wide bandgap (WBG) semiconductors and, in particular, silicon carbide (SiC) and gallium nitride (GaN) have been extensively proposed for power systems to improve current and future power electronics in different fields, such as industrial, automotive, aerospace, and energy conversion. Compared with conventional technologies, WBG semiconductors promise the realization of smaller, faster, more efficient, and rugged devices with low losses and high levels of quality and safety. However, the design and electrical characterization of WBG-based devices for smart power and advanced applications impose the deployment of intensive experimental and modelling efforts for the analysis of the critical aspects of their operation under specific bias conditions, especially in high-voltage, high-frequency, and high-temperature circuits.

In this Special Issue, original research articles and reviews are welcome. Research areas may include (but are not limited to) the following:

  • Application area of WBG semiconductors;
  • SiC- and GaN-based devices;
  • Novel design and modelling approaches;
  • Heterojunction structures;
  • Analysis of the material physical properties;   
  • Smart power technologies;
  • Power generation;
  • Power conversion systems;
  • Power optimizers;
  • Energy harvesting;
  • Relevant experimental results;
  • Advanced technological processes.

I look forward to receiving your contributions.

Dr. Fortunato Pezzimenti
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 250 words) can be sent to the Editorial Office for assessment.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • smart power
  • wide-bandgap semiconductor
  • switching device
  • field-effect transistor
  • breakdown voltage
  • series resistance
  • temperature
  • numerical simulation

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Published Papers (3 papers)

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Research

13 pages, 4207 KB  
Article
A Novel Low-Voltage-Based Methodology for Short-Circuit Withstand Time Screening of Commercial 4H-SiC MOSFETs
by Monikuntala Bhattacharya, Michael Jin, Hengyu Yu, Shiva Houshmand, Marvin H. White, Atsushi Shimbori and Anant K. Agarwal
Electronics 2026, 15(3), 579; https://doi.org/10.3390/electronics15030579 - 29 Jan 2026
Viewed by 309
Abstract
With the rapid advancement of silicon carbide technology, device reliability has emerged as a critical concern for high-performance power electronics applications. Among various reliability challenges, the limited short-circuit withstand time (SCWT) of SiC MOSFETs, coupled with significant device-to-device variation, poses a serious risk, [...] Read more.
With the rapid advancement of silicon carbide technology, device reliability has emerged as a critical concern for high-performance power electronics applications. Among various reliability challenges, the limited short-circuit withstand time (SCWT) of SiC MOSFETs, coupled with significant device-to-device variation, poses a serious risk, as it can lead to catastrophic field failures. In addition, established short-circuit screening technique utilizes high-voltage and high-stress condition that may degrade the long-term reliability of otherwise good devices. Hence, this work proposes a novel short-circuit screening methodology employing lower voltages and verifies it using commercial 1.2 kV 4H-SiC MOSFETs. The proposed approach can remove devices with lower SCWT while minimizing electrical and thermal overstress during screening. The results indicate that the proposed low-voltage screening technique offers a safe, repeatable, and reliable alternative to conventional short-circuit screening method, making it well suited for practical manufacturing, leading to system-level reliability enhancement in SiC-based power electronics applications. Full article
(This article belongs to the Special Issue Advanced Applications of Smart Power Technologies and Wide-Bandgap Semiconductors)
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20 pages, 3162 KB  
Article
Impact of Physical and Material Parameters on the Threshold Voltage and the Channel Resistance of Nanowire Field-Effect Transistors for Advanced Nanoscale Devices
by Rebiha Marki, Lakhdar Dehimi, Kamal Zeghdar, Fortunato Pezzimenti, Giacomo Messina and Francesco G. Della Corte
Electronics 2025, 14(21), 4279; https://doi.org/10.3390/electronics14214279 - 31 Oct 2025
Viewed by 2560
Abstract
This work studies the impact of different physical and material parameters on the channel resistance, Rch, and threshold voltage, Vth, of nanowire field-effect transistors (NWFETs). In particular, by means of detailed numerical simulations, we investigate the role [...] Read more.
This work studies the impact of different physical and material parameters on the channel resistance, Rch, and threshold voltage, Vth, of nanowire field-effect transistors (NWFETs). In particular, by means of detailed numerical simulations, we investigate the role of the channel length, nanowire diameter, gate oxide thickness, channel-doping concentration, energy bandgap, oxide thickness, and gate oxide permittivity in a wide range of temperatures (200–500 K). Our findings show that optimal values for both Rch and Vth are achieved by reducing the nanowire channel length, as well as by increasing the nanowire diameter and doping concentration. Furthermore, NWFETs benefit from using wide-bandgap materials and thinner oxide layers with a higher permittivity. Notably, in short-channel NWFETs operating under ballistic transport, channel resistance remains nearly constant with temperature, governed by quantum conductance and injection statistics rather than temperature-sensitive scattering. These results underscore the complex interplay between material selection, doping levels, and device geometry in shaping the threshold voltage and the channel resistance of NWFETs. Also, they are useful for enhancing the device stability and advancing the design of NWFETs for the next-generation of nanoscale transistors. Full article
(This article belongs to the Special Issue Advanced Applications of Smart Power Technologies and Wide-Bandgap Semiconductors)
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24 pages, 3264 KB  
Article
Development of a New Solid State Fault Current Limiter for Effective Fault Current Limitation in Wind-Integrated Grids
by Mohamed S. A. Zayed, Hossam E. M. Attia, Manal M. Emara, Diaa-Eldin A. Mansour and Hany Abdelfattah
Electronics 2025, 14(20), 4054; https://doi.org/10.3390/electronics14204054 - 15 Oct 2025
Cited by 1 | Viewed by 1179
Abstract
The increasing penetration of wind energy into modern power grids introduces new challenges, particularly regarding fault current levels and voltage stability during disturbances. This study proposes and evaluates a new Solid State Fault Current Limiter (SSFCL) topology for mitigating the adverse effects of [...] Read more.
The increasing penetration of wind energy into modern power grids introduces new challenges, particularly regarding fault current levels and voltage stability during disturbances. This study proposes and evaluates a new Solid State Fault Current Limiter (SSFCL) topology for mitigating the adverse effects of faults in wind-integrated power systems. The proposed SSFCL consists of a bridge section and a shunt branch, designed to limit fault current while maintaining power quality. Unlike conventional SSFCLs, the proposed topology incorporates both DC and AC reactors with an Integrated Gate-Commutated Thyristor (IGCT) switch, to provide current limiting and voltage stabilization, effectively mitigating the negative impacts of faults. A comprehensive MATLAB/Simulink-based simulation is conducted on a realistic grid model. First, appropriate AC and DC reactor impedances are selected to balance fault current suppression, cost, and dynamic response. Then, three fault scenarios, transmission line, distribution grid, and domestic network, are analyzed to assess the fault current limiting performance and voltage sag mitigation of the SSFCL. In the simulation analysis, the DC reactor current and the voltage across the SSFCL device are continuously monitored to evaluate its dynamic response and effectiveness during fault and normal operating conditions. In addition, the fault current contribution from the wind farm is assessed with and without the integration of the SSFCL, along with the voltage profile at the Point of Common Coupling (PCC), to determine the limiter’s impact on system stability and power quality. Finally, the performance of the proposed SSFCL is compared to that of the resistive-type superconducting fault current limiter (R-SFCL) under identical fault scenarios to assess the technical and economic standpoints of the proposed SSFCL. Simulation results show that the SSFCL reduces the peak fault current by up to 29% and improves the voltage profile at the PCC by up to 42%, providing comparable performance to the R-SFCL while avoiding the need for cryogenic systems. Full article
(This article belongs to the Special Issue Advanced Applications of Smart Power Technologies and Wide-Bandgap Semiconductors)
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