Algorithms in Reconfigurable Computing

Dear Colleagues,

Reconfigurable Computing has emerged as a low cost, high-performance computing platform able to execute algorithms in many application domains faster than other computing platforms, like CPU-based systems. Its reconfigurability allows the design and implementation of circuits following the most appropriate computing paradigm for a particular algorithm. This flexibility and the need for hardware design brings two main challenges to the design of algorithms in reconfigurable computing: algorithmic development for hardware and hardware design of algorithms. Algorithms are usually described sequentially, while hardware is parallel by nature. Adaptation of algorithms for parallel execution is an important high-level step. Then, mapping software descriptions into hardware is still a hot research topic with new achievements in high-level synthesis.

This Special Issue aims to collect recent innovations to deploy algorithms in reconfigurable computing. Potential topics include, but are not limited to:

• Mapping algorithms in FPGA with high-level synthesis;
• Template-based reconfigurable architectures for particular domains of algorithms;
• FPGA accelerators for algorithms;
• Algorithm optimization with arbitrary-precision data types;
• Algorithms in coarse-grained reconfigurable architectures;
• Design methodologies to map algorithms on reconfigurable computing devices;
• Design of data-centric algorithms with reconfigurable computing;
• Reconfigurable embedded devices for algorithms applied to health, smart-home, etc;
• Design of algorithms in high-performance reconfigurable computing platforms;
• Designing algorithms in SoC (System-on-Chip) FPGAs;
• Case studies of algorithm design with reconfigurable computing.

Prof. Dr. Mário Véstias
Prof. Dr. Paulo Flores
Guest Editors

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