Topic Editors

Department of Electronics, Telecommunications and Computer Engineering, Polytechnic of Lisbon, 1500-310 Lisboa, Portugal
Instituto de Engenharia de Sistemas e Computadores, Investigação e Desenvolvimento em Lisboa, 1000-029 Lisbon, Portugal

Smart Edge Devices: Design and Applications

Abstract submission deadline
30 September 2025
Manuscript submission deadline
31 December 2025
Viewed by
507

Topic Information

Dear Colleagues,

Edge devices are a critical part of the expanding Internet of Things (IoT) ecosystem. They play a key role in bringing computational power closer to the data source, allowing for faster decision-making, better privacy control, and reduced reliance on centralized cloud computing. Deep learning is increasingly being deployed for edge devices to enable real-time decision-making and intelligent processing directly at the source of data, converting them into smart edge devices. These devices can perform complex tasks such as image recognition, speech processing, and predictive analytics locally without relying heavily on cloud-based computing. This has led to a variety of applications across industries, including healthcare, automotive, manufacturing, and more.

The present Topic aims to publish new knowledge on smart edge devices by bringing together works on the design and applications of these systems. Topics of interest include, but are not limited to, the following:

  • Design of smart edge devices:
    • Microprocessors for edge computing;
    • Sensors for data collection;
    • Protocols and modules for connectivity of edge devices;
    • Local storage architectures;
    • Power management systems;
    • Machine and deep learning models for edge computing;
    • Embedded computing architectures;
    • Custom design of accelerators for edge computing;
    • New high-performance devices for embedded deep learning.
  • Applications of smart edge devices:
    • Smart healthcare;
    • Industrial automation;
    • Autonomous vehicles;
    • Smart cities;
    • Edge devices in agriculture;
    • Retail and consumer electronics;
    • Energy management;
    • Space data analysis.

Dr. Mário Véstias
Dr. Rui Policarpo Duarte
Topic Editors

Keywords

  • edge computing
  • deep learning
  • embedded computing
  • IoT
  • embedded high-performance
  • systems automation

Participating Journals

Journal Name Impact Factor CiteScore Launched Year First Decision (median) APC
Applied Sciences
applsci
2.5 5.5 2011 19.8 Days CHF 2400 Submit
Computers
computers
4.2 7.5 2012 16.3 Days CHF 1800 Submit
Electronics
electronics
2.6 6.1 2012 16.8 Days CHF 2400 Submit
Sensors
sensors
3.5 8.2 2001 19.7 Days CHF 2600 Submit
Technologies
technologies
3.6 8.5 2013 21.8 Days CHF 1600 Submit
Smart Cities
smartcities
5.5 14.7 2018 26.8 Days CHF 2000 Submit
Telecom
telecom
2.4 5.4 2020 26.3 Days CHF 1200 Submit
Future Internet
futureinternet
3.6 8.3 2009 17 Days CHF 1600 Submit

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Published Papers (1 paper)

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21 pages, 4423 KiB  
Article
CaDCR: An Efficient Cascaded Dynamic Collaborative Reasoning Framework for Intelligent Recognition Systems
by Bowen Li, Xudong Cao, Jun Li, Li Ji, Xueliang Wei, Jile Geng and Ruogu Zhang
Electronics 2025, 14(13), 2628; https://doi.org/10.3390/electronics14132628 - 29 Jun 2025
Viewed by 166
Abstract
To address the challenges of high computational cost and energy consumption posed by deep neural networks in embedded systems, this paper presents CaDCR, a lightweight dynamic collaborative reasoning framework. By integrating a feature discrepancy-guided skipping mechanism with a depth-sensitive early exit mechanism, the [...] Read more.
To address the challenges of high computational cost and energy consumption posed by deep neural networks in embedded systems, this paper presents CaDCR, a lightweight dynamic collaborative reasoning framework. By integrating a feature discrepancy-guided skipping mechanism with a depth-sensitive early exit mechanism, the framework establishes hierarchical decision logic: dynamically selects execution paths of network blocks based on the complexity of input samples and enables early exit for simple samples through shallow confidence assessment, thereby forming an adaptive computational resource allocation strategy. CaDCR can both constantly suppress unnecessary computational cost for simple samples and satisfy hard resource constraints by forcibly terminating the inference process for all samples. Based on this framework, we design a cascaded inference system tailored for embedded system deployment to tackle practical deployment challenges. Experiments on the CIFAR-10/100, SpeechCommands datasets demonstrate that CaDCR maintains accuracy comparable to or higher than baseline models while significantly reducing computational cost by approximately 40–70% within a controllable accuracy loss margin. In deployment tests on the STM32 embedded platform, the framework’s performance matches theoretical expectations, further verifying its effectiveness in reducing energy consumption and accelerating inference speed. Full article
(This article belongs to the Topic Smart Edge Devices: Design and Applications)
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