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Open AccessArticle

Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space Missions

1
Institut d’Electronique et des Systèmes, Université de Montpellier, 5214, 860 Rue de St Priest, Bat. 5, F-34097 Montpellier, France
2
Institut Materiaux Microelectronique Nanoscience de Provence, Aix-Marseille Université, 13013 Marseille, France
3
Advanced Integrated Sensing Lab, KU Leuven University, 2440 Geel, Belgium
*
Author to whom correspondence should be addressed.
Aerospace 2020, 7(2), 12; https://doi.org/10.3390/aerospace7020012
Received: 20 December 2019 / Revised: 24 January 2020 / Accepted: 3 February 2020 / Published: 5 February 2020
(This article belongs to the Special Issue Single Event Effect Prediction in Avionics)
Due to the intrinsic masking effects of combinational circuits in digital designs, Single-Event Transient (SET) effects were considered irrelevant compared to the data rupture caused by Single-Event Upset (SEU) effects. However, the importance of considering SET in Very-Large-System-Integration (VLSI) circuits increases given the reduction of the transistor dimensions and the logic data path depth in advanced technology nodes. Accordingly, the threat of SET in electronics systems for space applications must be carefully addressed along with the SEU characterization. In this work, a systematic prediction methodology to assess and improve the SET immunity of digital circuits is presented. Further, the applicability to full-custom and cell-based design methodologies are discussed, and an analysis based on signal probability and pin assignment is proposed to achieve a more application-efficient SET-aware optimization of synthesized circuits. For instance, a SET-aware pin assignment can provide a reduction of 37% and 16% on the SET rate of a NOR gate for a Geostationary Orbit (GEO) and the International Space Station (ISS) orbit, respectively. View Full-Text
Keywords: Monte Carlo simulation; single-event effects; radiation-hardening-by-design techniques; standard-cell design methodology; signal probability; MC-Oracle Monte Carlo simulation; single-event effects; radiation-hardening-by-design techniques; standard-cell design methodology; signal probability; MC-Oracle
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Aguiar, Y.Q.; Wrobel, F.; Autran, J.-L.; Leroux, P.; Saigné, F.; Pouget, V.; Touboul, A.D. Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space Missions. Aerospace 2020, 7, 12.

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