Characterization of SUEX Dry Film for 5G Applications

Abstract

Fifth-Generation (5G) communication systems necessitate highly integrated technologies to facilitate ultra-fast data rates, low latency, and compact system configurations. The realization of these objectives depends on the advancement of packaging techniques, such as System-on-Package (SoP), wherein low-loss build-up layers play a vital role in enhancing signal transmission. In this context, the electrical characterization of a 25 μm thick SUEX dielectric material used as a build-up layer for SoP applications is presented. Various test structures, including microstrip ring resonators (MRRs), coplanar waveguides (CPWs), and microstrip lines (MSs), are fabricated and measured over a frequency range of 1–30 GHz. The electrical properties are extracted using MRRs, whereas CPW and MS line structures are utilized for characterization and validation. The measurement results indicate that while the average dielectric constant of the SUEX dry film ranges from 3.07 to 3.10, the corresponding loss tangent varies between 5.75 × 10⁻³ and 5.83 × 10⁻³ across a frequency range of 10.28–27.47 GHz. These results verify that SUEX has low-loss properties, making it a suitable dielectric for build-up layers in SoP modules, where reducing signal loss is crucial for 5G and future communication technologies.

1. Introduction

As the world rapidly advances in digital technology, 5G has become a key part of modern communication networks. It offers unmatched improvements in data speeds, extremely low latency, and the ability to connect a large number of devices [1]. These advances facilitate groundbreaking uses in industrial automation, autonomous transportation, smart city development, and the Internet of Things (IoT), fostering a highly connected and intelligent ecosystem [2].

The 5G spectrum is classified into low-band (<1 GHz), mid-band (1–6 GHz), and high-band (>24 GHz). Shifting the carrier frequency from the low band to the high band imposes significant constraints due to elevated signal losses. To overcome these challenges, advanced packaging, which integrates multiple electronic devices into a single module, is required. System-on-Chip (SoC) and SoP, as techniques of advanced packaging, enable highly integrated electronic systems and play a crucial role in enhancing performance, power efficiency, and miniaturization [3]. SoC integration includes combining numerous functional components, such as processing units, memory, analog/digital circuitry, and communication interfaces, onto a single die [4]. However, it suffers from high development costs, complex design methodologies, and extensive verification processes. SoP technology is a complementary method that integrates heterogeneous circuits (e.g., logic, RF, power management, and photonics) within a single package [5]. SoP has the advantage of being low-cost, easy to implement, and highly stable.

Table 1. SoP/SoC trade-off diagram.

	SoC	SoP
Density	High	Low
Stability	Low	High
Cost	High	Low
Complexity	High	Low

presents the trade-off between SoC and SoP technologies.

SoP technology consists of an interposer, build-up layers, redistribution layers (RDLs), and interconnections, as shown in Figure 1. An interposer layer serves as an intermediate layer and provides mechanical support to bring chips together. Interconnections and RDLs in build-up layers are employed to reroute signals between active and passive devices. Thus, selecting an appropriate build-up material is essential for electrical performance, thickness control, and fabrication costs. Liquid-based materials such as liquid crystal polymer (LCP), SU-8, polyimides, and Benzo-cyclobutene (BCB) are organic materials that may be candidates for the build-up layers [6,7,8]. However, they struggle to achieve thicknesses above 40 μm and encounter difficulties at high curing temperatures. On the other hand, dry-film dielectric materials have emerged as a strong choice due to their outstanding process control, high-resolution patterning, and compatibility with packaging techniques. They offer several advantages, including low-temperature processing, improved adhesion to semiconductor substrates, and enhanced uniformity [9]. Anjinomoto Build-up Film (ABF), Alumina Ribbon Ceramic (ARC), and ZEONIF ZS-100 are dry films reported in the literature. In previous studies [10], an ABF/glass/ABF-based stack-up was characterized from 20 to 170 GHz. Also, different test structures were designed on an ARC material to extract the electrical properties and loss performance of the transmission line [11]. In addition, low-pass filters were fabricated by using spiral inductors and parallel-plate stitched capacitors on a glass-based ZS-100 build-up layer [12]. However, these dry films are not photo-imageable, so they require an additional device to etch them. Additionally, commercially available dry film photoresist series, such as WBR, WB, MX, ADEX, and DF, exhibit limited flexibility in achievable thickness ranges [13,14]. To address the limitations above, DJ-MICROLAMINATES introduces an innovative epoxy-based thin-dry-film photoresist, SUEX. SUEX exhibits glass-transition temperature (T_g: 173 °C), water absorption (%1.5/h), and Coefficient of Thermal Expansion (CTE) (50). Furthermore, following the curing process at 200 °C for 30 min, the measured dielectric constant and loss tangent are 3.2 and 0.0032, respectively. Additionally, it has strong adhesion to semiconductor surfaces and metal surfaces. Available thicknesses range from 5 µm to 1 mm for circular and square sheets [15]. The material properties are provided in

Table 2. Material properties of SUEX [15].

Material Properties
Glass-Transition Temperature (Tg)	173 °C
Water Absorption	%1.5/h
CTE	50
Available Thickness	5 µm–1 mm
Dielectric Constant	3.2
Loss Tangent	0.0032

. However, a comprehensive investigation of the electrical properties of SUEX remains absent from the existing literature.

Accordingly, in this article, we present, for the first time in the literature, the electrical characterizations of SUEX dry film as a build-up layer over a frequency range of up to 30 GHz. In addition, the dB/mm insertion loss of CPWs on stack and MSs is evaluated. Several test structures are designed and fabricated to analyze the performance of the SUEX dry film as a build-up layer. Finally, the fabricated test structures were measured to validate the reliability of the proposed design and fabrication methodologies. The presented results show that SUEX can be regarded as an alternative build-up layer for SoP modules. This article is organized as follows: Section 2 explains the test structure design and fabrication process. Section 3 presents the calculation of the electrical properties of the SUEX dry film and a comparison of simulation and measurement results.

2. Design and Fabrication of Test Structures

In this part of the article, the design of the test structure and fabrication methods are explained in detail. Also, the design and validation flow chart is illustrated in Figure 2. The process begins with the design of the test structures. This is followed by fabricating the structures and extracting the material’s electrical properties. Finally, full-wave electromagnetic simulations are performed. The results are confirmed by comparing them with experimental measurements.

2.1. Microstrip Ring Resonators

MRRs are frequently utilized to determine the dielectric constant and loss tangent of materials [16]. Their advantages include the ability to deliver accurate results, ease of wafer-level manufacturing, and low cost. The resonance frequencies of MRRs are the consequence of the material’s dielectric constant. MRRs are designed considering the fundamental frequency of operation using

$$f_n={\displaystyle \frac{nc}{2\pi r\sqrt{{\epsilon }_{eff\left(MRR\right)}}}}$$

(1)

where $f_n$, $c$, $r$, and ${\epsilon }_{eff\left(MRR\right)}$ denote $n^{th}$ resonance frequency, speed of light in vacuum, mean ring radius, and effective permittivity, respectively. In order to obtain the dielectric constant of SUEX (${\epsilon }_{r\left(SUEX\right)}$), MRRs with different radii with resonances of 10, 20, and 27 GHz are designed, as shown Figure 3a. Both ends of MRRs begin with grounded coplanar waveguide (GCPW) probe pads and then turn into a microstrip line. In addition, 60° circles are inserted at the end of the microstrip line to obtain better coupling efficiency. Additionally, 25 μm diameter microvias are inserted to enhance coupling from the ground pads to the ground plane. The dimensions of the MRRs are given in

Table 3. Dimensions of designed and fabricated structures.

Structure	Parameter	Value (Design)	Value (Fabrication)
Ring Resonator	$w_{pad\_ring}$	58	55.1
	$s_{pad\_ring}$	21	23.1
	$w_{gnd\_ring}$	250	246.8
	$l_{gnd\_ring}$	150	147.2
	$w_{ring}$	58	55.3
	$g_{ring}$	15	17.2
	$\theta$	60°	-
Microstrip Line
	$w_{ms}$	58	55.2
	$s_{ms}$	21	23.8
	$a_{pad}$	150	147
	$b_{pad}$	160	156
UCPW	$w_{stack}$	160	151.9
	$s_{stack}$	32	39.2
	$l_{gnd\_stack}$	1000	996
	$h_1$	25	25
	$h_2$	525	525
GCPW	$w_{gcpw}$	55	51.9
	$s_{gcpw}$	16	19.1
	$l_{gnd\_cpw}$	1000	995.4
	$r_{via\_gcpw}$	25	25
	$l_{via\_pitch}$	75	75

.

2.2. Microstrip Line

A microstrip transmission line is a planar guided-wave configuration comprising a narrow metallic conductor strip on the upper surface of a dielectric substrate, with a continuous ground plane on the opposite side, as illustrated in Figure 3b. To evaluate its performance, a 50 Ω microstrip line is designed on SUEX in a frequency range of 1–30 GHz. GCPW-to-microstrip transitions are implemented at both ends of the microstrip line to facilitate accurate and repeatable probe landings during on-wafer measurements. The dimensions of the MS line are given in Table 3.

2.3. CPW Transmission Lines

The CPW transmission line in the build-up layer transmits a signal from one point to another. For this reason, an ungrounded coplanar waveguide UCPW on silicon–SUEX stacks and a GCPW on SUEX are designed to characterize their performance. The designed structures are shown in Figure 3c–f. Their characteristic impedances are set to 50 Ω. The signal line width and signal–ground space are adjusted to be compatible with a 200 μm probe pitch spacing. The dimensions of CPWs are given in Table 3.

2.4. Fabrication Process

The fabrication process involves a sequence of microfabrication steps including sputtering, lithography, lamination, development, and wet etching, as illustrated in Figure 4. Initially, a dehydration bake is performed on the silicon wafer to remove contamination and moisture. Then, a bilayer stack consisting of Cr/Au (20/250 nm) metal layers is deposited using AJA sputtering systems, and the metal stack is etched to create devices on a silicon wafer. A mask exposure and development process is performed to open the microvias, followed by lamination of the SUEX dry film on the silicon substrate. The lamination process is carried out at a temperature of 70 °C with a speed of 1 ft/min. An O₂ plasma treatment process is subsequently performed to remove surface residues. A second Cr/Au (20/1300 nm) metal layer stack is deposited onto the SUEX film to form the upper metallization layer. The lithography and wet etching steps are completed, leading to the formation of the final structures. The electrical conductivity of the metal layer is measured to be approximately $2.85\times {10}^7$ S/m using the MAGNETRON resistance measurement system. The fabricated test structures, including MRR, MS, UCPW-on-stack, and GCPW, are shown in Figure 5. Furthermore, the dimensions of the fabricated devices are measured using an optical microscope. The measured widths of the MRR, CPW, and GCPW lines were found to be %1–5 smaller than their designed values. In addition, the gap between the signal and ground planes in the CPW structures was %1–5 larger than that of the modeled devices. These dimensional deviations lead to an estimated impedance variation of approximately 2–3 Ω in the given frequency range.

3. Characterization Results and Comparison

The measurement of the fabricated test structures is performed using a Keysight Vector Network Analyzer (VNA) operating over 1–30 GHz, as illustrated in Figure 6a. A ground–signal–ground (GSG) probe with a 200 µm pitch spacing, provided by Formfactor, is considered for conducting measurements. Before the measurement, short-open-load-through (SOLT) calibration is performed using a Pico-probe CS-9 calibration substrate to de-embed the effects of the probe pads, cable loss, and systematic errors arising from the VNA and probe system. The measurement result of the Thru standard after SOLT calibration is illustrated in Figure 6b. The measured transmission coefficient varies by only 0.02 dB across the evaluated frequency range, indicating excellent calibration accuracy and port matching.

3.1. Characterization of Electrical Properties of SUEX

MRRs with various radii are fabricated to extract the frequency-dependent dielectric constant and loss tangent of SUEX dry film. A quasi-static model is employed to accurately determine the material’s dielectric constant. Firstly, the effective dielectric constant is estimated depending on the corresponding resonant frequency. Then, the relative permittivity of SUEX is derived as [17]

$$\begin{gathered} {\epsilon }_{eff\left(MRR\right)}={\displaystyle \frac{{\epsilon }_{r\left(SUEX\right)}+1}{2}}+{\displaystyle \frac{{\epsilon }_{r\left(SUEX\right)}-1}{2}}{\left(1+12{\displaystyle \frac{h_1}{w_{pad-ring}}}\right)}^{-0.5} \\ -{\displaystyle \frac{{\epsilon }_{r\left(SUEX\right)}-1}{4.6}}{\displaystyle \frac{t/h_1}{w_{pad-ring}/h_1}} \end{gathered}$$

(2)

where $h_1$ is the SUEX dry film thickness, $t$ is the microstrip line thickness, $w_{pad-ring}$ is the microstrip line width, and ${\epsilon }_{r\left(SUEX\right)}$ is the SUEX dry film dielectric constant. The extracted dielectric constant within the 10.28–27.47 GHz frequency range varied between 3.14 and 3.19. In addition to the quasi-static model, the trial-and-error method is used to extract both the dielectric constant and the loss tangent. In this approach, the dielectric constant and loss tangent are iteratively tuned in the simulation until the simulated resonant frequency and insertion loss closely match the measured values. Depending on the method, the extracted dielectric constant of the SUEX dry film ranged from 2.89 to 3.02 across 10.28–27.47 GHz, which is approximately 7–8% lower than the values obtained by the quasi-static model. The observed discrepancy can be attributed to several factors, including the quality factor (Q-factor) of the ring resonator, minor calibration uncertainties, and deviations in the mean resonator radius. The modeling results indicate that a 50 µm variation in the mean radius of the microstrip ring resonator corresponds to an approximately 1.5–2% change in the extracted dielectric constant. Moreover, the quasi-static model neglects dispersion effects, which may further contribute to the observed deviation [17]. Furthermore, a previous study [18] reported that using different extraction methods to determine the material’s electrical properties can lead to variations exceeding 8%. Overall, variation between the given methods is considered negligible for practical dielectric characterization and remains within acceptable experimental uncertainty limits.

A detailed comparison of the extracted dielectric constant values is provided in

Table 4. Extracted dielectric constant and loss tangent of SUEX.

Freq. (GHz)	${\mathit{\epsilon }}_{\mathit{r}}$ Equation (2)	${\mathit{\epsilon }}_{\mathit{r}}$ (HFSS)	${\mathit{\epsilon }}_{\mathit{r}}$ (Avg.)	Error (%) (Dielectric Constant)	Loss Tangent (Ring Resonator)	Loss Tangent (3000 μm)	Loss Tangent (4000 μm)	Loss Tangent (Avg.)	Error (%) (Loss Tangent)
10.28	3.19	3.02	3.10	2.7	-	5.65 × 10−3	5.85 × 10−3	5.75 × 10−3	1.7
20.93	3.12	2.92	3.02	3.2	6 × 10−3	4.86 × 10−3	6.2 × 10−3	5.68 × 10−3	5.3
27.47	3.14	2.89	3.07	2.2	6.1 × 10−3	5.95 × 10−3	5.45 × 10−3	5.83 × 10−3	4.4

, along with the corresponding average values obtained from the quasi-static and trial-and-error methods. Additionally, the frequency-dependent variation in the average dielectric constant of the SUEX dry film is shown in Figure 7a. The discrepancy between the average and individually calculated dielectric constants ranges from approximately 2.2% to 3.7%, which is within an acceptable margin for material characterization. This level of variation highlights the consistency of the extraction techniques and confirms the reliability of the proposed methods for evaluating the electrical properties of the SUEX material.

The extracted loss tangent of the SUEX film is observed to be between 6 × 10⁻³ and 6.1 × 10⁻³ within the frequency range of 20.93–27.47 GHz, indicating an acceptable loss tangent. The absence of a reliable loss tangent at 10.28 GHz can be attributed to the fact that, at this frequency, the skin depth is much larger than the metal thickness, resulting in reduced electromagnetic field confinement and less accurate attenuation extraction. Additionally, minor calibration deviations and weak coupling between the ground planes may have further contributed to the measurement inconsistency.

In addition to the MRR method, the UCPW transmission line method is also followed to obtain the loss tangent of SUEX material. Figure 3c shows the cross-sectional view of the UCPW transmission line structure. In this design, SUEX thin film is characterized by a thickness of $h_{1 }$ and is laminated on a silicon substrate with a thickness of $h_2$. In the transmission line method, a complex propagation constant ($\gamma =\alpha +j\beta$) is evaluated from the ABCD matrix, which is transformed from the measured scattering matrix [18]. The conversions from two-port network parameters to the transmission matrix are described in (3)–(7). Following the conversion, the total attenuation constant (${\alpha }_t$) and effective dielectric constant of stack (${\epsilon }_{eff\left(stack\right)}$) can be calculated using (8) and (9). $Z_0$ is the characteristic impedance, which is assumed to be 50 Ω, and $S_{11},S_{12},S_{21},S_{22}$ correspond to the scattering parameters.

$$\left[\begin{array}{cc}A& B\\ C& D\end{array}\right]\cong \left[\begin{array}{cc}{S}_{11}& S_{12}\\ S_{21}& S_{22}\end{array}\right]$$

(3)

$$A={\displaystyle \frac{\left(1+S_{11}\right)\left(1-S_{22}\right)+S_{12}{S}_{21}}{2S_{21}}}$$

(4)

$$B=Z_0{\displaystyle \frac{\left(1+S_{11}\right)\left(1+S_{22}\right)-S_{12}{S}_{21}}{2S_{21}}}$$

(5)

$$C={\displaystyle \frac{1}{Z_0}}{\displaystyle \frac{\left(1-S_{11}\right)\left(1-S_{22}\right)-S_{12}{S}_{21}}{2S_{21}}}$$

(6)

$$D={\displaystyle \frac{1}{Z_0}}{\displaystyle \frac{\left(1-S_{11}\right)\left(1+S_{22}\right)+S_{12}{S}_{21}}{2S_{21}}}$$

(7)

$${\alpha }_t={\displaystyle \frac{1}{L}}\mathit{Re}\left\{\mathit{ln}\left[{\displaystyle \frac{\left(A+D\right)\pm \sqrt{{\left(A+D\right)}^2-4}}{2}}\right]\right\}={\alpha }_C+{\alpha }_D+{\alpha }_R (\mathrm{Np}/\mathrm{m})$$

(8)

$${\beta }_f={\displaystyle \frac{1}{L}}\mathit{Im}\left\{\mathit{ln}\left[{\displaystyle \frac{\left(A+D\right)\pm \sqrt{{\left(A+D\right)}^2-4}}{2}}\right]\right\}={\displaystyle \frac{2\pi f\sqrt{{\epsilon }_{eff\left(stack\right)}}}{c}}$$

(9)

Accurate determination of conductor loss is essential to precisely extracting the loss tangent of the SUEX material. While several methods have been reported in the literature for determining conductor losses, many assume that the metal thickness exceeds three to five times the skin depth, which does not hold in our case [19,20]. Thus, conductor (${\alpha }_c$) and radiation loss (${\alpha }_r$) are estimated through full-wave electromagnetic simulation in which the loss tangent of SUEX is set to zero. Following the given approach, effective loss tangent of stack (${tan\delta }_{eff}$) is extracted using

$${\alpha }_D={\displaystyle \frac{\pi \sqrt{{\epsilon }_{eff\left(stack\right)}}}{c}}f{tan\delta }_{eff}$$

(10)

Finally, the conformal mapping method is used to extract the loss tangent of SUEX as follows [21]:

$${\epsilon }_{eff\left(stack\right)}{tan \delta }_{eff}=q_1{\epsilon }_{rSUEX}{tan\delta }_{SUEX}+q_2{\epsilon }_{rSILICON}{tan \delta }_{SILICON}$$

(11)

$$k_0={\displaystyle \frac{w_{stack}}{w_{stack}+2s_{stack}}}$$

(12)

$$k_1={\displaystyle \frac{\mathit{sinh}\left(\pi w_{stack}/4h_1\right)}{\mathit{sinh}\left(\pi \left(w_{stack}+2s_{stack}\right)/4h_1\right)}}$$

(13)

$$k_2={\displaystyle \frac{\mathit{sinh}\left(\pi w_{stack}/4h_2\right)}{\mathit{sinh}\left(\pi \left(w_{stack}+2s_{stack}\right)/4h_2\right)}}$$

(14)

$$q_i={\displaystyle \frac{1}{2}}{\displaystyle \frac{K\left(k_i\right)}{K^{\prime }\left(k_i\right)}}{\displaystyle \frac{K^{\prime }\left(k_0\right)}{K\left(k_0\right)}}$$

(15)

$$K^{\prime }\left(X\right)=K\left(\sqrt{1-x^2}\right).$$

(16)

where $q_i$, ${\epsilon }_{rSUEX}$ ${\epsilon }_{rSILICON},$ ${tan \delta }_{SUEX}$, and ${tan \delta }_{SILICON}$ denote the filling factor, dielectric constant of SUEX, dielectric constant of silicon, loss tangent of SUEX, and loss tangent of silicon, respectively. Silicon is assumed to be lossless since it possesses high resistivity (>20 kΩ/cm). $K\left(x\right)$ and $K^{\prime }\left(x\right)$ are the elliptical integral of first kind and its complement. In order to extract the loss tangent, UCPW transmission lines with a length of 3000 $\mathsf{\mu }\mathrm{m}$ and 4000 $\mathsf{\mu }\mathrm{m}$ are utilized as test structures, and their detailed results are given in Table 4. Average loss tangent of SUEX vary between $5.75\times {10}^{-3}$–$5.83\times {10}^{-3}$ as plotted in Figure 7a. Within the given frequency range, a deviation of approximately % 1.7–5.3 is observed between the test structures, reflecting acceptable variation for high-frequency electrical characterization.

To further validate the accuracy of the extracted dielectric properties, the average loss tangent and dielectric constant of the SUEX film are simulated using MRR in the Finite Element Method (FEM)-based commercial solver ANSYS HFSS v21. Simulated and measured MRR results are given in Figure 7b. According to the results, the simulated resonance frequency of each MRR closely match the measured resonance. Moreover, insertion loss values at each resonance point show minimal variation, indicating high consistency across the frequency range. Minor differences can be attributed to calibration and fabrication errors.

3.2. Microstrip Line Characterization

Figure 8 illustrates the measured scattering parameters of the microstrip transmission line obtained after performing a SOLT calibration. It is essential to note that the measurement configuration includes GCPW-to-microstrip transition sections at both ends of the line. However, since these transition segments are electrically short and designed with a characteristic impedance of 50 Ω, their contribution to the measured S-parameters of the microstrip line is negligible. Figure 8a presents the measured scattering parameters of the microstrip line with a total length of 1.7 mm. The observed reflection coefficient S₁₁ remains below –15 dB across the measured frequency range, confirming good impedance matching between the line and the measurement system. Furthermore, the extracted insertion loss per unit length (dB/mm) varies from approximately 0.13 to 0.45 dB/mm over the 1–30 GHz frequency range, as shown in Figure 8b, exhibiting excellent agreement with the corresponding simulation results.

3.3. CPW Line Characterization

Figure 9 shows the measured scattering parameters of UCPW in a frequency range of 1–30 GHz. Additionally, the S-parameter response of the 5 mm long UCPW line is shown in Figure 9a. Furthermore, the measured insertion loss per unit length (dB/mm) of UCPW varies from 0.034 to 0.25 dB within a frequency range of 1 to 30 GHz, as given in Figure 9b.

In addition to UCPW, the scattering parameters of the GCPW structures are also presented in Figure 10. Figure 10a shows the measured scattering parameters of the 5 mm long GCPW line. As observed, the reflection coefficient remains low over the entire frequency range, indicating good impedance matching between the line and the measurement system. The extracted insertion loss ranges from 0.08 to 0.4 dB/mm within a frequency range of 1 to 30 GHz. Furthermore, the UCPW lines are simulated using the extracted electrical properties of SUEX, demonstrating a strong correlation with the measurement results shown in Figure 10b.

4. Comparison with Other Studies

Table 5. Comparison of dielectric constant, loss tangent, and dB/mm insertion loss performance of SUEX dry film with other dry film materials.

Material	dB/mm	Dk	Loss Tangent	Thickness (μm)
Rogers RT 5880 [22]	0.05 (CPW) 30 GHz	2.94	0.0012	127
LTCC [23]	0.6 29 GHz	11	0.0025 29 GHz	142
ABF-GLASS-ABF [10]	0.075 (UCPW) 0.1 (MS) 28 GHz	4.79–4.87 20–60 GHz	0.004–0.006 20–60 GHz	130
Alumina Ribbon Ceramic (ARC) [11]	0.072 (UCPW) 0.119 (MS) 50 GHz	10.27 3–50 GHz	0.000066–0.0013 3–170 GHz	80
ZIF-GLASS-ZIF [24]	0.12 (UCPW) 50 GHz	4.938 20.46 GHz	0.0075–0.012 DC to 50 GHz	366
Q-Singi G [25]	0.0283 (MS) 30 GHz	3.2 10 GHz	0.0014 10 GHz
This work (SUEX)	0.19 (UCPW) 0.37 (GCPW) 0.29 (MS) 28 GHz	3.10–3.07 10.28–27.47 GHz	0.00575–0.00583 10.28–27.47 GHz	525 (UCPW) 25 (GCPW)

compares the dielectric constants, loss tangents and dB/mm insertion losses of SUEX with other dry film materials like Roger RT 5880, LTCC, ABF, ARC, and ZIF. It is important to emphasize that SUEX exhibits stable electrical properties across the operating frequency. Also, it offers a well-balanced combination of a low dielectric constant, a favorable loss tangent, and moderate insertion loss compared to the given materials. The results show that implementing build-up layers with SUEX and a practical approach for advanced packaging applications demands a low-loss build-up layer. Furthermore, due to the flexible thickness range and photo-imageability of SUEX dry film, costs and application complexity can be reduced.

5. Conclusions

In this article, we present the electrical characterization of SUEX material in a frequency range of 1–30 GHz using MRR and various transmission lines. The measured results demonstrate that SUEX exhibits a low dielectric constant (3.07–3.10) and low loss tangent (5.75 × 10⁻³–5.83 × 10⁻³) between 10.28 and 27.47 GHz, confirming its potential as a low-loss dielectric layer for System-on-Package (SoP) architectures in 5G communication systems. Also, it can be deployed at the panel level and in fan-out packaging platforms. Future research may focus on characterization of SUEX-based build-up layers for the V, W, D and sub-THz frequency bands. Furthermore, double-sided multilayer packaging configurations can be realized on silicon or glass interposers to improve antenna-in-package solutions for industry applications.