A Design of 1.2–3.6 GHz Power Amplifier Based on Filters of Negative Feedback Network

Abstract

This work proposes a broadband, high-efficiency extended continuous class-F (ECCF) power amplifier (PA) with a negative-feedback network structure. Compared with the traditional direct cascade connection of a PA and a filter, the design introduces a novel negative feedback filter structure. The transistor and filter synthesis network co-design method aims to compensate for the gain and efficiency drop of this PA in both high and low frequency bands, resulting in relatively flat gain and efficiency performance over a wide band. Consequently, there is a need to enhance the security and efficiency of wireless communication systems. This work verifies the proposed method using a designed and fabricated 10 W GaN HEMT device. The measured data reveal that the designed PA achieves 100% relative bandwidth from 1.2 GHz to 3.6 GHz, with a drain efficiency (DE) of 59.5~67.4%, an output power of 38.8~41.8 dBm, and a large signal gain of 8.8~11.8 dB.

1. Introduction

Driven by rapid progress in wireless communications [1,2,3,4], demand for high-performance RF PAs is escalating, and their relevance now extends to areas such as 100 MHz-level ultrasound imaging [5,6]. To meet the standards of next-generation wireless communication systems, including 5G, 6G, and beyond, RF amplifiers are required to have high efficiency, broadband, flat gain, and high linearity. Still, these amplifiers are prone to nonlinear distortion when working. The generation of these distorted signals needs to be filtered out by cascading high out-of-band suppression filters [7,8]. Compared with predistortion, the co-designed filtering structure reduces distortion without hardware and calibration complexity, maintaining broadband efficiency. However, designing the PA and filter separately will bring some problems. It will not only increase the area of the overall circuit but also cause partial energy loss, decrease the efficiency of the communication system, and increase the complexity of the design. In [9,10,11,12,13], a collaborative design method for PAs and filters, the so-called filtering PAs, is proposed.

Conventional PAs [14,15,16], including Class-B and Class-F designs, generally achieve high efficiency only over a narrow bandwidth because their performance depends on specific harmonic load impedance. To extend the high efficiency range of PAs, modes like Class-J, continuous Class-F, continuous Class-F⁻¹, and a series of hybrid continuous modes have been developed to deliver high efficiency across a wide frequency range [17,18,19,20,21]. Recent CMOS PA advances, including Class-E architectures utilizing combined MOS devices to enhance efficiency, have shown promising results. However, their limited output power capability and relatively narrow bandwidth restrict their suitability for high-power wideband systems [22,23,24,25]. According to theory, the efficient bandwidth achievable by these continuous modes rarely exceeds one octave. The inability to attain multi-octave results from the high-order harmonic within the low-frequency band failing to overlap with the fundamental wave at higher frequencies. The ECCF mode PA can overcome the bandwidth limitation of one octave [26,27,28]. However, reported continuous Class-F PAs rarely address gain and efficiency flatness across the operating bandwidth. In the field of feedback amplifiers, refs. [29,30] propose a negative feedback network, respectively, aiming to balance the gain and efficiency differences between high and low frequencies. Figure 1a shows the conventional cascaded filtering PA. The proposed novel negative feedback filtering PA is shown in Figure 1b.

Figure 1. (a) Conventional cascaded filtering PA; (b) negative feedback filtering PA.

The 1.2–3.6 GHz band encompasses multiple sub-6 GHz wireless systems, but maintaining high efficiency and flat gain over such a broad range is limited by impedance variation and harmonic-tuning constraints. This paper proposes a novel negative feedback filtering PA, which is a co-design method of the filter network and PA transistor, which can not only suppress interference signals but also not affect the PA matching network’s impedance conversion to improve high-frequency gain and efficiency while reducing low-frequency gain and efficiency, thereby balancing the differences in gain and efficiency between high and low frequencies. Compared with classical DPD, the proposed co-designed negative feedback filtering technique eliminates the need for extra linearization hardware and complex calibration. By suppressing distortion directly inside the PA and compensating for gain and efficiency degradation across the band, it achieves flatter wideband performance with significantly reduced system complexity and power consumption. The fabricated 10 W GaN ECCF PA validates that high output power and efficiency are maintained over 1.2–3.6 GHz without using DPD, demonstrating strong advantages for compact and energy-efficient wideband transmitters. The approach proves both correctness and effectiveness, offering a new idea for designing broadband high-efficiency filtering PAs. The paper is structured as follows: Section 2 details the negative feedback network design, Section 3 covers ECCF theory, Section 4 presents the experimental setup and results, and Section 5 concludes.

2. Negative Feedback Filter Network

Although broadband impedance matching technology is diverse, it generally faces the dual constraints of limited impedance transformation amplitude and difficulty in bandwidth expansion. To overcome these limitations, designers often need to increase the network order to reduce the circuit quality factor Q value. However, this optimization path usually leads to the complexity of the circuit topology structure, and a trade-off between high-performance indicators and design feasibility is required. To solve the trade-off between bandwidth and high-order matching network, a filter network synthesis method [31,32] is proposed. This method is based on the filter matching network and uses the method outlined in [31,32] as its basis because it can achieve lower ripple and suppress harmonic distortion within the required bandwidth, thereby improving the overall circuit performance. In this design section, the matching network synthesis process can be divided into four main steps. Figure 2 illustrates the design flow in a stepwise graphical manner. The following content will introduce the specific implementation methods of each step in detail.

Figure 2. Filter structure design steps.

Step 1: According to the impedance transformation ratio, working bandwidth, center frequency, maximum available gain, and in-band ripple, the normalized original value is obtained, and the denormalization is performed according to the method given in [31] to obtain a real-to-real low-pass matching network. A high-order matching network is constructed by five pairs of LC resonant elements, and the initial network is shown in Figure 2.

Step 2: Reconstruct the parallel capacitor C_s1 by splitting the inductor L₂ and the capacitor C₄ into two miniature inductors and capacitors. Process the network elements L₁, L₂₁, and C₁ obtained in step 1 to generate the parasitic output capacitance and parasitic inductance existing in the actual transistor. In addition, a T-Π circuit transformation [32] generates the parallel capacitor C_s1 and series inductor L_p. According to [33], the A parameter matrix of the framed T-type network is

$$A_T=\left[\begin{array}{cc}1-{\omega }^2{L}_1{C}_1& j\omega (L_1+L_{21})-j{\omega }^3{L}_1{L}_{21}{C}_1\\ j\omega C_1& 1-{\omega }^2{L}_{21}{C}_1\end{array}\right]$$

(1)

The A parameter matrix of the Π-type framed network is

$$A_{\prod }=\left[\begin{array}{cc}1-{\omega }^2{L}_P{C}_{s2}& j\omega L_P\\ j\omega (C_{s1}+C_{S2})-j{\omega }^3{C}_{s1}{C}_{s2}{L}_P& 1-{\omega }^2{L}_P{C}_{s1}\end{array}\right]$$

(2)

In order for the Π-type network to replace the T-type network, the A parameters of the two networks must be equal, that is

$$A_T=A_{\Pi }$$

(3)

In the equivalent circuit of T-Π, L₁, L₂₁, and C₁ have obtained the initial values in step 1, so L_p is first calculated by Formula (3), and then C_s2 and C_s1 are calculated by Formula (3), respectively, so as to complete the T-Π equivalent transformation. However, it should be noted that when L₂ is split into L₂₁ and L₂₂, L₂₁ needs to be reasonably assigned to obtain the C_s1 required by the actual transistor.

For the framed Π-type network, the equivalent replacement of the Π-type concentrated parameters to the transmission line TL₄ can be achieved by using the A parameter matrix equivalent method. The final replacement formula is

$$Z_4={\displaystyle \frac{\omega L_5}{\sin {\theta }_4}}$$

(4)

$${\theta }_4=\arccos (1-L_5{C}_5{\omega }^2)$$

(5)

It should be noted that at this time, C₄ = C₄₁ + C₄₂, and C₄₂ = C₅.

Step 3: Split L_P into the parasitic package inductance L_p1 and the residual inductance L_P2 in the actual transistor, and split L_t2 into L_T and L₆, and split L₂₂ into L_t1 and L_t2 so that L_t1 = L_p2. Then C₃ split into C₃₁ and C₃₂. The framed T-type structure on the left side is converted into a transmission line for welding of the actual transistor using the method of equivalent T-type network A parameters and transmission line A parameters, and the framed T-type network on the right side is converted into an equivalent Π-type network according to the method of step 2.

Step 4: In the package-level impedance matching design, it is necessary to comprehensively consider the influence of the optimal impedance and parasitic parameters, such as parasitic output capacitance and package inductance. For the package-level input and output impedance data obtained from the transistor, the parasitic parameter compensation can be achieved by adjusting C_s1 and L_p1 accordingly through the equivalent transformation method, thereby obtaining the actual usable matching network parameters.

$$R={\displaystyle \frac{R_{opt}}{1+{\omega }^2{C_{s1}}^2{R_{opt}}^2}}$$

(6)

$$X=\omega (L_{P1}-C_{s1}{R_{opt}}^2)$$

(7)

After completing the above steps, parasitic output capacitance and package inductance of the transistor are incorporated to improve the high-order low-pass filter network. At higher frequencies, where lumped elements tend to exhibit transmission line behavior, this modification ensures accurate analysis and performance. Relative to standard high-order filters, the proposed network also achieves a more compact layout.

Negative feedback feeds a signal from a transistor’s output (drain) back to its input (gate). Negative feedback operates by subtracting the feedback signal with respect to the input. A resistance and a capacitance positioned between the gate and drain form the typical negative feedback structure. In Figure 3, a new type of negative feedback network is developed in this work. Capacitance C3 is introduced to the designed circuit, grounding a portion of the negative feedback path. In the proposed feedback network, C3 is grounded to partially divert the feedback signal, controlling its strength and balancing it across the bandwidth. This improves gain and efficiency flatness, enhances stability, and together with C1 and C2 maintains DC isolation while limiting excessive high-frequency feedback to the transistor gate. This facilitates the implementation of a broadband PA. Two capacitances form the feedback network connecting the drain and gate of the transistor are C1 and C2, and two inductances are L1 and L2. Capacitance C1 acts to isolate the DC voltage across the drain-to-gate path. It also tunes the coupled RF signal across the drain-to-gate path, while C2 blocks high-frequency components from reaching the gate, enhancing feedback stability. As shown in Figure 3, L1 and L2 can tune the efficiency and gain of the PA within the working bands at high- and low-frequency bands, respectively. At this time, the red solid/dashed line is the best feedback status.

Figure 3. Effects of different L1 and L2 on DE and gain in negative feedback network.

3. Theory of ECCF PA

The conventional Class-F PA is based on the Class-B PA model. Proper loading of the active device’s output controls the fundamental and harmonic components to form the desired waveform. With the ECCF PA [34], the bandwidth extends beyond one octave, and the impedance is given by

$${\mathrm{V}}_{\mathrm{ECCF}}=(1-{\displaystyle \frac{2}{\sqrt{3}}}\cos \theta {)}^2(1+{\displaystyle \frac{1}{\sqrt{3}}}\cos \theta )(1-\gamma \sin \theta )(1+\delta \cos \theta )$$

(8)

$${\mathrm{I}}_{\mathrm{ECCF}}={\displaystyle \frac{1}{\pi }}+{\displaystyle \frac{1}{2}}\cos \theta +{\displaystyle \frac{2}{3\pi }}\cos 2\theta +\cdots$$

(9)

$$DE={\displaystyle \frac{\pi (\frac{2}{\sqrt{3}}-\delta )}{4-\frac{4}{\sqrt{3}}\delta }}$$

(10)

$$Z_{f-ECCF}=({\displaystyle \frac{2}{\sqrt{3}}}-\delta )R_{opt}+j\cdot (1-{\displaystyle \frac{7}{12\sqrt{3}}})R_{opt}\cdot \gamma$$

(11)

$$Z_{2f-ECCF}={\displaystyle \frac{3\pi }{8}}({\displaystyle \frac{5}{3\sqrt{3}}}{R}_{opt}\cdot \delta -j\cdot ({\displaystyle \frac{7}{3\sqrt{3}}}-\delta )R_{opt}\cdot \gamma )$$

(12)

$$Z_{3f-ECCF}=\infty$$

(13)

According to the above formulas for drain voltage and current (8), (9), the corresponding waveforms as the parameters δ and γ change can be plotted, illustrated in Figure 4a. Based on the normalized drain current and voltage expressions of the ECCF PA, we can deduce that when γ = 0 and δ = 0, the normalized voltage waveform corresponds to that of the Class-F PA. At this point, the overlap area between the voltage and current waveforms is minimal, thus resulting in the highest efficiency. When δ = 1, corresponding to the dashed line portion in Figure 4a, it can be seen that the voltage waveform decreases to some extent.

Figure 4. (a) ECCF drain current and voltage waveform; (b) DE as a function of δ.

Using Formula (10) for DE, Figure 4b is obtained. As the value of δ changes, the voltage and current alternation area also changes, expanding the bandwidth at the expense of some efficiency. Figure 4b shows that when δ is less than 0.7, the DE ranges from 60% to 90.7%. Fundamental and harmonic impedances of the ECCF PA are derived by varying γ from −1 to 1 and δ from 0 to 1, as depicted in Figure 5a.

Figure 5. (a) Fundamental and second harmonic impedance mapping of ECCF modes; (b) simulated impedance trajectory of the output matching network on the I-gen plane.

Mapping the impedance expressions (11)–(13) onto the Smith chart allows the ECCF PA impedance design space to be plotted on the I-gen plane, as illustrated in Figure 5a. Observation shows that when δ is limited between 0.5~1, the fundamental frequency and second resistance begin to overlap, leading to a notable increase in the impedance region. Therefore, the design problem of multi-bandwidth PAs arising from the overlap of fundamental and harmonic frequencies can be solved. Figure 5b presents the fundamental and second-harmonic impedance distribution of the output matching network on the I-gen plane. The blue line shows the fundamental impedance trajectory, while the purple line indicates the second harmonic trajectory. Most of these traces fall within the optimal impedance region.

4. Implementation and Measurement

This section discusses the design of an ECCF PA using a 10 W GaN HEMT device CGH40010F from Wolfspeed. The gate and drain voltages are set to −3 V and 28 V, respectively. For demonstration, the proposed broadband ECCF PA is implemented using a Rogers 4350B substrate (ɛ_r = 3.66, H = 30 mil).

A comprehensive multiple-simulation flow was utilized to guarantee the broadband performance of the proposed PA. The frequency sweep was conducted from 0.5 to 4.0 GHz with a 0.1 GHz step and an input power level of 30 dBm. First, DC characterization and bias design were completed through DC sweep analysis. Source-pull and load-pull simulations were then employed to determine the optimal input and output impedance conditions. Large-signal S-parameter and harmonic balance simulations were performed to evaluate gain, efficiency, and harmonic tuning behavior. After obtaining a preliminary matching structure, the design was translated into a microstrip-based layout, where EM simulations using ADS Momentum were conducted to incorporate transmission-line dispersion, coupling, and parasitic effects. Finally, schematic-layout co-simulation validated that the integrated implementation meets the intended broadband high-efficiency design objectives. Figure 6a presents the ECCF PA schematic along with the equivalent circuit representing the transistor package’s output parasites, while Figure 6b shows the fabricated PA. As depicted in Figure 7, the DUT was characterized using an RF signal generator, isolator, DC power supply, attenuator, and spectrum analyzer. Input signals were amplified to the required level, and the measured output power was then used to calculate performance metrics.

Figure 6. (a) Designed PA circuit diagram; (b) visual of the assembled PA prototype.

Figure 7. Test setup for the proposed PA.

The effect of negative feedback on the ECCF PA is illustrated through simulation results in Figure 8, showing improved performance with the feedback structure. To examine the designed PA’s performance in more detail, Figure 9 shows the simulated and measured DE, Pout, and gain across the full operating bandwidth under continuous-wave excitation. Figure 9 demonstrates that in the 1.2~3.6 GHz frequency band with a relative bandwidth of 100%, the test results show that a saturated Pout of 38.4–41.8 dBm is provided, and its gain is 8.8–11.8 dB, and the DE is between 59.5% and 67.4%. At this time, the efficiency and gain remain relatively flat. This fully demonstrates that the performance of this power amplifier is fully utilized. In addition, as can be seen from Figure 9, regarding gain and output power, the measurement and simulation results are basically consistent.

Figure 8. Simulated DE, gain, and output power of the ECCF PA with versus without negative feedback.

Figure 9. Simulated and experimental DE, gain, and output power across frequency.

Figure 10 depicts the correlation between the DE and the gain measured at different frequency points and the resulting output power. In addition, as shown in Figure 10 that with respect to gain and Pout, the measured values are in good agreement with the simulated values. To evaluate the dynamic characteristics within the bandwidth range of 1.2 GHz to 3.6 GHz, we specifically selected six frequency points of 1.2, 1.6, 2.0, 2.4, 3.0, and 3.6 GHz for measurement. Figure 10 demonstrates that the six selected frequencies perform well across different input signal levels. This good performance is attributed to the use of a negative feedback structure, where the optimal performance occurs with a DE of 67.4% and a gain of 10.7 dB.

Figure 10. DE and gain measurements versus input power across different frequencies.

Figure 11 plots the drain voltage and current waveforms over four distinct frequencies. It can be concluded from the waveforms at specific frequencies that the voltage exhibits an almost square shape, whereas the current shows a near half-sine profile, indicating a Class F operating mode. In addition, the staggered voltage and current distribution lowers drain energy loss, facilitating high-efficiency operation of a wideband PA. In summary, this design verifies the rationality of the proposed method.

Figure 11. Intrinsic drain voltage plane and current waveforms obtained from simulation at (a) 1.5 GHz, (b) 2.0 GHz, (c) 2.4 GHz, (d) 3.0 GHz, respectively. The orange lines represent the current, and the green lines represent the voltage.

Compared with conventional PA filter cascades [7,10,11], the proposed co-designed negative feedback filter network eliminates additional parasitic output capacitance and package inductance, enabling improved high-frequency gain and efficiency and moderated low-frequency response for more balanced broadband performance. The proposed PA’s performance is benchmarked against the PAs presented in Table 1. Over a wider frequency range, flatter performance in both output power and efficiency is achieved by the proposed PA. Table 1 demonstrates that the proposed PA maintains output power and gain while achieving the widest frequency band.

Table 1. Comparison with the existing literature.

Ref.	Class	BW (GHz)	RBW (%)	Pout (dBm)	DE Flatness (%)
[17]	CCF	2.5–3.6	36.1	36.8–38.5	10.7 *
[18]	CCF−1	2.3/3.35	-	40.3/41.9	-
[21]	ECCF	1.2–2.9	83	40.1–43	25.8
[27]	ECCF	1.4–3.6	88	38.8–41	19.3
[30]	CCF	1.6–2.6	47.6	39.7–40.8	9 *
This work	ECCF	1.2–3.6	100	38.8–41.8	7.9

BW: Bandwidth, RBW: Relative Bandwidth, Pout: output power, ECCF: Extended Continuous Class-F, CCF: Continuous Class-F, CCF⁻¹: Continuous Inverse Class-F, *: PAE.

5. Conclusions

This study introduces a PA design method with a negative feedback filter network. The filter synthesis network is designed in coordination with the PA transistor, which can not only achieve impedance transformation without affecting the output matching network of the PA but also suppress the low-band gain and efficiency while enhancing the high-band gain and efficiency, thereby balancing the difference in gain and efficiency between high and low frequencies. An ECCF PA with broadband and high-efficiency functioning at 1.2–3.6 GHz was developed and prepared. The correctness and effectiveness of this method were verified based on the good performance of the test, providing a new idea for the engineering broadband PAs with high efficiency with negative feedback. Therefore, it is essential to improve the security and effectiveness of the wireless communication infrastructure.