A Versatile, Voltage-Pulse Based Read and Programming Circuit for Multi-Level RRAM Cells
Abstract
:1. Introduction
2. RRAM Technology
2.1. 1T1R RRAM Cells
2.2. Programming Algorithm
2.3. Cell Variability
3. Circuit Overview
3.1. Programming Operation
3.2. Read Operation
4. Read Circuit
- Provide a high input impedance to decouple the read circuit from the measurement resistor. This is necessary to prevent current flow into the read circuit
- Shift the relatively low input voltage of away from ground supply, therefore providing a voltage headroom for the current source
5. Simulation and Measurement Results
5.1. Simulation Results
- LRS3: 100
- LRS2: 011
- LRS1: 010
- HRS: 000
5.2. Measurement Results Read Circuit
5.3. Measurement Results System
5.3.1. Programming System
5.3.2. Read System
6. Discussion and Comparison with Other Read and Programming Circuits
7. Conclusions
Author Contributions
Funding
Institutional Review Board Statement
Informed Consent Statement
Data Availability Statement
Acknowledgments
Conflicts of Interest
Abbreviations
RRAM | Resistive Random Access Memory |
PUF | Physical unclonable function |
SRAM | Static Random Access Memory |
FF | Flip Flop |
NVM | Non-volatile Memory |
AI | Artificial Intelligence |
ML | Machine Learning |
BL | Bitline |
SL | Sourceline |
WL | Wordline |
MIM | Metal-Insulator-Metal |
1T1R | One-Transistor/One-Resistor |
BEOL | Back end of line |
SEM | Scanning electron microscope |
HRS | High resistive state |
LRS | Low resistive state |
ISPVA | Incremental Step Pulse and Verify Algorithm |
LSB | Least significant bit |
MSB | Most significant bit |
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State | Resistance | WL Voltage |
---|---|---|
LRS1 | ≈16 kΩ | 1 |
LRS2 | ≈ kΩ | |
LRS3 | ≈ kΩ | |
HRS | ≈200 kΩ |
Name | Type | In/Out | Function |
---|---|---|---|
Tpulse | digital | Input | length of voltage pulse |
Vpulse | analog | Input | height of voltage pulse |
read_enable | digital | Input | read or programming operation |
set_reset | digital | Input | polarity of voltage pulse |
VSL | analog | Output | SL voltage signal |
VBL | analog | Output | BL voltage signal |
bit<0:2> | digital | Output | read values |
Corresponding | Output | |
---|---|---|
<380 | > | 000 |
380 | 001 | |
420 | 25 | 010 |
475 | 011 | |
530 | 13 | 100 |
660 | 101 | |
780 | 110 | |
≥930 | ≤ | 111 |
Measurement Resistance | Read Values | State |
---|---|---|
96% 110; 4% 101 | LRS3 | |
100% 100 | LRS2 | |
16 | 84% 010; 16% 011 | LRS1 |
200 | 100% 000 | HRS |
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Pechmann, S.; Mai, T.; Völkel, M.; Mahadevaiah, M.K.; Perez, E.; Perez-Bosch Quesada, E.; Reichenbach, M.; Wenger, C.; Hagelauer, A. A Versatile, Voltage-Pulse Based Read and Programming Circuit for Multi-Level RRAM Cells. Electronics 2021, 10, 530. https://doi.org/10.3390/electronics10050530
Pechmann S, Mai T, Völkel M, Mahadevaiah MK, Perez E, Perez-Bosch Quesada E, Reichenbach M, Wenger C, Hagelauer A. A Versatile, Voltage-Pulse Based Read and Programming Circuit for Multi-Level RRAM Cells. Electronics. 2021; 10(5):530. https://doi.org/10.3390/electronics10050530
Chicago/Turabian StylePechmann, Stefan, Timo Mai, Matthias Völkel, Mamathamba K. Mahadevaiah, Eduardo Perez, Emilio Perez-Bosch Quesada, Marc Reichenbach, Christian Wenger, and Amelie Hagelauer. 2021. "A Versatile, Voltage-Pulse Based Read and Programming Circuit for Multi-Level RRAM Cells" Electronics 10, no. 5: 530. https://doi.org/10.3390/electronics10050530
APA StylePechmann, S., Mai, T., Völkel, M., Mahadevaiah, M. K., Perez, E., Perez-Bosch Quesada, E., Reichenbach, M., Wenger, C., & Hagelauer, A. (2021). A Versatile, Voltage-Pulse Based Read and Programming Circuit for Multi-Level RRAM Cells. Electronics, 10(5), 530. https://doi.org/10.3390/electronics10050530