# Semi-Automated Extraction of the Distribution of Single Defects for nMOS Transistors

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## Abstract

**:**

## 1. Introduction

## 2. Materials and Methods

#### 2.1. Devices and Measurements

#### 2.2. Noise Parameter Extraction

#### 2.3. Defect Parameter Estimation

## 3. Results

#### 3.1. Threshold Voltage Shift and Number of Defects

#### 3.2. Energy and Position

- (i)
- The estimation only accounts for interaction with the channel, defects interacting primarily with the gate might have inverted capture and emission time behavior which results in a negative distance.
- (ii)
- The prefactor which is assumed as constant in the estimation does change with the logarithm of the channel carrier density. This leads to some overestimation of the distance.
- (iii)
- The estimation is based on the values and first derivatives of the capture and emission times at the intersection point. Measurements which do not show ${\tau}_{c}={\tau}_{e}$ within the measurement window need to be extrapolated, which leads to inaccuracies.
- (iv)
- Some defects may not be adequately described using a two state model [29].

#### 3.3. Simulation

## 4. Discussion

## Author Contributions

## Funding

## Conflicts of Interest

## References

- Lenahan, P. Atomic Scale Defects Involved in MOS Reliability Problems. Microelectron. Eng.
**2003**, 69, 173–181. [Google Scholar] [CrossRef] - Rzepa, G.; Waltl, M.; Goes, W.; Kaczer, B.; Grasser, T. Microscopic Oxide Defects Causing BTI, RTN, and SILC on High-k FinFETs. In Proceedings of the 2015 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Washington, DC, USA, 9–11 September 2015; pp. 144–147. [Google Scholar]
- Denais, M.; Huard, V.; Parthasarathy, C.; Ribes, G.; Perrier, F.; Revil, N.; Bravaix, A. Interface Trap Generation and Hole Trapping under NBTI and PBTI in Advanced CMOS Technology with a 2-nm Gate Oxide. IEEE Trans. Devices Mater. Reliab.
**2004**, 4, 715–722. [Google Scholar] [CrossRef] - Grasser, T.; Kaczer, B.; Gös, W.; Reisinger, H.; Aichinger, T.; Hehenberger, P.; Wagner, P.J.; Franco, J.; Toledano-Luque, M.; Nelhiebel, M. The Paradigm Shift in Understanding the Bias Temperature Instability: From Reaction-Diffusion to Switching Oxide Traps. IEEE Trans. Electron Devices
**2011**, 58, 3652–3666. [Google Scholar] [CrossRef] - Stathis, J.H.; Mahapatra, S.; Grasser, T. Controversial Issues in Negative Bias Temperature Instability. Microelectron. Reliab.
**2018**, 81, 244–251. [Google Scholar] [CrossRef] - Ralls, K.S.; Skocpol, W.J.; Jackel, L.D.; Howard, R.E.; Fetter, L.A.; Epworth, R.W.; Tennant, D.M. Discrete Resistance Switching in Submicrometer Silicon Inversion Layers: Individual Interface Traps and Low-Frequency ($\frac{1}{f}$) Noise. Phys. Rev. Lett.
**1984**, 52, 228–231. [Google Scholar] [CrossRef] - Uren, M.; Day, D.; Kirton, M. 1/f and Random Telegraph Noise in Silicon Metal-Oxide-Semiconductor Field-effect Transistors. Appl. Phys. Lett.
**1985**, 47, 1195–1197. [Google Scholar] [CrossRef] - Ghetti, A.; Compagnoni, C.; Spinelli, A.; Visconti, A. Comprehensive Analysis of Random Telegraph Noise Instability and Its Scaling in Deca–Nanometer Flash Memories. IEEE Trans. Electron Devices
**2009**, 56, 1746–1752. [Google Scholar] [CrossRef] - Fukuda, K.; Shimizu, Y.; Amemiya, K.; Kamoshida, M.; Hu, C. Random Telegraph Noise in Flash Memories-Model and Technology Scaling. In Proceedings of the 2007 IEEE International Electron Devices Meeting, Washington, DC, USA, 10–12 December 2007; IEEE: Piscataway, NJ, USA, 2007; pp. 169–172. [Google Scholar]
- Kükner, H.; Weckx, P.; Franco, J.; Toledano-Luque, M.; Cho, M.; Kaczer, B.; Raghavan, P.; Jang, D.; Miyaguchi, K.; Bardon, M.G.; et al. Scaling of BTI Reliability in Presence of Time-Zero Variability. In Proceedings of the 2014 IEEE International Reliability Physics Symposium, Waikoloa, HI, USA, 1–5 June 2014; IEEE: Piscataway, NJ, USA, 2014; p. CA-5. [Google Scholar]
- Kaczer, B.; Grasser, T.; Roussel, P.J.; Franco, J.; Degraeve, R.; Ragnarsson, L.; Simoen, E.; Groeseneken, G.; Reisinger, H. Origin of NBTI Variability in Deeply Scaled pFETs. In Proceedings of the 2010 IEEE International Reliability Physics Symposium, Anaheim, CA, USA, 2–6 May 2010; pp. 26–32. [Google Scholar] [CrossRef]
- Toledano-Luque, M.; Kaczer, B.; Roussel, P.; Cho, M.; Grasser, T.; Groeseneken, G. Temperature Dependence of the Emission and Capture Times of SiON Individual Traps after Positive Bias Temperature Stress. J. Vac. Sci. Technol. B
**2011**, 29, 01AA04. [Google Scholar] [CrossRef] - Park, S.; Lee, S.; Kang, Y.; Park, B.G.; Lee, J.H.; Lee, J.; Jin, G.; Shin, H. Extracting Accurate Position and Energy Level of Oxide Trap Generating Random Telegraph Noise (RTN) in Recessed Channel MOSFET’s. In Proceedings of the 40th European Solid-State Device Research Conference (ESSDERC), Seville, Spain, 14–16 September 2010; pp. 337–340. [Google Scholar]
- Grill, A.; Stampfer, B.; Waltl, M.; Im, K.S.; Lee, J.H.; Ostermaier, C.; Ceric, H.; Grasser, T. Characterization and Modeling of Single Defects in GaN/AlGaN fin-MIS-HEMTs. In Proceedings of the 2017 IEEE International Reliability Physics Symposium (IRPS), Monterey, CA, USA, 2–6 April 2017; p. 3B-5. [Google Scholar]
- Stampfer, B.; Zhang, F.; Illarionov, Y.Y.; Knobloch, T.; Wu, P.; Waltl, M.; Grill, A.; Appenzeller, J.; Grasser, T. Characterization of Single Defects in Ultrascaled MoS2 Field-Effect Transistors. ACS Nano
**2018**, 12, 5368–5375. [Google Scholar] [CrossRef] - Waltl, M. Ultra-Low Noise Defect Probing Instrument for Defect Spectroscopy of MOS Transistors. Trans. Elec. Dev.
**2020**. submitted. [Google Scholar] [CrossRef] - Kapila, G.; Reddy, V. Impact of Sampling Rate on RTN Time Constant Extraction and its Implications on Bias Dependence and Trap Spectroscopy. IEEE Trans. Device Mater. Reliab.
**2014**, 14, 616–622. [Google Scholar] - Grasser, T.; Wagner, P.J.; Hehenberger, P.; Goes, W.; Kaczer, B. A Rigorous Study of Measurement Techniques for Negative Bias Temperature Instability. IEEE Trans. Device Mater. Reliab.
**2008**, 8, 526–535. [Google Scholar] [CrossRef] - Canny, J. A Computational Approach to Edge Detection. In Readings in Computer Vision; Elsevier: Amsterdam, The Netherlands, 1987; pp. 184–203. [Google Scholar]
- McIlhagga, W. The Canny Edge Detector Revisited. Int. J. Comput. Vis.
**2011**, 91, 251–261. [Google Scholar] [CrossRef] [Green Version] - Martin-Martinez, J.; Diaz, J.; Rodriguez, R.; Nafria, M.; Aymerich, X. New Weighted Time Lag Method for the Analysis of Random Telegraph Signals. IEEE Electron Device Lett.
**2014**, 35, 479–481. [Google Scholar] [CrossRef] - Maestro, M.; Diaz, J.; Crespo-Yepes, A.; Gonzalez, M.; Martin-Martinez, J.; Rodriguez, R.; Nafria, M.; Campabadal, F.; Aymerich, X. New High Resolution Random Telegraph Noise (RTN) Characterization Method for Resistive RAM. Solid-State Electron.
**2016**, 115, 140–145. [Google Scholar] [CrossRef] [Green Version] - Ghahramani, Z.; Jordan, M.I. Factorial Hidden Markov Models. In Advances in Neural Information Processing Systems 9, Proceedings of the 1996 Conference; MIT Press: Cambridge, MA, USA, 1996; pp. 472–478. [Google Scholar]
- Frank, D.J.; Miki, H. Analysis of Oxide Traps in Nanoscale MOSFETs Using Random Telegraph Noise. In Bias Temperature Instability for Devices and Circuits; Springer: Berlin, Germany, 2014; pp. 111–134. [Google Scholar]
- Kirton, M.; Uren, M. Noise in Solid-State Microstructures: A New Perspective on Individual Defects, Interface States and Low-Frequency (1/f) Noise. Adv. Phys.
**1989**, 38, 367–468. [Google Scholar] [CrossRef] - Nagumo, T.; Takeuchi, K.; Hase, T.; Hayashi, Y. Statistical Characterization of Trap Position, Energy, Amplitude and Time Constants by RTN Measurement of Multiple Individual Traps. In Proceedings of the 2010 International Electron Devices Meeting, San Francisco, CA, USA, 6–8 December 2010; IEEE: Piscataway, NJ, USA, 2010; pp. 28–30. [Google Scholar]
- Goes, W.; Wimmer, Y.; El-Sayed, A.M.; Rzepa, G.; Jech, M.; Shluger, A.; Grasser, T. Identification of Oxide Defects in Semiconductor Devices: A Systematic Approach Linking DFT to Rate Equations and Experimental Evidence. Microelectron. Reliab.
**2018**, 87, 286–320. [Google Scholar] [CrossRef] [Green Version] - Kaczer, B.; Roussel, P.; Grasser, T.; Groeseneken, G. Statistics of Multiple Trapped Charges in the Gate Oxide of Deeply Scaled MOSFET Devices-Application to NBTI. IEEE Electron Device Lett.
**2010**, 31, 411–413. [Google Scholar] [CrossRef] - Grasser, T. Stochastic Charge Trapping in Oxides: From Random Telegraph Noise to Bias Temperature Instabilities. Microelectron. Reliab.
**2012**, 52, 39–70. [Google Scholar] [CrossRef] - Rzepa, G.; Franco, J.; O’Sullivan, B.; Subirats, A.; Simicic, M.; Hellings, G.; Weckx, P.; Jech, M.; Knobloch, T.; Waltl, M.; et al. Comphy—A Compact-Physics Framework for Unified Modeling of BTI. Microelectron. Reliab.
**2018**, 85, 49–65. [Google Scholar] [CrossRef] - Global TCAD Solutions. GTS Framework. Available online: http://www.globaltcad.com/framework (accessed on 17 April 2020).
- Weckx, P.; Kaczer, B.; Chen, C.; Franco, J.; Bury, E.; Chanda, K.; Watt, J.; Roussel, P.J.; Catthoor, F.; Groeseneken, G. Characterization of Time-dependent Variability using 32k Transistor Arrays in an Advanced HK/MG Technology. In Proceedings of the 2015 IEEE International Reliability Physics Symposium, Monterey, CA, USA, 19–23 April 2015; pp. 3B.1.1–3B.1.6. [Google Scholar] [CrossRef]
- Oshima, A.; Komawaki, T.; Kobayashi, K.; Kishida, R.; Weckx, P.; Kaczer, B.; Matsumoto, T.; Onodera, H. Physical-based RTN Modeling of Ring Oscillators in 40-nm SiON and 28-nm HKMG by Bimodal Defect-Centric Behaviors. In Proceedings of the 2016 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Nuremberg, Germany, 6–8 September 2016; IEEE: Piscataway, NJ, USA, 2016; pp. 327–330. [Google Scholar]
- Waltl, M.; Rzepa, G.; Grill, A.; Goes, W.; Franco, J.; Kaczer, B.; Witters, L.; Mitard, J.; Horiguchi, N.; Grasser, T. Superior NBTI in High-k SiGe Transistors - Part I: Experimental. IEEE Trans. Electron Devices
**2017**, 64, 2092–2098. [Google Scholar] [CrossRef]

**Figure 1.**Illustration of oxide defects in (

**a**) large- and (

**b**) small area devices. As the gate area A is reduced, fewer defects N will be present in the device, but on average each defect will have a larger impact $\eta $ on the overall degradation. This increases variability $\sigma $ among nominally identical devices, but also allows characterization of single defects using methods such as random telegraph noise (RTN) analysis and time-dependent defect spectroscopy (TDDS).

**Figure 2.**Transfer characteristics measured on approximately 300 nominally identical devices, with the average characteristic indicated in blue. The bias range (green) and current range (red) used for RTN measurements in this work is indicated using dotted lines.

**Figure 3.**Random telegraph noise traces recorded on a device with ${T}_{\mathrm{s}}=100\mathsf{\mu}\mathrm{s}$. Two active defects with similar step heights are clearly visible. The arrows show steps and dwelling times linked to charge capture (c) and charge emission (e) events of the defects.

**Figure 4.**Noise parameter extraction using the Canny algorithm. To find steps in a $\Delta {V}_{\mathrm{th}}$ trace, it is convoluted with the first derivative of a Gaussian pulse. This yields a signal h, as shown in the center panel, with peaks at the positions of the steps. Thresholding is then applied to h to suppress noise. Finally, the positions of the steps are obtained from the positions of the local maxima in h. The height of the steps may be obtained either from the peaks in h or from the original trace. The result is a list of steps (${t}_{i}$, ${\eta}_{i}$) from which, ideally, the average step height $\eta $, capture time ${\tau}_{c}$, and emission time ${\tau}_{e}$ for each defect can be extracted.

**Figure 5.**Complementary cumulative density function (1-CDF) of the step heights $\eta $ extracted from our measurements, shown for both the slow and the fast sampled data. The distribution seems to be bimodal, composed of a defect distribution with a smaller average impact ${\eta}_{1}$ and a distribution with a larger impact ${\eta}_{2}$.

**Figure 6.**Two defects characterized in detail. From the intersection points and the steepness of the charge capture and emission times, the positions and the trap levels of the defects can be estimated.

**Figure 7.**Distributions of positions and trap levels extracted using Equation (8) and Equation (11). Note that the measured distribution in position should not be interpreted as the complete distribution of defects in the device. It is rather a result of the energetic distribution of the defects in conjunction with the characterization window, which is diagonal in energy and distance, given by the Fermi level at measurement conditions.

**Figure 8.**Simulated band diagram showing the locations of defects extracted using Equation (8) and Equation (11). In addition, defect bands as given in [30] are shown in comparison. Notice how some defects appear located outside of the SiO${}_{2}$ layer. This shows the shortcomings of the estimation used. The estimation does not account for defect interaction with the gate, which often results in negative $d/{t}_{\mathrm{ox}}$ and it generally overestimates the distance of the defects due to the neglected prefactor.

**Figure 9.**Distributions of positions and trap levels from technology computer aided design (TCAD) simulations compared to the estimations made for the same defects. Energies are referenced from Si-midgap, with ${E}_{\mathrm{f}},\mathrm{i}$ taken from the simulation. The electron defect band at ${E}_{\mathrm{t}}=1.01\mathrm{e}\mathrm{V}$ from [30] is shown for comparison. The defects we observe are distributed mainly in the lower half of this band.

© 2020 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).

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**MDPI and ACS Style**

Stampfer, B.; Schanovsky, F.; Grasser, T.; Waltl, M.
Semi-Automated Extraction of the Distribution of Single Defects for nMOS Transistors. *Micromachines* **2020**, *11*, 446.
https://doi.org/10.3390/mi11040446

**AMA Style**

Stampfer B, Schanovsky F, Grasser T, Waltl M.
Semi-Automated Extraction of the Distribution of Single Defects for nMOS Transistors. *Micromachines*. 2020; 11(4):446.
https://doi.org/10.3390/mi11040446

**Chicago/Turabian Style**

Stampfer, Bernhard, Franz Schanovsky, Tibor Grasser, and Michael Waltl.
2020. "Semi-Automated Extraction of the Distribution of Single Defects for nMOS Transistors" *Micromachines* 11, no. 4: 446.
https://doi.org/10.3390/mi11040446