Impact of Line Edge Roughness on ReRAM Uniformity and Scaling
1
Institute of Nanoscience and Nanotechnology, NCSR Demokritos, 15341 Aghia Paraskevi, Greece
2
Nanometrisis P.C., 15341 Aghia Paraskevi, Greece
3
Department of Physics, University of Patras, GR 265 00 Patras, Greece
4
Electronic Materials and Devices Research Group, Zepler Institute for Photonics and Nanoelectronics, University of Southampton, Southampton SO171BJ, UK
*
Authors to whom correspondence should be addressed.
Materials 2019, 12(23), 3972; https://doi.org/10.3390/ma12233972
Received: 29 September 2019 / Revised: 15 November 2019 / Accepted: 21 November 2019 / Published: 30 November 2019
(This article belongs to the Special Issue Nanostructure-Based Memory Devices)
We investigate the effects of Line Edge Roughness (LER) of electrode lines on the uniformity of Resistive Random Access Memory (ReRAM) device areas in cross-point architectures. To this end, a modeling approach is implemented based on the generation of 2D cross-point patterns with predefined and controlled LER and pattern parameters. The aim is to evaluate the significance of LER in the variability of device areas and their performances and to pinpoint the most critical parameters and conditions. It is found that conventional LER parameters may induce >10% area variability depending on pattern dimensions and cross edge/line correlations. Increased edge correlations in lines such as those that appeared in Double Patterning and Directed Self-assembly Lithography techniques lead to reduced area variability. Finally, a theoretical formula is derived to explain the numerical dependencies of the modeling method.
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Keywords:
Resistive Random Access Memory (ReRAM); Line Edge Roughness (LER); variability; uniformity; modeling; lithography
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MDPI and ACS Style
Constantoudis, V.; Papavieros, G.; Karakolis, P.; Khiat, A.; Prodromakis, T.; Dimitrakis, P. Impact of Line Edge Roughness on ReRAM Uniformity and Scaling. Materials 2019, 12, 3972.
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