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Open AccessArticle

Temperature Investigation on 3C-SiC Homo-Epitaxy on Four-Inch Wafers

1
STMicroelectronics, Stradale Primosole, 50, 95121 Catania, Italy
2
IMM-CNR, VIII Strada, 5, 95121 Catania, Italy
3
LPE, XVI Strada, 95121 Catania, Italy
4
Department of Physics and Astronomy, Via S. Sofia 64, 95100 Catania, Italy
*
Authors to whom correspondence should be addressed.
Materials 2019, 12(20), 3293; https://doi.org/10.3390/ma12203293
Received: 12 July 2019 / Revised: 27 September 2019 / Accepted: 29 September 2019 / Published: 10 October 2019
In this work, results related to the temperature influence on the homo-epitaxial growth process of 3C-SiC is presented. The seed for the epitaxial layer was obtained by an innovative technique based on silicon melting: after the first step of the hetero-epitaxial growth process of 3C-SiC on a Si substrate, Si melts, and the remaining freestanding SiC layer was used as a seed layer for the homo-epitaxial growth. Different morphological analyses indicate that the growth temperature and the growth rate play a fundamental role in the stacking faults density. In details, X-ray diffraction and micro-Raman analysis show the strict relationship between growth temperature, crystal quality, and doping incorporation in the homo-epitaxial chemical vapor deposition CVD growth process of a 3C-SiC wafer. Furthermore, photoluminescence spectra show a considerable reduction of point defects during homo-epitaxy at high temperatures. View Full-Text
Keywords: 3C-SiC homo-epitaxy; CVD; bulk growth; growth temperature; KOH; stacking faults 3C-SiC homo-epitaxy; CVD; bulk growth; growth temperature; KOH; stacking faults
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Anzalone, R.; Zimbone, M.; Calabretta, C.; Mauceri, M.; Alberti, A.; Reitano, R.; La Via, F. Temperature Investigation on 3C-SiC Homo-Epitaxy on Four-Inch Wafers. Materials 2019, 12, 3293.

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