Pseudo-Partial-Power Switch-Multiplexed Resonant Converter with Wide Voltage Gain

Abstract

Full-bridge resonant converters have gained widespread adoption due to their excellent performance characteristics. However, these converters face limitations in terms of gain expansion. To address this issue, this paper proposes a switch-multiplexed resonant converter with wide voltage gain. By employing an auxiliary capacitor and inductor, the converter can achieve pseudo partial power processing and effectively expand its voltage gain. To regulate the voltage of the converter, the duty cycle of the switching devices is designed to be modulated, which is different from the conventional resonant converter. By optimizing the design parameters, the resonant current of converter can operate in discontinuous current mode (DCM), eliminating reverse recovery losses and/or minimizing reactive current. All switching devices achieve soft switching, thereby removing switching losses and further enhancing efficiency. Finally, a 1 kW prototype is built to validate the effectiveness of the proposed converter.

1. Introduction

With the increasing urgency of energy demands and environmental challenges, distributed power systems have become a focal point in energy research because of their flexibility, reliability, and environmentally friendly characteristics. The DC-DC converter is a critical unit in distributed power systems, influencing their operational stability and reliability [1,2,3].

DC-DC converters can be approximately categorized into pulse width modulation (PWM) converters and resonant converters. Common PWM converters include the buck converter [4], boost converter [5], forward converter [6], and flyback converter [7], etc. These converters regulate the voltage gain by modifying the pulse width of the modulation signal. Their features utilize simple structures and ease of modulation, leading to significant challenges in achieving soft switching. This issue impacts their overall conversion efficiency. Resonant converters can achieve soft switching and easy control. Common resonant converters include LC and LLC converters. LLC resonant converters have gained widespread application due to their ability to achieve zero voltage switching (ZVS) and zero current switching (ZCS) across the entire load range, coupled with their high conversion efficiency. The LLC resonant converters employ pulse frequency modulation to control voltage gain [8]. When wide voltage gain is required, the switching frequency should deviate from the resonant frequency, leading to decreased efficiency. To enhance converter performance, researchers have modified the resonant converter structure, proposing a two-stage configuration. Refs. [9,10,11,12,13] combined the LLC resonant converter with a buck converter, where the buck converter serves as a voltage regulator in the front-end stage. The LLC resonant converter operates at its resonant point, providing electrical isolation and high-efficiency energy transfer. However, this two-stage structure results in relatively low system efficiency. And the large number of switching devices in two-stage converters limits improvements in power density. To enhance energy conversion efficiency and enable voltage gain regulation, Refs. [14,15,16,17] proposed a topology where the LLC converter is connected in parallel with a voltage gain regulation stage. The LLC stage handles the majority of power transfer, while the regulation stage adjusts the overall voltage gain of the topology. During regulation, this structure achieves high energy conversion efficiency and voltage regulation capability. However, when this topology uses buck or boost converters to regulate the output voltage, the electrical isolation capability is lost [18]. To reduce the number of switching devices, Refs. [19,20] proposed a switch-multiplexed two-stage buck-dual active bridge converter. Yet the two-stage structure, which offers advantages in the power characteristics of the buck inductor section, is currently only applied to dual active bridge converters and has not been extended to resonant converters. Under switch-multiplexing conditions, the input voltage is constrained because voltage gain must be adjusted through duty cycle modulation. This presents a significant challenge when applied to resonant converters, as achieving full-range soft switching for all switches remains an important research goal.

In recent years, the academic community has proposed a variety of converter topologies for achieving wide voltage gain and soft switching. For instance, Wu et al. proposed a fixed-frequency PWM-controlled bidirectional current-source soft-switching series resonant converter for energy storage applications in [21]. This converter can achieve full-range soft switching, but its current-source structure is relatively complex. Zuo et al. presented a fixed-frequency dual-PWM interleaved boost LLC resonant converter for photovoltaic applications in [22]. While this converter features a wide input voltage range, the interleaved structure increases the number of components. Gu et al. proposed a reconfigurable current-source LLC resonant converter based on cyclic PWM control in [23], which also offers a wide voltage gain range but requires complex reconfiguration logic. These existing topologies each have their advantages, yet they generally suffer from problems such as a large number of devices, complex control, or limited application scenarios.

To achieve wide voltage gain, this paper proposes a modified resonant converter with switch multiplexing. By multiplexing the switch, the proposed converter topology does not require additional switches. By employing the auxiliary capacitor and inductor, the converter can modulate the duty cycle of the multiplexed switches and process partial power in the switches network, leading to wide voltage gain. In addition, the proposed converter can operate in discontinuous current mode, and soft switching can be realized. In addition, compared with traditional partial power converters, the topology proposed in this paper also has advantages in terms of electrical isolation characteristics. Traditional partial power converters improve energy conversion efficiency, but auxiliary converters that transfer part of the power cause the entire converter to lose electrical isolation. In the converter proposed in this paper, the current flowing through the auxiliary converter section also passes through the transformer, ensuring the overall electrical isolation characteristics of the converter. In this paper, Section 2 analyzes the topology structure and the operation principle of the proposed converter. Section 3 analyzes the characteristics of the converter in detail, including the voltage gain, soft-switching condition and the pseudo partial power feature. Section 4 is the parameters design of the converter. Section 5 builds the prototype to verify the effectiveness of the proposed converter and its operating performance.

2. Topology and Principle Analysis of the Proposed Converter

2.1. Topology of the Proposed Converter

The switch-multiplexed LC resonant converter proposed in this paper is shown in Figure 1. V_in is the input voltage of the battery and V_out is the output voltage. The primary side of the converter consists of an inverter bridge formed by S₁~S₄, auxiliary inductor L₁, auxiliary capacitor C₂, and DC-blocking capacitor C₃. The secondary side comprises a rectifier bridge formed by diodes D₁~D₄, resonant inductor L₂, and resonant capacitor C₄. The current through auxiliary inductor L₁ is defined as i₀. The transformer has a turns ratio of n:1. The primary ports of the transformer are defined as AB, with the current through these ports defined as i₁. The secondary ports of the transformer are defined as CD, with the current through these ports defined as i₂.

Figure 1. The proposed switch-multiplexed resonant converter topology.

As for the proposed resonant converter, switches S₁ and S₂, auxiliary inductor L₁, and auxiliary capacitor C₂ constitute a buck converter. Specifically, the voltage of the auxiliary capacitor C₂ can be regulated by adjusting the duty cycle of switches S₁ and S₂. When the converter works, part of the converter’s power is transferred through the auxiliary inductor L₁. And by modulating the duty cycle of the multiplexed switches S₁ and S₂, the magnitude of the current of L₁ can be controlled, which means that the power transferred by L₁ is also changed. Then, the total power transferred by the converter can be adjusted to regulate the output voltage, which is the so-called pseudo partial power transmission.

The L₁/C₂ buck stage influences the full-bridge inverter by modifying the voltage amplitude at the midpoint of the primary side inverter bridge (V_AB). Specifically, when S₁ is turned on, the input voltage V_in charges the auxiliary capacitor C₂ through L₁, increasing V_C2. When S₂ is turned on, C₂ discharges through L₁. By adjusting the duty cycle D of S₁ and S₂, V_C2 can be stably controlled at a specific value. This V_C2 is superimposed on the input voltage to form the effective voltage of the full-bridge inverter, thereby changing the voltage gain of the converter. This mechanism avoids the need for additional independent voltage regulation stages, reducing component count and improving integration.

2.2. Operating Principle of the Topology

To analyze the topology conveniently, the parameters of the converter are defined. The operating frequency of the converter is defined as f_s, and the time of one cycle-switching period is defined as T_s. The ratio of the conduction time of S₁ and S₂ to the switching period is defined as the duty cycle D. f_r is the resonant frequency of the converter and defined as follows:

$$f_r={\displaystyle \frac{1}{2\pi \sqrt{L_2\cdot C_4}}}$$

(1)

The operating waveforms of the converter are shown in Figure 2.

Figure 2. The operation waveforms of the proposed converter.

In Figure 2, v_AB is the input voltage, v_CD is the output voltage, i₁ is the current on the primary side of the transformer, i₂ is the current on the secondary side of the transformer, v_C4 is the voltage across the resonant capacitor, and i_L1 is the current through the auxiliary inductor.

As shown in Figure 3, switches S₁ and S₄ operate simultaneously and switches S₂ and S₃ operate simultaneously. Primary side input voltage V_in transfers energy to capacitor C₂ through the multiplexed switches S₁ and S₂ and the auxiliary inductor L₁. When the duty cycle D changes, the voltage V_C2 across the auxiliary capacitor C₂ also changes accordingly. This subsequently alters the voltage amplitude V_AB at the midpoint of the primary side inverter bridge, and the converter gain also changes. Consequently, part of the energy in this converter is transferred through the auxiliary inductor L₁, while another portion is directly transferred through the inverter bridge. The specific operating mode of the converter is described as follows.

Figure 3. The equivalent circuit of the proposed converter for different operation modes.

Mode 0 (t₀~t₁): As shown in Figure 3a, at time t₀, switch S₁ turns on at zero voltage and switch S₄ turns on at zero current. The input power supply delivers energy to capacitor C₂ through inductor L₁. At this point, the primary voltage of the topology equals the input supply voltage plus the voltage across capacitor C₂. Between time t₀ and t_0a, the primary current of the transformer is not zero and the primary side transfers energy to the secondary side through the resonant unit.

Mode 1 (t₁~t₂): As shown in Figure 3b, at time t₁, switches S₁ and S₄ turn off, and all switches are in the off state. This time interval is referred to as the dead time. The energy stored in the parasitic capacitance of switch S₂ is released through inductor L₁ into capacitor C₂, thereby providing the conditions for the zero-voltage turn-on of S₂ in the next interval.

Mode 2 (t₂~t₃): As shown in Figure 3c, at time t₂, switch S₂ turns on at zero voltage and switch S₃ turns on at zero current. At this time, the primary side voltage of the topology equals the negative supply voltage. The primary side transfers energy to the secondary side through the resonant unit. Between time t₂ and t_2a, the primary current of the transformer is not zero and the primary side transfers energy to the secondary side through the resonant unit.

Mode 3 (t₃~t₄): As shown in Figure 3d, at time t₃, switches S₂ and S₃ turn off. Similarly to Mode 1, the energy stored in the parasitic capacitance of switch S₁ is released through inductor L₁ into capacitor C₂, thereby enabling zero-voltage turn-on for S₁ in the next interval.

3. Characteristics Analysis of the Proposed Converters

3.1. Voltage Gain Analysis of the Converter

The voltage gain of the converter can be calculated based on the principle that the power at the input and output terminals of a converter is approximately equal. The expression for the input power on the primary side of the converter is derived as follows,

$$P_{in}={\displaystyle \frac{1}{T_S}}\left[V_{AB}^{t_0~t_{0a}}\cdot {\displaystyle \underset{t_0}{\overset{t_{0a}}{\int }}{i}_1\left(t\right)dt+V_{AB}^{t_2~t_{2a}}\cdot {\displaystyle \underset{t_2}{\overset{t_{2a}}{\int }}{i}_1\left(t\right)dt}}\right]$$

(2)

where the values of $V_{AB}^{t_0~t_{0a}}$ are V_in − V_C2, and the values of $V_{AB}^{t_2~t_{2a}}$ are −V_in. The current i₂ during t₀~t_0a is opposite to the current during t₂~t_2a, which is shown as follows,

$${\displaystyle \underset{t_0}{\overset{t_{0a}}{\int }}{i}_1\left(t\right)}dt=-{\displaystyle \underset{t_2}{\overset{t_{2a}}{\int }}{i}_1}\left(t\right)dt$$

(3)

Then, according to Equation (3), Equation (2) can be obtained as follows:

$$P_{in}={\displaystyle \frac{1}{Ts}}\left(2\cdot V_{in}-V_{C2}\right)\cdot {\displaystyle \underset{t_0}{\overset{t_{0a}}{\int }}{i}_1\left(t\right)}dt$$

(4)

The expression for the secondary output power of the converter can be derived as follows:

$$P_{out}={\displaystyle \frac{1}{Ts}}\left[V_{CD}^{t_0~t_{0a}}\cdot {\displaystyle \underset{t_0}{\overset{t_{0a}}{\int }}{i}_2\left(t\right)dt+V_{CD}^{t_2~t_{2a}}\cdot {\displaystyle \underset{t_2}{\overset{t_{2a}}{\int }}{i}_2\left(t\right)dt}}\right]$$

(5)

where the values of $V_{CD}^{t_0~t_{0a}}$ are V_out, and the values of $V_{CD}^{t_2~t_{2a}}$ are −V_out. The current i₂ during t₀~t_0a is opposite to the current during t₂~t_2a, which is shown as follows,

$${\displaystyle \underset{t_0}{\overset{t_{0a}}{\int }}{i}_2\left(t\right)}dt=-{\displaystyle \underset{t_2}{\overset{t_{2a}}{\int }}{i}_2\left(t\right)}dt$$

(6)

The relation between i₁ and i₂ can be expressed as follows:

$$n\cdot {\displaystyle \underset{t_0}{\overset{t_{0a}}{\int }}{i}_1\left(t\right)}dt={\displaystyle \underset{t_2}{\overset{t_{2a}}{\int }}{i}_2\left(t\right)}dt$$

(7)

Then, the output power can be calculated as follows:

$$P_{out}={\displaystyle \frac{1}{Ts}}\cdot 2n\cdot V_{out}{\displaystyle \underset{t_0}{\overset{t_{0a}}{\int }}{i}_1\left(t\right)}dt$$

(8)

Because the input power and output power are equal, which is shown as follows:

$$P_{in}=P_{out}$$

(9)

The voltage gain of the converter can be obtained as follows:

$$M={\displaystyle \frac{V_{out}}{V_{in}}}={\displaystyle \frac{2-\frac{V_{C2}}{V_{in}}}{2n}}$$

(10)

where V_C2 is the output voltage of buck converter. And the voltage of C₂ can be adjusted by modulating the duty cycle of the multiplexed switches S₁ and S₂, which can be expressed as follows:

$$V_{C2}=\left(1-D\right)\cdot V_{in}$$

(11)

According to Equations (10) and (11), the voltage gain M can be expressed as follows:

$$M={\displaystyle \frac{1+D}{2n}}$$

(12)

The voltage gain curve is shown in Figure 4.

Figure 4. Voltage gain curve.

3.2. Soft-Switching Analysis

As Figure 2 shows, the current i₁ flowing through switches S₃ and S₄ has dropped to zero before they turn on or off. Therefore, S₃ and S₄ can achieve ZCS turn-on and turn-off. To achieve ZVS for switches S₁ and S₂, S₁ and S₂ must complete the charging and discharging of their parasitic capacitance within the dead time. This requires the energy stored in inductor L₁ to exceed the energy in the parasitic capacitance of the switches. Based on the topology structure, the ZVS condition of the switches S₁ and S₂ can be expressed as follows:

$${\displaystyle \frac{1}{2}}\cdot L_1\cdot I_{L_{1\_off}}^2>2\cdot {\displaystyle \frac{1}{2}}\cdot C_j\cdot V_{in}^2$$

(13)

where I_{L1_off} represents the current in inductor L₁ when the switches turn off and C_j denotes the value of the parasitic capacitance. Based on the equation, the ZVS conditions of S₁ and S₂ can be derived as follows:

$$L_1>{\displaystyle \frac{2\cdot C_j\cdot V_{in}^2}{I_{L_{1\_off}}^2}}$$

(14)

The average current flowing through inductor L₁ equals the negative of the average current flowing through switch S₄, which can be shown as follows:

$$\overline{i_{L_1}}=-\overline{i_{S_4}}=-{\displaystyle \frac{1}{Ts}}{\displaystyle \underset{t_0}{\overset{t_{0a}}{\int }}{i}_1}\left(t\right)dt$$

(15)

Then, I_{L1_off} can be calculated as follows:

$$i_{L_1}\left(t_0\right)=-{\displaystyle \frac{D\cdot Ts\cdot V_{C2}}{2\cdot L_1}}+\overline{i_{L1}}$$

(16)

3.3. Pseudo Partial Power Analysis

For the converter described above, a portion of the power is handled by the auxiliary inductor L₁ and auxiliary capacitor C₂. The calculation of the power is calculated as follows:

$$P=\overline{i_0}\cdot v_{C2}$$

(17)

Based on Equations (11) and (15), the partial power transferred can be derived as follows:

$$P={\displaystyle \frac{(1-D)\cdot v_{in}\cdot P_0}{2\cdot n\cdot v_{out}}}$$

(18)

Then, the ratio of the partial power P transferred by auxiliary inductor L₂ and auxiliary capacitor C₄ to the total power P_o can be calculated as follows:

$$K={\displaystyle \frac{1-D}{1+D}}$$

(19)

The proportional diagram of partial power is shown in Figure 5.

Figure 5. Proportional of the transferred partial power.

From the above equation, it can be seen that K decreases as the duty cycle D increases. Theoretically, when D approaches zero, K will reach its maximum value of 1.

4. Converters Parameter Design of the Converter

To verify the analysis of the converter, a prototype will be built, and the parameter design of the converter is shown as follows.

The ratio of the transformer can be designed based on the relationship between the input voltage and the output voltage. When the converter operates at a low duty cycle, it generates significant spike resonant currents. Therefore, in practical applications, the voltage gain of the converter must be less than unity. Then, the ratio n of the transformer can be derived according to the following equation.

$$M={\displaystyle \frac{1+D}{2n}}={\displaystyle \frac{V_{out}}{\left(V_{in\_\max }+V_{in\_\min }\right)/2}}$$

(20)

V_{in_min} denotes the minimum value of the input voltage and V_{in_max} denotes the maximum value of the input voltage.

The design of the resonant tank requires that the minimum conduction time of the switches exceed half a resonant cycle to enable the converter to operate in current discontinuous mode. Then, the resonant frequency can be expressed as follows:

$$f_r={\displaystyle \frac{f_s}{2\cdot D_{\min }}}$$

(21)

where D_min represents the minimum duty cycle of the switches, and can be calculated as follows:

$$D_{\min }={\displaystyle \frac{2n\cdot V_{out}}{V_{in\_\min }}}-1$$

(22)

The value of resonant capacitor C₄ can be designed based on the current discontinuity conditions. To satisfy the discontinuity of the primary side current, resonant capacitor C₄ must meet condition, shown as follows:

$$C_4>{\displaystyle \frac{P_{in}\cdot Ts}{8\cdot V_{out}^2}}$$

(23)

According to Equation (1), the value of resonant inductor L₂ can be calculated as follows:

$$L_2={\displaystyle \frac{1}{4\cdot {\pi }^2\cdot f_r^2\cdot C_r}}$$

(24)

Based on Equations (18), (20) and (21), the range of L₂ can be calculated as follows:

$$L_2<{\displaystyle \frac{8\cdot D_{\min }^2\cdot V_{out}^2}{{\pi }^2\cdot f_s\cdot P_{in}}}$$

(25)

5. Simulation Analysis and Experimental Validation

To verify the correctness of the above theoretical analysis, a simulation model was first built in the software for validation. In a closed-loop situation, the voltage and current waveforms on capacitor C₂ are shown in Figure 6.

Figure 6. Voltage and current waveforms of capacitor C₂.

This is the current and voltage waveform across capacitor C₂ under steady-state conditions. When the system enters a steady state, the duty cycle D is constant, the capacitor voltage fluctuates around a certain value, and the capacitor current i_C2 charges and discharges capacitor C₂ within a cycle as the switch changes, generally showing a periodic pattern.

The relationship between the voltage across capacitor C₂ and the duty cycle D is shown in Figure 7.

Figure 7. Waveform diagram of voltage V_AB between AB ports and voltage V_C2 across capacitor C₂ under different duty cycles D.

From the simulation results in Figure 7, it can be seen that when the duty cycle D increases, the voltage across the auxiliary capacitor C₂ decreases, and the voltage across the input terminals AB is V_AB = Vin − V_C2, so the voltage across AB increases. The simulation results are consistent with the theoretical analysis, confirming the correctness of the theoretical analysis.

When the input voltage is 100 V, adjust the duty cycle D to obtain the average capacitor voltage V_C2 under any duty cycle D. Plot the relationship between the capacitor voltage V_C2 and the duty cycle D as a line chart; the relevant graph is shown in Figure 8.

Figure 8. The relationship curve between capacitor voltage V_C2 and duty cycle D.

As shown in Figure 8, as the duty cycle D increases, the voltage across capacitor C₂ decreases. And the relationship between the capacitor voltage and the duty cycle as specified in Equation (11) is satisfied among them.

The input current i1 and the auxiliary inductor current i_L1 waveforms are shown in Figure 9.

Figure 9. Input current and auxiliary inductor current.

As can be seen from Figure 9, the waveform on inductor L₁ is a periodically varying triangular wave, while the input waveform i₁ is similar to a sine wave.

To validate the feasibility of the proposed converter topology and the validity of the theoretical analysis, an experimental prototype was designed based on the parameter design. This prototype operates with an input voltage range of 100 V to 125 V, an output voltage of 400 V, a working frequency of 100 kHz, and a maximum output power of 1000 W. The prototype is shown in Figure 10. The parameters of the prototype are listed in Table 1. Based on Equation (3) and the prototype′s relevant parameters, the value of resonant inductor L₂ should be less than 116 uH. The leakage inductance of the transformer used in the experiment is 8 uH, which meets the requirement. Therefore, the internal leakage inductance of the transformer is treated as the resonant inductor, so the value of resonant inductance L₂ is 8 uH. According to Equations (18) and (21), the value of the resonant capacitor is calculated to be 150 nF. The specific parameter design is shown in Table 1.

Figure 10. Experimental prototype.

Table 1. Transformer Prototype Parameters.

Parameters	Value
Power P0 (W)	1000
Input Voltage Vin (V)	100–125
Output Voltage Vout (V)	400
Switching Frequency fr (kHz)	100
Resonant Inductor L2 (uH)	8
Resonant Capacitor C4 (nF)	150
Auxiliary Inductor L1 (uH)	15
Auxiliary Capacitor C2 (uF)	15
Transformer Voltage ratio n	5:24

Figure 11 shows the full-load steady-state operating waveforms of the converter under different input voltages. As seen, voltage v_gs1 represents the driver signal voltage of S₁. During the actual experiment, diodes D₁~D₄ were replaced with MOSFET to achieve synchronous rectification. And v_{gs_SR} is the driving signal of the synchronous rectifier. Current i₂ represents the secondary side current of the converter, while voltage V_out indicates the output voltage. As shown in Figure 10, the converter operates in current discontinuous mode, enabling ZCS for switching devices S₃ and S₄. At the same time, the current i₂ in Figure 11 is the same as the current i₁ in the simulation, verifying the accuracy of the simulation.

Figure 11. Full-load steady-state waveforms under different input voltages.

Figure 12 shows the ZVS waveforms of the converter under different input voltages. As seen, v_gs2 represents the driver voltage of switch S₂, v_ds2 denotes the drain source voltage of switch S₂, v_AB indicates the voltage between bridge arm midpoints A and B, and i_L1 signifies the current through auxiliary inductor L₁. This current is approximately the same as the current i_L1 in the simulation, further demonstrating the correctness of the related theory in the paper. As illustrated in Figure 12, ZVS is achieved for switch S₂ regardless of the input voltage applied.

Figure 12. Zero-voltage waveforms under different input voltages.

At the same time, it can be seen from Figure 12 that when the positive–negative ratio of the input voltage changes (i.e., when the duty cycle D changes), it can be known from Equation (11) that the voltage across capacitor C₂ will also change, which in turn causes a change in the voltage V_AB at the input port AB.

Figure 13 shows the dynamic waveforms of the converter during the load change from a light load to a full load under different input voltages. As seen, i_out represents the output current. As shown in Figure 12, the converter maintains normal closed-loop operation during the load change. Additionally, the closed-loop dynamic adjustment time is almost the same under different input voltages.

Figure 13. Dynamic waveforms of load change from light load to full load.

Figure 14 shows the dynamic waveform when the input voltage V_in changes. As seen, the output voltage remains stable despite variations in the input voltage. This demonstrates the excellent dynamic response of the converter.

Figure 14. Dynamic waveform when input voltage changes.

Figure 15 shows the efficiency comparison curves of the converter under different input voltages and output power. At a light load, conduction loss is relatively small, but switching loss (soft-switching effect weakened) and fixed loss account for a significant proportion, total loss decreases slowly, and efficiency drops. At a full load, conduction loss becomes the dominant loss and rises rapidly with increasing power; although switching loss is still relatively low, it cannot compensate for the increase in conduction loss, leading to a decline in efficiency. At a medium load (around 460 W), switching loss is minimized due to sufficient soft switching, the increase in conduction loss with current has not yet offset the advantage of low switching loss, core loss is also at a low level, various losses reach an optimal balance, and overall efficiency is at its highest. At approximately 460 W, the converter achieves peak efficiency of about 95%, and its full-load efficiency is around 93%.

Figure 15. Efficiency curves of the converter at different input voltages and power levels.

6. Comparison with Other Topologies

To highlight the relevant characteristics of the transformer proposed in this paper, it was compared with the transformers cited in the references mentioned in the abstract, and the results of the comparison are shown in Table 2.

Table 2. Comparative analysis of related topological properties.

Comparison Dimension	Proposed Switch-Multiplexed Resonant Converter in This Paper	Bidirectional Current-Source Soft-Switching Series Resonant Converter by Wu et al. [21]	Fixed-Frequency Dual-PWM Interleaved Boost LLC Resonant Converter by Zuo et al. [22]	Reconfigurable Current-Source LLC Resonant Converter by Gu et al. [23]
Component Count	Fewer (no additional switches; S1 and S2 are multiplexed)	More (complex current-source structure requires extra components)	More (interleaved structure increases the number of components)	More (complex reconfiguration logic demands additional components)
Number of magnetic components	Three (auxiliary inductor L1, resonant inductor L2, transformer)	Not explicitly mentioned; it is inferred to include resonant inductor, transformer, etc., with a count of no less than three	Not explicitly mentioned; the interleaved structure requires additional inductors, with a count of more than three	Not explicitly mentioned
Loss magnitude ranking	Lower (soft switching eliminates switching losses; DCM reduces reverse recovery losses and reactive current)	Medium (full-range soft switching is achievable, but the complex structure may increase conduction losses)	Medium (wide input voltage range is realized, but the interleaved structure increases conduction losses)	Medium (wide gain range is obtained, but complex logic may introduce additional control losses)
Power density and volume	Higher (high component integration and compact volume)	Lower (complex current-source structure leads to large volume and limited power density)	Lower (the interleaved structure increases the number of components, resulting in larger volume and reduced power density)	Lower (the reconfigurable structure requires extra components, leading to large volume and insufficient power density)

As can be seen from Table 2, the switch-multiplexed resonant converter proposed in this paper has fewer components compared to Wu′s [21] bidirectional current-source soft-switching series-resonant converter, Zuo′s [22] fixed-frequency dual-PWM interleaved boost LLC resonant converter, and Gu′s [23] reconfigurable current-source LLC resonant converter, with only three magnetic elemnts, lower energy loss (soft switching eliminates switching loss; DCM reduces reverse recovery loss and reactive current), higher power density, more compact size, and overall better performance.

7. Conclusions

This paper proposes a novel switch-multiplexed resonant converter and details its operating principles. By adjusting the duty cycle of the multiplexed switches, the partial power transferred through the auxiliary inductor can be controlled. Thus, the total power transferred by the converter can be adjusted to regulate the output voltage. This paper analyzes the voltage gain, soft-switching characteristics, and conditions for resonant current discontinuity of the converter, while providing specific design schemes for the parameters. Finally, a 1000 W experimental prototype was designed and validated through testing, confirming the feasibility of the proposed converter topology and conclusions.