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Article

Considerations on Combining Unfolding Inverters with Partial Power Regulators in Battery–Grid Interface Converters

by
Ilya A. Galkin
1,*,
Rodions Saltanovs
1,
Alexander Bubovich
1,
Andrei Blinov
2 and
Dimosthenis Peftitsis
3
1
Faculty of Electrical and Environmental Engineering, Riga Technical University, LV-1048 Riga, Latvia
2
Department of Electrical Power Engineering and Mechatronics, Tallinn University of Technology, 19086 Tallinn, Estonia
3
Department of Electric Energy, Norwegian University of Science and Technology, 7034 Trondheim, Norway
*
Author to whom correspondence should be addressed.
Energies 2024, 17(4), 893; https://doi.org/10.3390/en17040893
Submission received: 12 December 2023 / Revised: 5 February 2024 / Accepted: 7 February 2024 / Published: 14 February 2024

Abstract

:
The application of electrochemical cells as a source unit of electrical energy is rapidly growing—used in electric vehicles and other electric mobility devices, as well as in energy supply systems—as energy storage, often together with renewable energy sources. The key element of such systems is the power electronic converter used for DC energy storage and AC grid interfacing. It should be bidirectional to charge and discharge the battery when it is necessary. Two-stage battery interface converters are the most common; their DC-DC stage controls the battery current and adjusts voltage, but the DC-AC stage (inverter or frontend) controls the current in the grid. The use of unfolding inverters in two-stage battery interfaces can have some advantages. In this case, the DC-DC converter produces half-sinewave pulsating voltages and currents, but the unfolding circuit changes the polarity of the voltages and currents and produces no switching losses. Another trend of modern power electronics is the principle of partial power processing. In this case, power electronic converters deal only with a part of the total power; therefore, losses in such converters are reduced. This paper considers combining unfolding frontends with partial power DC-DC converters that enable the further reduction in losses. In this paper, it is shown that such implementation of the partial power conversion principle in semi-DC-AC systems is really possible based on the real-time matching of the voltage of the partial-power DC-DC converter, battery voltage (which depends on its state of charge) and the rectified instantaneous voltage of the AC grid.

1. Introduction

Electrochemical cells are historically one of the most known and one of the most widespread devices for the storage of electrical energy [1,2]. This particularly refers to the rechargeable batteries that are the most suitable source of energy for portable electronic equipment, as well as a convenient source of energy for hand tools and household equipment. Nowadays, recent achievements in battery chemistry, in particular those based on Li-Ion technology, accelerate the improvement of the parameters of rechargeable batteries. Overview papers like [3] regularly report a higher specific energy (several hundred Wh/kg) and power (several kW/kg), operation time (several thousand cycles), charge–discharge efficiency (>95%), as well as the more affordable price of Li-Ion batteries. This brings the technology of rechargeable batteries to such application fields like transport (All-Electric Vehicles—EVs or Battery-Powered Electric Vehicles—BEVs) and energy supply (known as battery energy storage systems—BESSs), in particular, to supply systems with renewable energy sources [4]. At the same time, it must be noted that modern rechargeable batteries are not just mechanical combinations/connections of several electrochemical cells. They also often incorporate electronic circuits or battery management systems for cell balancing, protection and diagnostics [5,6], and, sometimes, thermal management units that stabilize the temperature of these batteries in an intensive charge/discharge process improve their operation parameters even more [7].
The operation of modern batteries occurs in conjunction with dedicated electronic converters controlling the charge and discharge of the batteries. The overviews of BESS usually emphasize two kinds of converters integrated into BESS: isolated and non-isolated [8,9]. The isolated converters are distinguished from the non-isolated ones by the absence/presence of the full power transformer in the converter. The first group typically contains “safe” low-voltage batteries. At the same time, this definition of safety is rather vague. Reference [9] contains a brief analysis of the regulations applicable to BESSs. It has been concluded that these regulations define the constraints for various grid-tied electrical equipment but do not explicitly limit the voltage of batteries. For this reason, in some cases, BESS manufacturers refer to other standards that regard other equipment with batteries, for example, telecom centers [10] and personal mobility vehicles like wheelchairs [11,12]. It is quite typical that these standards separate the parts of the equipment accessible by ordinary users (batteries) from the parts of the equipment accessible only by qualified staff (chargers). While the chargers have quite high AC limitations (for example, 250VAC in [11]), more accessible batteries have much lower DC limitations; ref [10] defines the dangerous level at 60 V while [11] defines it at and 36 V (for lead-acid batteries), and [12] at 50 V (for Li-ion batteries). As a consequence, according to Section 3 of [9], the market-available BESSs typically include a “safe” 48–60 V battery or a battery linked to the ratified grid voltage (300–400 V) or supplied in two configurations with low or high-voltage battery.
The converters of the first type typically include a grid frequency or high-frequency-isolating transformer that galvanically separates the battery component of energy storage from its grid component. For the same safety reasons, the battery interface converters (chargers) of BEVs are also typically isolated. To the same extent, this refers to the converters allocated outside the BEVs—off-board chargers—[13] or those placed inside of them—on-board chargers [14]—as well as the chargers larger [13,14] or smaller [15,16] BEVs.
The converters of the second type, or non-isolated converters, can link to the grid’s rather high-voltage batteries. On one hand, the BMS of such batteries is more complex, expensive and less reliable, but on the other hand, this eliminates the need for a full-power-isolating transformer and the corresponding losses. In addition, the same operation power is achieved at lower currents and, therefore, with lower conduction and switching losses. These converters and BESS, therefore, are potentially more energy efficient. Some BESSs available on the market are offered with low and high-voltage battery versions that prove the prospects of this combination of batteries and chargers [17].
When talking about BESS interface converters for high-voltage batteries, it is also necessary to outline their two main topologies: single- and two-stage. The single-stage converters link the floating voltage of the battery and the AC voltage of the grid through a monolithic power converter (grid frontend). They are typically extremely efficient for one operation point with a particular state of charge (SoC) of the battery but not so efficient if SoC is different. Introducing a pre-regulator compensates for the floating of battery voltage and stabilizes the DC voltage of the frontend at the level optimal for its operation. This makes the operation of the frontend more efficient for a wider range of SoC, but it also reduces the efficiency at the best operation point [8,9] due to the extra losses in the pre-regulator.
The final choice of the battery and its interface converter is made based on the trade-off between lower losses and the higher efficiency of BESS on one hand, but on the other, it must consider a safer low-voltage battery, a more simple and reliable battery management system, as well as the simpler installation and maintenance of the BESS.
This work is devoted to a loss reduction in BESSs. Usually, the loss reduction and higher efficiency of BESSs with non-isolated converters refer to two matters: (1) the battery of such a BESS has a higher voltage and, therefore, the interface converter and BESS, on the whole, operate at lower currents leading to lower conduction losses; (2) the absence of the full-power isolating transformer excludes all the losses associated with this transformer. In addition to these two considerations, this research also utilizes two promising loss reduction techniques. One of them is partial power conversion, but the other one is the use of unfolding inverters. While separate studies on these techniques are frequent, their combination is not studied well. Quite rare reports are devoted to unidirectional coverers, mostly for photovoltaic applications (see Section 2 for details). This paper expands the study to bidirectional systems, namely, to BESSs. Combining these two techniques allows the use of a lower voltage battery without the use of the full-power isolation transformer that causes the above-mentioned trade-off. One part of this research is performed experimentally in order to prove the feasibility of the proposed BESS interface converter. The other part of this work treats a mathematical model of the converter with the goal of determining its losses and the link between its losses and partiality. In both cases, the main research method is data gathering and analysis.

2. Approaches to Loss Reduction

The two-stage interface converter for BESS, considered in this paper, is intended for high-voltage batteries, that allow it to operate with lower currents and, therefore, lower conduction losses. In addition, this converter logically combines and utilizes two trends in the design of power electronic converters, also facilitating loss reduction. The first feature is the use of partial power converters in DC systems which, together with a reduction in processed power, also reduces the losses. In turn, the second feature is related to the operation of the network frontend of the two-stage converters. An alternative to the traditional pulse mode operation of the frontend exists is, in this case, the grid–frequency direct commutation of the DC-link to the grid that requires semi-sinusoidal voltage in the DC-link but allows the almost pure elimination of the switching losses (such converters are known as unfolding inverters or unfolders). Let us consider these two trends in more detail.
In contrast to the full-power DC-DC converters that are subject to full input and output voltages, they conduct a full current and, therefore, process the full system power, and partial-power DC-DC converters (PPC) are connected between system inputs and outputs in such a way that the converter processes only the difference between input and output voltages and currents. For this reason, PPCs deal with only a part of the full system’s power while its major part is transmitted from the input of the system to its output without any conversion [18,19].
PPC benefits include the following: (1) a lower converter switching current and voltage, which allows the selection of cheaper and more compact semiconductor switches (transistors and diodes); (2) lower converter losses (determined by lower-rated power) which significantly improves the total energy efficiency and facilitates cooling. The lower the voltage/current difference handled by a PPC, the more pronounced the benefits of the partial power conversion. PPCs are particularly convenient to compensate for the parameter floating of DC energy sources or storages, such as batteries or PVs. For example, voltage reduction in a battery together with its SoC at its discharge may be compensated by a PPC, the input of which is connected to the battery in parallel with its output in a series, thus forming the sum of the battery and PPC voltages. PPC then generates the difference between the maximum battery voltage (at SoC 100%) and its actual voltage. So, by definition, such PPC processes the mentioned difference that is lower than the full battery voltage. For a 100-cell Li-Ion battery, the maximal PPC voltage can conclude +100 × (4.2 − 2.5) = +170 V (where 2.5 V is the cut-off voltage of the cell, but 4.2 V is the maximal open circuit voltage of the fully charged cell) while the full-scale converter deals with 420 V. In this example, the full power is 2.5 times higher than the partial processed power.
Unipolar PPCs can only add (or subtract) their voltage (current) to the base value and bipolar PPCs are capable of both adding and subtracting. The PPCs of the second kind can operate with twice as low voltage/current/power compared to single-polarity PPCs [20]. For example, in the previous battery example, bipolar PPC can operate with ±100 × (4.2 − 2.5)/2 = ±85 V while providing, at the same time, the complete compensation of the battery voltage drop at 170 V. In this case, the processed power is five times lower than the actual power.
Schematically, PPC can be a DC-DC converter of any isolated topology. The most versatile implementation of unipolar PPCs is typically based on a Double Active Bridge (DAB), but other schemes are also possible. For example, ref. [21] presents PPCs of flyback and full-bridge phase shift topologies.
Bipolar PPCs include bidirectional or four-quadrant switches at their secondary side. For example, ref. [22] presents a bipolar version of the full-bridge phase shift converter from [21], while [23] describes a PPC with a bipolar DAB. Other schemes utilize resonant chains for better commutation and lower losses; for example, a bipolar DAB with a resonant tank is reported in [24]. It must be noted that all the above-mentioned PPCs [20,21,22,23,24] are intended solely for use in DC-DC systems.
The second trend in the field of power electronic converters, which is utilized in the considered system, refers to the principles of synthesis of the AC voltage in two-stage DC/AC inverters. As has been mentioned, the first stage of such inverters is a DC/DC regulator, while the second stage is a network frontend (rectifier/inverter). These stages are connected through a DC-bus. Traditionally, both stages are pulse mode converters—the first compensates for changes in the battery, and the second forms a sine-form voltage and connects it to the grid. The alternative method of synthesis of the AC voltage/current assumes that the regulator not only compensates for the voltage changes in the battery but also forms a semi-(rectified) sinewave at its output. As a result, the DC-link voltage and current pulsate, while the frontend just unfolds these pulses to the grid with predetermined polarity and with a low network frequency, operating as a commutator or as diodes in a diode rectifier [25,26]. It is clear that the power losses in such a commutator (known as unfolding frontend or unfolder) are lower because they do not include the component of the losses associated with high-frequency switching. This principle of commutation of the pre-shaped semi-sinewave voltage is also applicable to three-phase systems [27,28].
When considering the two-stage battery interface inverters with a pulsating DC-bus, one can notice that, while the frontend produces lower losses, the regulator forms the voltage in the full range from zero to the amplitude of the network voltage that is hardly compatible with partial power principle. On the other hand, if the DC-bus is stabilized, then the regulator can process partial power and may have lower losses, but the frontend is a pulse mode circuit with additional switching losses. It is quite logical that certain attempts were made in order to combine the PPC principle with a pulsating DC-bus and unfolding frontend.
One of the earliest distinct attempts to achieve power partiality with unfolders is reported in [29,30]. The papers present a two-stage two-level voltage-sourced inverter for PVs that adds the variable voltage from the pulse mode circuit to the constant voltage of PV. These works aim to compensate for the voltage reduction over the PV matrix that leads to the operation of the inverter at limited power if the PV voltage is low. Being a unidirectional inverter, it is suitable only for PVs. In addition, the presented inverter is not a truly partial power converter but just operates at reduced parameters (a good explanation of this phenomenon can be found in [19]).
Paper [31] presents a two-stage interface converter for batteries with a mid-point, which combines a specific unipolar two-level inverter with an explicit unfolder. In this case, the converter transforms the constant voltage from one or another DC source (fractions of the battery) into a semi-sine voltage of the DC-bus that is applied to the grid by the unfolder. The inverter rater utilizes the principle of fractional power conversion when partial power is taken from a distinct fraction of the power source (that could lead to the non-even aging of the battery cells). The paper itself is more focused on control matters, particularly, on the problem of voltage zero crossing, but its loss analysis is very brief.
Paper [32] and patent [33] present a two-stage inverter, which combines the true PPC principle with a pulsating DC-bus and unfolding frontend. This work utilizes a series input–parallel output (SIPO) PPC scheme and, like [29,30], is intended for PV interfacing. These documents provide a feasible study of SIPO PPC with the UF inverter and DC allocation of the current firming inductor. At the same time, they do not pay much attention to the study of the actual partiality and its influence on the losses and parameters of the semiconductor switches. In addition, the proposed technical solutions are not suitable for use with BESS due to their unidirectional nature.
The essence of this work follows from the mismatch of the above-discussed solutions [29,30,31,32,33] from considering the application or principle of the true partiality of power conversion. Its main contribution includes the development of a novel BESS power interface and corresponding control, as well as their evaluation from the point of view of energy efficiency and parameters of the switches. The first novelty, therefore, is a new power electronic converter for BESS that combines a bidirectional unfolder, bidirectional parallel input–series output (PISO) partial power converter and pulsating DC-link. An essential part of this novelty is the method of interfacing, which processes the floating voltage of the BESS battery, forms pulsating semi-sine voltage in the DC-link, and applies it to the AC-grid. The second novelty of this work is a simplified quick methodology of the loss evaluation of the proposed converter based on its actual real-time partiality ratio depending on operation conditions (SoC and grid phase). At last, this work briefly evaluates the positiveness of the proposed BESS interface from the point of view of the voltage and current stress on its switches.

3. Outlines of Proposed Two-Stage BESS Interface Converter

3.1. Structure of Converter

The most explicit configuration of BESS with the proposed two-stage converter is presented in Figure 1a. Apart from the battery and grid, it contains an unfolding grid frontend (UF—inverter, operating at grid’s frequency), an isolated bidirectional PPC capable of generating bipolar voltage (PPCchg,dis), as well as a “virtual” DC-bus (qDC) with semi-sinewave pulsating voltage. The voltage of the battery is approximately twice as low as the amplitude of the grid voltage. Due to this, the PPC is connected with the battery in series on the DC-bus side and in parallel on the battery side. This configuration (named in [32] as PPC Type II) is analyzed in the present work, in contrast to PPC Type I, which is mostly studied in [32]. Further, this series connection of the battery and PPC is attached in parallel to the UF inverter. This may be an ordinary single-phase H-bridge as in [25] or a three-phase circuit like in [28]. In turn, the PPC can be constructed as any isolated bipolar bidirectional circuit, including the circuits with resonant tanks; for example, a bidirectional DAB is presented in [34].
Another configuration of BESS with the PPC and UF inverter is shown in Figure 1b. It includes an isolated bidirectional unipolar PPC, a “pulsating” DC-bus (qDC+), and an additional unfolding inverter (UF+). The unipolar PPC with the additional inverter UF+ operates as the bipolar PPC of the previous configuration. This reduces number of the switches operating in the high-frequency mode and, therefore, the corresponding switching losses.
One more improvement in the initial BESS configuration assumes the splitting of the bidirectional PPC into two unidirectional PPCs. One of them operates only in the battery charging mode, while another one operates during battery discharge. This means the absence of bidirectional switches that reduce the number of semiconductor elements in each current loop and the corresponding conduction losses. This BESS’s configuration is shown in Figure 1c.
Finally, the combining of the two above-mentioned improvements, i.e., the splitting of the bidirectional PPC into two unidirectional ones and the use of unipolar PPC with the extra unfolder instead of the bipolar PPC, provides the achievement of their benefits together. In addition, such configuration enables the fine-tuning of the design of these separated parts of the two-stage BESS interface converter.

3.2. Topologies and Operation of Frontend

The frontend (Figure 2) is composed of a commutation matrix, switching at grid frequency, and an inductance coil that serves as a current-forming element and can be allocated at the DC or AC port of the frontend.
When the coil is allocated at the AC port (Figure 2a), its first contact is fixed at the grid, while the second one is connected through the commutation matrix to the DC-link. The coil then operates with alternating sine current and voltage. Since the voltage in the grid (Figure 3a—blue) must be in line with the grid current (Figure 3b) formed in the coil, the voltage of the coil (Figure 3a—magenta) must have a ±90° shift. Therefore, the voltage at the first end of the coil (at the AC port of the commutation matrix) must be slightly leading (for the battery loading mode, as in Figure 3a—green, or lagging, for battery charging mode) and slightly higher, compared with the grid voltage on the second end of the coil. This, in turn, means that the commutation matrix must be a four-quadrant converter, capable of conducting a current in both directions at both polarities of the voltage. Due to the doubled number of transistors and more complicated control, this case is out of practical interest except for autonomous loads like the motors of larger or smaller vehicles. In a similar way, Figure 3c,d represents the battery charging mode, when the voltage at the AC port of the commutation matrix is lagging, but the current in the coil and grid has a 180° shift (is negative) compared to the grid voltage.
The alternative allocation of the current limiting and forming inductance coil is at the DC port of the commutation matrix. Then, the first end of the coil is attached to the DC-link voltage (vdc(t) in Figure 4a), but at the second, the matrix forms a semi-sinusoidal grid voltage (vdc,uf(t) in Figure 4a). Then, the voltage over the coil is semi-sinusoidal with 90° (Figure 4a—orange) as well as its current (Figure 4b). With such a configuration, the polarity of the voltage at the AC port of the frontend always corresponds (must) to the polarity of the current. Therefore, the commutation matrix may be a common transistor H-bridge (Figure 2b). Similarly, Figure 4c,d represents the battery charging mode, when, within any halfwave, the voltage at the DC port of the grid commutation matrix is lagging, but the current in the coil and DC-link is negative.
In both cases, the DC-link must provide semi-sinewave voltage, composed of sine fragments with a certain small angle from γ to 180 + γ. (for the battery loading mode) and from 180 − γ to −γ (for the battery charging mode).

3.3. PPC Topology and Operation

The second part of the considered battery interface system is a DC-DC converter in the partial power processing scheme with one port connected to the battery in parallel and another in series. As has been mentioned above, it may be based on any isolated converter capable of generating bipolar voltage at the port connected to the battery in series. Two options have been considered within this work. The first one is a step-up/down PPC with bipolar DAB (BDAB) that includes a 2 × 2 matrix of bipolar switches described, for example, that presented in [23] and Figure 5a. Another one is a step-up/down PPC with a standard DAB followed by an extra transistor bridge, serving as a polarity toggler (one more unfolder), as shown in Figure 5b. Due to the twice lower switching losses in the bipolar part, the latter-mentioned configuration is taken as the base for further experimenting and analysis.
As follows from the previous section, the main function of the DC-DC stage is forming a semi-sine voltage in the DC-link of the converter.
For both configurations of the frontend, this voltage in the battery loading mode is composed of the semi-sine half-waves that are slightly leading compared with the rectified grid voltage, i.e., they start from some small phase γ and continue to the angle 180 + γ. Then, the resulting current is passed to the grid, but the battery of the BESS is loaded.
In contrast, in the battery charging mode, these semi-sinusoidal half-waves of voltage must be lagging compared to the rectified grid half-waves, i.e., they start from 180 − γ and continue to −γ. Also, in this case, the operation of the DC-DC converter does not depend on the kind of the frontend.
The accurate forming of the current requires a slightly higher amplitude of these half-waves formed by the DC-DC converter. This amplitude can be found from the right triangle of the voltages, the legs of which are the grid voltage and the coil voltage, but the hypotenuse is the voltage of the DC-link. Then,
V m , d c = V m , s 2 + ( 2 π f L s I m , s ) 2
and   γ = a r c t g ( 2 π f L s I s V m , s )
Here, Vm,s—the amplitude of the grid voltage, Im,s—the requested amplitude of the grid current, and Ls—the inductance of the coil.
The expected operational diagrams of the converter are given in Figure 6 (the BESS discharge or loading mode), Figure 7 (the BESS charge mode) and Figure 8 (the discharge mode to an autonomous load). The “pulsating” DC-link of the interface converter links the unfolding grid frontend VT9x with the series-connected battery and DC port of the PPC. This is why the semi-sinusoidal half-waves (brown curve in these figures), passed to the grid through the unfolding inverter VT9x, are formed as a sum of the battery voltage (black curve) and PPC voltage (red curve). On the other hand, the voltage of the PPC can be found as the difference between the desirable DC-link voltage and battery voltage, i.e., this voltage contains the same semi-sine half-waves with the negative offset, which is equal to the battery voltage. If the PPC operated as a buck converter, the discharged battery (SOC close to 0%) must provide 50% of the voltage span in the DC-link which, in a general case, can be found as follows:
V s p a n , d c = V max , d c V min , d c = V m , s + V m , s sin ( γ )
If the PPC is built as a DAB with an extra unfolder (Figure 5b), then, (1) firstly, the DAB generates the rectified form of this voltage (Figure 6b, Figure 7b and Figure 8b) and then (2) the extra unfolder VT3x applies it to the DC port of the PPC with the required polarity. Meanwhile, the current through the PPC and the battery remains semi-sinusoidal, as shown in Figure 4b.

4. Experimental Validation of Converter

In order to verify the proposed concept, an experimental setup with a rated power of 250 W watts was assembled. Its schematic is given in Figure 9 and the experimental prototype is depicted in Figure 10. The main components of the prototype are listed in Table 1.
The main switching elements (IPP60R040C7) are mounted on an aluminum heatsink with natural convection. The isolation transformer T12 of the partial power DC-DC converter (PPC) utilizes the turn ratio of the primary and secondary windings as 1:1. The primary and secondary windings of the transformer contain 25 turns of the CLI 120 × 0.1 face wire. Two E-shaped ferrite profiles ETD59 made of 3C94 with permeability μ = 2300 were used as the transformer core. Chokes L1 and L2 (the split inductor of the DAB) were wound on powder iron rings with the same CLI 120 × 0.1 face wire and had an inductance of 60 μH. At the input, the output and in the middle of the PPC 30 μF film capacitors are located. MOSFET drivers based on the ACPL-333J microcircuit provide the opening and closing of power transistors using a digital signal from the microcontroller through an optocoupler. The drivers have current protection. The control unit of the converter is based on ATmega2560 MCU, which has been selected due to its 12-channel, 16-bit PWM module. A power supply was applied as a battery for the quick imitation of different SOCs. The load of the converter is an autonomous AC load, represented by a 210 Ω resistor that results in 250 W of the output power generated at 230 VAC. The setup refers to the operation principles given in 0.
The measurements obtained from the setup are presented in Figure 11. When considering these diagrams, it must be taken into account that the voltage sensors utilize 1:50 resistive dividers. In turn, all currents were taken from a 1 Ω resistor providing a current scale of 1 V per 1 A. The results given generally correspond to the expected operational diagrams given in Figure 11. Therefore, the general idea of the operation of the proposed converter was confirmed.

5. Considerations on Partiality and Its Actual Influence

5.1. Evaluation of Partiality

When evaluating the partial power converters, it is important to determine which part of the total power is actually processed by the converter. The lower the part is, the higher the potential energy efficiency. This part sometimes is expressed in % relative to the full power—as a power partiality ratio:
P P R = P P P C P Σ 100 %
Here, PPPC is the active power of the PPC and PΣ is the total power of the system. In contrast to the DC systems, these parameters of the proposed BESS interface converter are integral values. The full system’s power can be calculated at the grid side of the converter. With proper control (i.e., without harmonic distortions and reactive power), the full power is found as a product of the RMS grid voltage Vs and grid current Is. In turn, the active power of the DC-DC converter can be found as a form of average instantaneous power at any port of the converter—either p(t)ppc,bat, p(t)ppc,int or p(t)ppc,dc. The power at the DC port (p(t)ppc,dc) is easy to express because, in the case of the proper control, the current ippc,dc(t) is a rectified sine-wave (Figure 4b and Figure 11f). In turn, vppc,dc(t) is the difference of the DC-link voltage vdc(t) and battery voltage Vbat. Considering the above-mentioned and applying the network voltage vs(t) = Vs,max∙sin(ωt) with the network current is(t) = Is,max∙sin(ωt) the instantaneous power is defined as
p p p c ( t ) = I s , max sin ( ω t ) ( V s , max sin ( ω t ) V b a t )
but its average value (active power through the DC-DC converter) is described as
P p p c = 1 T 0 T I s , max sin ( ω t ) ( V s , max sin ( ω t ) V b a t ) d t
One part of this integral (minuend) is the network power Ps = Is ∙ Vs, but another part (subtrahend) can be found as the integral of a half-sine.
1 π 0 π I s , m sin ( θ ) V b a t d θ = 2 π 2 I s V b a t
Then, the PPR is reversely proportional to the battery voltage:
P P R = 1 2 2 V B A T π V s , r m s 100 %
Let us calculate the PPR for the step-down DC-DC converter and battery providing at least half of the grid voltage amplitude (about 160 VDC) when it is discharged (64 Li-Ion cells with voltage 160–230 VDC). These numbers are given in Table 2. It is seen that (8) expresses a linear function that shows the diminishing influence of the battery voltage on PPR. At Vbat = 255 V, which is possible during battery charging for a fully charged battery, (8) shows no PPC contribution in power transfer. This corresponds to an explicit reduction in PPC power even down to 0 in DC systems at no voltage (or current) difference between the ports of the converter. Moreover, the further increase in the battery voltage and forming of the semi-sine half-waves with the help of the DC-DC converter leads to negative power through the DC-DC converter. Therefore, the above-mentioned value represents the reasonable voltage of the battery.
At the same time, the data presented in Table 2 are only the surficial presentation of the actual power transfer processes in the DC-DC converter; like AC active power, reactive and harmonic power is only a representation of the real-time power consumption in the AC grid. Figure 12 shows the instantaneous power of the converter, calculated according to (5) for 1 kW of the system power and different battery voltages. The declinations of the instantaneous power form its averaged value, used in (5)–(7), which are always significant (even with no actual power in the converter). Therefore, the averaged PPR, expressed by (8), is of limited usability and the actual influence of partiality has to be evaluated over a time span for different parameters of the system.

5.2. Influence of Partiality

The influence of partiality is studied in this section based on a mathematical model for a two-stage BESS interface converter with a pulse-mode or unfolding frontend, suitable battery (190–315 V for known configurations and 160–270 V for the proposed combination of UF and PPC) and flyback pre-regulator. The flyback is the simplest isolating DC/DC converter; it is capable of converting voltage in both directions (step-up or step-down) and is more convenient for comparison due to simpler associated calculations.

5.2.1. Brief Loss Evaluation

Typically, the partial power converters are considered a good alternative to the full power systems due to lower voltage and current stress on the switches, as well as due to the lower processing power and, therefore, losses. As shown in Figure 6, Figure 7 and Figure 8 and Figure 11, the partial power DC-DC converter of the above-proposed BESS interface conducts semi-sine halfwaves of the current with the grid amplitude. As for the commutated voltage of the PPC, it is defined by the battery that, in the following examples, it has a voltage in the range of 160–230 V assuming a step-down DC-DC converter. These values are not much lower than the amplitude of the grid voltage (325 V). Therefore, this typical advantage of the PPC is not so explicit in the case of the considered BESS interface.
In order to evaluate the impact of the proposed configuration on the power losses let us consider a couple of the simplified numerical examples. Firstly, a common BESS interface with a full power pulse-mode frontend and regulator is analyzed.
For the simplified analysis of the switching losses, let us assume the following: (1) the commutated voltage is the voltage of the DC-link that is equal to the amplitude of the grid voltage Vs,m = 325 V; (2) voltage rise and fall times tv are equal and proportional to the commutated voltage (i.e., they are constant); (3) current rise and fall times ti are equal and proportional to the commutated current; (4) voltage/current change times are equal in the middle of the semi-sine current half-wave at maximal current; (5) the switching frequency is chosen so that in the middle of the semi-sine half-wave the length of 1 turn-on or 1 turn-off commutation is 1% of the switching period (Relative Duration of Switching RDS); (6) and, for simplicity, the analysis is provided for the battery discharge mode only.

5.2.2. Losses of Full Power BESS Interface

The most common H-bridge topology operates as a grid-to-battery boost converter with the current path provided by a constantly conducting diode and toggling couple transistor–diode. It is, therefore, possible to conclude that in the continuous current mode, two switches are always conducting a semi-sine current. Then, assuming for simplicity that both of them are p-n devices, their losses can be defined as
Δ P F E 1 , c = 2 1 π 0 π Δ p c t d t = 2 1 π 0 π V 0 I s , m sin ( θ ) d θ = 4 V 0 I s , m π
where V0 is the rated voltage drop over the switch (assumed as a constant for simplicity reasons and equal to 2 V).
The switching losses can be calculated assuming the triangular shape of instantaneous power on the switches during the commutation. Then, the maximal energy loss of turn-on and turn-off commutations is achieved at grid phase 90° when its voltage and current are maximal.
E F E 1 , s w , m = 2 V s , m I s , m ( t i , m + t v , m ) 2 = V s , m I s , m ( t i , m + t v )
Then, the maximal equivalent power losses are as follows:
Δ P F E 1 , s w , m = V s , m I s , m ( t i , m + t v ) T s w = V s , m I s , m R D S = A
Since the current change times are considered proportional to the current that is semi-sinusoidal for the other points, the equivalent switching losses are as follows:
Δ P F E 1 , s w , k = 1 T s w 2 V s w , k I s w , k ( t i , k + t v , k ) 2 =
= V s , m I s , m sin θ k ( t i , m I s , k I s , m + t v V s , k V s , m ) T s w = = V s , m I s , m sin θ k ( t i , m sin θ k + t v ) T s w = V s , m I s , m R D S 2 sin θ k + V s , m I s , m R D S 2 sin 2 θ k = = A 2 sin θ k + A 2 sin 2 θ k
The total switching losses of the frontend are
Δ P F E 1 , s w = 1 0.5 T s k = 1 N Δ P s w , k T s w = 2 T s k = 1 N Δ P s w , k Δ t k
that can then be converted to the integral form
Δ P F E 1 , s w = 1 π 0 π Δ P s w ( θ ) d θ
Applying (12) gives the follows:
Δ P F E 1 , s w = 1 π 0 π ( A 2 sin θ k + A 2 sin 2 θ k ) d θ = = A π + A 4 0 = V s , m I s , m R D S π + 4 4 π
The above equations for 1 kW of the grid power and with given assumptions produce losses ΔPFE1,c = 7.8 W and ΔPFE1,sw = 11.4 W.
As for the (pre)regulator, it is a DC/DC chopper operating with a DC-link voltage on one port and battery voltage on the other. A versatile solution is a buck–boost scheme, which is also comparable with the simplest PPC realization based on the flyback. One port of this chopper handles the DC-link voltage (the amplitude of the grid voltage Vs,m) and average current, corresponding to the power transmitted to/from the grid Ps, i.e., VsIs/Vs,m = Is/1.41 = Is,m/2. This current is delivered with pulses, the value of which can be found in the voltage transfer equation of the buck–boost converter, which, in discharge mode, is
V s , m = V b a t D b a t ( 1 D b a t ) that gives D b a t = V s , m V b a t + V s , m
And the power balance of the converter is as follows:
V s , m I D C = V b a t I b a t
where Dbat is relative to the time of the switch at the battery side. It is also assumed that the fully charged battery produces a voltage slightly lower than the grid voltage amplitude Vs,m (with number of cells Ncell = 75) and the current in the inductor of the chopper has low ripples (operation in continuous current mode).
Then, the value of the current pulses in the switches, as well as the current of the inductor can be expressed as
I L a = I s , m 2 1 1 D b a t = I s , m 2 V b a t + V s , m V b a t
Since, in the discontinuous conduction mode, one of the switches conducts this current, the conduction losses can be calculated as
Δ P R E G 1 , c = V 0 I L a
Applying the commutated current Isw = ILa and commutated voltage Vsw = Vs,m + Vbat in (12),
Δ P R E G 1 , s w = ( V s , m + V b a t ) I L a ( t i T s w + t v T s w )
and it assumed that these parameters affect the corresponding current/voltage changes as follows:
t i T s w = t i , m T s w I L a I s , m = R D S 2 I L a I s , m and t v T s w = t v , m T s w V s , m + V b a t V s , m = R D S 2 V s , m + V b a t V s , m
It becomes possible to calculate the corresponding switching losses of the regulator and the total losses of the reference converter (Table 3). The losses of the regulator are more than twice as high as those of the frontend—mostly due to the almost doubled commutated voltage of the buck–boost regulator. The power losses of other regulators are potentially lower.

5.2.3. Losses in Case of Partial Power Regulator

Let us now consider the losses of the BESS interface with a partial power (pre)regulator. The applied converter topology is flyback—a version of buck–boost equipped with split coil (transformer). Therefore, its static voltage equation remains, but, due to the series connection at the DC-link side, can be rewritten as
V s , m V b a t = V b a t D b a t ( 1 D b a t )
which produces
D b a t = V s , m V b a t V s , m
With this configuration, the commutated voltage (the sum of the input and output voltages of the converter) is fixed at the level VDC = Vs,m, i.e., the lower the battery voltage the larger the part that is added by the DC-DC converter. In turn, the commutated current can still be expressed by (20). However, in this configuration, it does not flow explicitly in an inductor but is formed as the sum of two currents of primary and secondary windings that in explicit form can be measured in the battery.
As for the frontend, since the schematic and operation remain unchanged, its losses also remain on the previously calculated level of ΔPFE2,c = 7.8 W and ΔPFE2,sw = 11.4 W. The power losses corresponding to the partial power regulator are given in Table 4. The positive effect of the operation with reduced voltage and current is clear, even in the case of the considered flyback converter.

5.2.4. Losses in Case of Unfolding Frontend

In the case of the unfolding frontend, the grid current in each half-period constantly flows through the couple of the frontend switches. For this reason, the frontend produces only conduction losses that can still be calculated with (9) as ΔPFE3,c = 7.8 W while ΔPFE3,sw = 0 W.
For such a frontend, the (pre)regulator forms semi-sine voltage half-waves in the “virtual” DC-link (which includes a small capacitor, capable of reducing only high-frequency voltage ripples). This is why most of the basic parameters are functions of the grid phase:
voltage   V s , k = V s , m sin θ k and   current   in   virtual   DC - link   I s w , k = I s , k = I s , m sin θ k
commutated voltage
V s w , k = V b a t + V s , k = V b a t + V s , m sin θ k
static   equation   V s , m sin ( θ k ) = V b a t D b a t , k 1 D b a t , k
and   duty   cycle   D b a t , k = V s , m sin θ k V b a t + V s , m sin θ k
Other parameters, therefore, are also expressed as such functions. The commutated (inductor) current can be found in the DC-link capacitor balance which requires
I L a , k ( 1 D b a t , k ) = I s , k   giving   I s w , k = I L a , k = I s , m sin θ k 1 D b a t , k
The conduction losses, dissipated in two switches (one of which is conducting), can then be expressed as
Δ P R E G 3 , c , k = V 0 I s , k 1 D b a t , k
but   applying   ( 27 ) as Δ P R E G 3 , c , k = V s , k V 0 I s , k V b a t + V 0 I s , k Δ P R E G 3 , c , k = V s , m V 0 I s , m sin 2 θ k V b a t + V 0 I s , m sin θ k
Applying (29) into the equation of averaged (active) power
Δ P R E G 3 , c = 1 0.5 T s k = 1 N Δ P R E G 3 , c , k T s w = 1 π 0 π Δ P R E G 3 , c ( θ ) d θ
after simplifications produces
Δ P R E G 3 , c = 1 2 V 0 V b a t V s , m I s , m + 2 π V 0 V s , m V s , m I s , m = V 0 V b a t P s + 4 π V 0 V s , m P s
The switching losses of the pulse mode regulator can still be calculated by (12) utilizing the commutated current (24) and commutated voltage (25). The analytical solution of the corresponding formula refers to a sine-form signal in power 3 or even 4. For this reason, the switching losses are calculated numerically in general form. Then, (12) can be rewritten as
Δ P R E G 3 , s w , k = 1 T s w 2 V s w , k I s w , k ( t i , k + t v , k ) 2 = 1 T s w 2 ( V b a t + V s , k ) I s , k 1 D b a t , k ( t i , k + t v , k ) 2 with   t i , k T s w = t i , m T s w I L a , k I s , m = R D S 2 I s , k 1 D b a t , k 1 I s , m and   t v , k T s w = t v , m T s w V b a t + V s , k V s , m = R D S 2 V b a t + V s , k V s , m
The results of the conduction loss calculation with (29), their verification with (32) and switching loss calculation with (33) are presented in Table 5. The number of switching cycles in these calculations is 100 which corresponds to a switching frequency at 10 kHz. It is seen that the general level of the losses is comparable with the reference design (pulse mode frontend, pulse mode full power regulator), but some parts of the switching losses “moved” from the frontend to the regulator.

5.2.5. Losses in Case of Unfolding Inverter and Partial Power Regulator

Let us apply the above-scribed loss calculation procedure to the proposed battery interface still assuming that the DC-DC converter is a classical inverting buck–boost chopper.
Like in the previous case the frontend is an unfolding inverter, where the grid current in each half-period constantly flows through two switches and the frontend losses are purely conduction losses calculated with (9) as ΔPFE4 = ΔPFE4,c = 7.8 W.
In addition, the proposed and evaluated configuration utilizes an extra unfolding inverter (Figure 1b,d and Figure 9). Like a grid inverter, this unfolder conducts semi-sine half-waves (although the commutations occur not only at grid phases 0° and 180°). This means that at the applied assumptions, this inverter produces the same conduction losses ΔPUF+ = ΔPUF+,c = 7.8 W (without significant switching losses).
The main considerations applied to the calculation of losses of the regulator, connected to the unfolding inverter, can also be expanded to this configuration with some corrections.
In static Equation (26), the rectified grid voltage Vs,k has to be changed to the rectified difference of Vs,k and battery voltage Vs,k (as in Figure 6b, Figure 7b and Figure 8b). Then, the static equation and expression for the duty cycle calculation is as follows:
V s , k V b a t = V b a t D b a t , k 1 D b a t , k
and   D b a t , k = V s , k V b a t V b a t + V s , k V b a t , which   can   be   D b a t , k = V s , k V b a t V s , k   or   D b a t , k = V b a t V s , k 2 V b a t V s , k
depending on the grid phase.
The static current balance (28) for determining the commutated current remains, but has to be composed for internal capacitor C21 and utilized (35) for the duty cycle.
Finally, the commutated voltage also refers to the rectified difference of Vs,k and battery voltage Vs,k
V s w , k = V b a t + V s , k V b a t that   can   be   V s w , k = V s , k   or   V s w , k = 2 V b a t V s , k
The analytical calculation of the losses requires applying (28), (35), (36) to (29) and (33) and a further complicated integration. These equations, therefore, have been used numerically. The calculations for a 64 cells battery, providing a voltage of 160–270 V are presented in Table 6.
Additional calculations (Table 7 and Table 8) have also been made for batteries with 50 and 75 cells. These calculations in conjunction with the previously obtained data are graphically compared in Figure 13. This diagram proves that the considered BESS interface still has the advantages of partial power converters though they are not so visible as in the case of DC systems. The graphics also show that the highest efficiency can be achieved at a battery voltage of about 255 V (at which there is no circulating power flow through the DC-DC regulator). Therefore, the battery with this voltage in the middle of its operation range can be considered as optimal.

5.2.6. General Considerations on Calculation of Converter Losses

The battery interface converter with a flyback pre-regulator, considered in Section 5.2, is derived from the inverting buck–boost chopper that calculates the sum of its input and output voltages. So, the flyback converter on the primary side calculates the sum of the primary voltage and “reflected” secondary voltage, but on the secondary side, the sum of the secondary voltage and “reflected” primary voltage is obtained. The unity ratio of turns for the primary and secondary windings of the transformer on both ends converter’s switches commutate the sum of voltages. In the case of BESS, one of these voltages is the battery voltage, but the other is the full or partial DC-link voltage. Therefore, the commutated voltage directly depends on the battery.
In turn, the commutated voltage, with the selected loss calculation methodology has a direct influence on the switching losses in the pre-regulator; this voltage is placed in the numerator of the corresponding formula. It has also an indirect influence on these losses because this voltage defines the voltage rise/fall times. For this reason, the switching losses with such a configuration are unreasonably higher compared to the case of other topologies of the pre-regulator that typically calculate the maximal input/output voltage. This voltage overrating can be evaluated as follows: (190–315 + 315)/315 = 1.6–2 for the full-power full-switching interface converter and interface with an unfolder, 315/(190–315) = 1–1.7 for the partial-power full-switching BESS interface and (190–315 + 315/2)/190–315 = 1.5–1.8 for the proposed converter.

6. Conclusions

After the experimental verification and analysis of the mathematical model for the loss calculation, the proposed battery interface converter that combines an unfolding inverter as the grid frontend with a partial power DC-DC converter as (pre)regulator was found operational. A more detailed explanation of this matter includes the following considerations:
(1)
The described series configuration of the utilized battery and output port of the applied DC-DC converter is capable of generating the semi-sine voltage halfwaves that can be transformed by unfolding the inverter into a sine voltage at the grid port of the interface converter. This consideration is valid for multiple configurations of the battery.
(2)
The proposed configuration keeps the advantage of the BESS interface with an unfolding inverter—the absence of bulky and less reliable DC-link electrolytic capacitors, calculated for grid frequency.
(3)
From an efficiency point of view, the proposed configuration behaves as PPC. Its losses are lower than those of the reference full-power converters, but not as low as the losses in the case of a DC-DC PPC. This can be explained by a larger voltage, to be compensated by the PPC (pre)regulator, as well as by the dynamic nature of this compensation—even at no average power transfer through PPC (at 255 V), there is always some instantaneous power through the regulator that leads to losses. From this point of view, preferences should be given to the batteries with voltages around 255 V (assuming grid voltage of 230 VAC) and battery chemistries that provide lower voltage difference vs. SOC. The level of the losses obtained in this work is rather high. However, it is obtained for inverting buck–boost and flyback regulators, which are more convenient for comparison, but calculate the sum of input and output voltages which leads to higher switching losses (with the considered model).
(4)
From the point of view of the current ratings of the switches of the proposed configuration, it is not very advantageous. There are instances in time when the regulator conducts a full grid current. On the other hand, the commutated voltage depends on the battery. At the lowest level, the battery and regulator voltages are equal and are twice as low as the grid voltage amplitude.
The above-mentioned considerations allow us to conclude that the proposed BESS interface keeps the major advantages of the applied loss minimization techniques (PPC and UF). On one hand, compared to the full-power BESS interface with the unfolding inverters, the proposed interface converter provides lower conduction and commutation losses in the voltage pre-regulator (in addition to its smaller size, lower weight and higher reliability due to a twice lower voltage stress on the switches). On the other hand, compared to the switching mode BESS interface with a partial power regulator, the proposed converter provides lower losses in the frontend stage (in addition to the higher reliability of the entire interface converter due to the absence of high-capacity electrolytic capacitors).
Further improvement of this research may include the experimental study of the converter with real grid and multiple configurations of the battery, an experimental evaluation of its efficiency and losses in various operation modes and considering the losses in passive components, as well as the selection of the optimal battery chemistry and its configuration for the proposed battery interface. Particular attention should be paid to the improvement of the proposed and studied BESS interface converter by means of the better choice of the pre-regulator. As has been mentioned, the flyback regulator is not optimal from the point of view of the commutated voltage and switching losses and an alternative has to be chosen. The choice, already mentioned in this paper—DAB with an extra unfolder—due to the doubled number of transistors in current paths, seems imperfect from the point of view of the conduction losses.
Another potential option—a bidirectional and bipolar push-pull converter—looks more promising. Another way of improvement is splitting the bidirectional regulator into battery charging and battery discharging parts (Figure 1c,d). This could potentially reduce the number of conducting switches and the corresponding switching losses. However, its use may make the trade-off between converter cost and losses more significant. Finally, the performance of the converter can be improved by the reasonable combining of traditional Si semiconductor devices with wide bandgap (SiC and GaN) switches. The proposed BESS interface may have quite distinct allocations of the switching and conduction losses and, therefore, the wise use of SiC and GaN switches looks promising.
The last, but not least, consideration is the influence of the proposed BESS interface converter on the operation parameters of the battery: temperature, state of health and overall lifetime. From this point of view, the most significant factor is the shape of battery charge/discharge currents. It can be guessed that independently of the functional structure (Figure 1) and with particular implementation (Figure 2, Figure 3, Figure 4 and Figure 5, Figure 9 or other), this current can be constructed as the sum of the currents of the DC/DC converter at its DC-link and battery ports. The first one (Figure 11d) has a semi-sine shape, but the second one can be derived from the instantaneous power of the DC-DC converter (Figure 12) taking into account the DC voltage that finally gives the current at the battery port, shown in Figure 11a. It is clear that this current is not a DC current, comfortable for batteries, but at the same time, it is not a pulse mode current—the most difficult for them. The current is constructed of several sine pieces. The influence of such a current on the battery is not clear and its determination requires multidisciplinary (electrical, chemical and heat exchange) research, dedicated to this topic. Such research is also planned as future work.

Author Contributions

Conceptualization, I.A.G. and A.B. (Andrei Blinov); methodology, I.A.G. and R.S.; validation, R.S, A.B. (Alexander Bubovich) and I.A.G.; formal analysis, D.P.; investigation, I.A.G.; writing—original draft preparation, I.A.G.; writing—review and editing, A.B. (Alexander Bubovich) and I.A.G.; visualization, I.A.G.; supervision, I.A.G.; project administration, A.B. (Andrei Blinov); funding acquisition, A.B. (Andrei Blinov). All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported in part by the European Economic Area (EEA) and Norway Financial Mechanism 2014–2021 under grant EMP474 “Optimized Residential Energy Storage Systems”. This work was supported in part by the European Regional Development Fund (ERDF) under contract 1.1.1.1/20/A/079 “Research and Development of Two-Phase Thermal Systems Installed in Lighting Equipment for its Functional Improvement” and contract Nr. 1.1.1.1/16/A/147 “Research and Development of Electrical, Information and Material Technologies for Low Speed Rehabilitation Vehicles for Disabled People” of its Latvian measure 1.1.1.1 “Industry-Driven Research”.

Data Availability Statement

Data are contained within the article.

Conflicts of Interest

The authors declare no conflicts of interest.

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  34. Blinov, A.; Korkh, O.; Chub, A.; Vinnikov, D.; Peftitsis, D.; Norrga, S.; Galkin, I. High Gain DC–AC High-Frequency Link Inverter with Improved Quasi-Resonant Modulation. IEEE Trans. Ind. Electron. 2022, 69, 1465–1476. [Google Scholar] [CrossRef]
Figure 1. Structural diagrams of a two-stage converter with unfolding frontend and partial power DC/DC converter: (a) basic configuration, (b) configuration with additional unfolder, (c) configuration with two converters dedicated for battery charging and loading and (d) configuration with additional unfolder and two converters.
Figure 1. Structural diagrams of a two-stage converter with unfolding frontend and partial power DC/DC converter: (a) basic configuration, (b) configuration with additional unfolder, (c) configuration with two converters dedicated for battery charging and loading and (d) configuration with additional unfolder and two converters.
Energies 17 00893 g001aEnergies 17 00893 g001b
Figure 2. Generalized schematics of unfolding inverters (single phase, basic elements): (a) with inductor at AC port and (b) with inductor at DC port.
Figure 2. Generalized schematics of unfolding inverters (single phase, basic elements): (a) with inductor at AC port and (b) with inductor at DC port.
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Figure 3. Operation of inductance in unfolding inverter with inductor at AC port: (a) voltages and (b) current (battery loading mode); (c) voltages and (d) current (battery charging mode).
Figure 3. Operation of inductance in unfolding inverter with inductor at AC port: (a) voltages and (b) current (battery loading mode); (c) voltages and (d) current (battery charging mode).
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Figure 4. Operation of inductance in unfolding inverter with inductor at DC port: (a) voltages and (b) current (battery loading mode); (c) voltages and (d) current (battery charging mode).
Figure 4. Operation of inductance in unfolding inverter with inductor at DC port: (a) voltages and (b) current (battery loading mode); (c) voltages and (d) current (battery charging mode).
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Figure 5. Considered configurations of partial power converters: (a) with bipolar DAB; (b) with bipolar DAB and extra unfolder.
Figure 5. Considered configurations of partial power converters: (a) with bipolar DAB; (b) with bipolar DAB and extra unfolder.
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Figure 6. Voltage diagrams in BESS discharge mode: (a) voltages, typical for DC-link (black—battery voltage, red—PPC voltage at DC-link, brown—DC-link voltage); (b) internal voltage of PPC before extra unfolder.
Figure 6. Voltage diagrams in BESS discharge mode: (a) voltages, typical for DC-link (black—battery voltage, red—PPC voltage at DC-link, brown—DC-link voltage); (b) internal voltage of PPC before extra unfolder.
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Figure 7. Voltage diagrams in BESS charge mode: (a) voltages typical for DC-link (black—battery voltage, red—PPC voltage at DC-link, brown—DC-link voltage); (b) internal voltage of PPC before extra unfolder.
Figure 7. Voltage diagrams in BESS charge mode: (a) voltages typical for DC-link (black—battery voltage, red—PPC voltage at DC-link, brown—DC-link voltage); (b) internal voltage of PPC before extra unfolder.
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Figure 8. Voltage diagrams in BESS discharge mode for an autonomous ohmic load: (a) voltages, typical for DC-link (black—battery voltage, red—PPC voltage at DC-link, brown—DC-link voltage); (b) internal voltage of PPC before extra unfolder.
Figure 8. Voltage diagrams in BESS discharge mode for an autonomous ohmic load: (a) voltages, typical for DC-link (black—battery voltage, red—PPC voltage at DC-link, brown—DC-link voltage); (b) internal voltage of PPC before extra unfolder.
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Figure 9. Schematic of the experimental setup with unfolding grid frontend, bipolar DAB and extra unfolder.
Figure 9. Schematic of the experimental setup with unfolding grid frontend, bipolar DAB and extra unfolder.
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Figure 10. Layout of the initial (a) and final (b) experimental setups.
Figure 10. Layout of the initial (a) and final (b) experimental setups.
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Figure 11. Test results of the proposed BESS interface: (a) PPC current at the battery side ippc,bat(t); (b) PPC current in the transformer ippc,tr(t); (c) PPC internal voltage vppc,int(t) and current ippc,int(t) before the extra unfolder; (d) PPC voltage vppc,dc(t) and current ippc,dc(t) at the side of the DC-link; (e) DC-link voltage vdc(t); and (f) voltage vs(t) and current is(t) in the grid (load).
Figure 11. Test results of the proposed BESS interface: (a) PPC current at the battery side ippc,bat(t); (b) PPC current in the transformer ippc,tr(t); (c) PPC internal voltage vppc,int(t) and current ippc,int(t) before the extra unfolder; (d) PPC voltage vppc,dc(t) and current ippc,dc(t) at the side of the DC-link; (e) DC-link voltage vdc(t); and (f) voltage vs(t) and current is(t) in the grid (load).
Energies 17 00893 g011aEnergies 17 00893 g011b
Figure 12. Instantaneous power at the DC port of a partial power DC-DC converter (for 1 kW of the total power): (a) battery discharge to autonomous load (as considered in Chapter IV); (b) battery discharge to the grid.
Figure 12. Instantaneous power at the DC port of a partial power DC-DC converter (for 1 kW of the total power): (a) battery discharge to autonomous load (as considered in Chapter IV); (b) battery discharge to the grid.
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Figure 13. Comparison of power losses in the considered systems.
Figure 13. Comparison of power losses in the considered systems.
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Table 1. Components of the experimental setup.
Table 1. Components of the experimental setup.
SymbolComponentManufacturer, City and CountryRemark
VTxxIPP60R040C7
Infineon Technologies AG, Neubiberg,
Germany
nMOSFET, Si, 650 V, 40 mΩ
T12Custom 1:1, windings—25 turns of CLI 120 × 0.1 face wire, 2 ETD59-3C94 with μ = 2300
L11, L12Custom 60 μH, core—powder iron rings, 17 turns of CLI 120 × 0.1 face wire
C11, C21, C31MKP1848SVishay Intertechnology Inc., Malvern, USAMetallized Polypropylene Film Capacitor, 30 μF, 1000 V
-ACPL-333JBroadcom Inc., San Jose,
USA
2.5 Amp Output Current IGBT Gate Driver
with Integrated Desaturation Detection, Miller Clamp and Fault Status Feedback
-ATmega2560Microchip Technology Inc., Chandler, USAMCU with 12-channel of 16-bit PWM module.
R914 ×
SLN175J230E, 230 Ω, 1 A
Ohmite, Warrenville, USAHigh Power Resistor
Table 2. Partiality evaluation.
Table 2. Partiality evaluation.
SOC
[%]
Vbat
[V]
PPR
[%]
SOC
[%]
Vbat
[V]
PPR
[%]
SOC
[%]
Vbat
[V]
PPR
[%]
SOC
[%]
Vbat
[V]
PPR
[%]
SOC
[%]
Vbat
[V]
PPR
[%]
016037301812960202219022313>1002444
10167354018826702091810023010>1002522
201743250195248021615>1002377>1002560
Table 3. Power losses in case of full power switch mode regulator and inverter.
Table 3. Power losses in case of full power switch mode regulator and inverter.
SOC [%]013253850637588100
Vbat, [V]188203219235251267283299315
Vsw = Vs,m + Vbat, [V]513529545561577592608624640
Isw = ILa, [A]8.417.997.637.327.056.826.616.426.25
ti/Tsw [%]0.680.650.620.600.570.550.540.520.51
tv/Tsw [%]0.290.310.340.360.390.410.440.460.48
ΔPREG1,c [W]16.816.015.314.614.113.613.212.812.5
ΔPREG1,sw [W]41.940.739.839.339.039.039.139.339.7
ΔP1 [W]77.975.874.373.172.371.871.571.471.4
ΔP1 [%]7.87.67.47.37.27.27.17.17.1
Table 4. Power losses in case of switch mode inverter and partial power regulator.
Table 4. Power losses in case of switch mode inverter and partial power regulator.
SOC [%]013253850637588100
Vbat, [V]188203219235251267283299315
Vsw = Vs,m, [V]325325325325325325325325325
Isw = Ibat, [A]5.334.924.564.253.983.743.533.343.17
ti/Tsw [%]0.430.400.370.350.320.300.290.270.26
tv/Tsw [%]0.290.310.340.360.390.410.440.460.48
ΔPREG2,c [W]10.79.89.18.58.07.57.16.76.3
ΔPREG2,sw [W]12.511.410.59.89.28.78.38.07.7
ΔP2 [W]42.3940.4238.8137.4736.3535.3934.5633.8433.21
ΔP2 [%]4.24.03.93.73.63.53.53.43.3
Table 5. Power losses in case of unfolding inverter and full power regulator.
Table 5. Power losses in case of unfolding inverter and full power regulator.
SOC [%]013253850637588100
Vbat, [V]188203219235251267283299315
Vsw, max, [V]513529545561576592608624640
Vsw, min, [V]193209224240256272288304320
Dmax [%]636260585655535251
Dmin [%]322222222
ΔPREG3,c, discrete [W]18.517.716.916.315.815.314.914.514.2
ΔPREG3,c, exact [W]18.517.716.916.315.815.314.914.514.2
ΔPREG3,sw [W]75.373.171.570.569.869.569.469.569.9
ΔP3 [W]101.698.696.394.693.492.692.191.991.9
ΔP3 [%]10.29.99.69.59.39.39.29.29.2
Table 6. Power losses in case of unfolding inverter and partial power regulator (battery is composed of 64 cells).
Table 6. Power losses in case of unfolding inverter and partial power regulator (battery is composed of 64 cells).
SOC [%]013253850637588100
Vbat, [V]160174187201214228242255269
Vsw, max, [V]325342369396424451478505532
Vsw, min, [V]161177187203218230243257272
Dmax [%]514949494949494950
Dmin [%]120111011
ΔPREG4,c [W]13.212.311.611.010.510.29.99.69.5
ΔPREG4,sw [W]22.319.818.016.615.615.014.714.715.1
ΔP4 [W]51.147.845.243.341.840.840.240.040.2
ΔP4 [%]5.14.84.54.34.24.14.04.04.0
Table 7. Power losses in case of unfolding inverter and partial power regulator (battery made of 50 cells).
Table 7. Power losses in case of unfolding inverter and partial power regulator (battery made of 50 cells).
SOC [%]013253850637588100
Vbat, [V]125136146157168178189199210
ΔP4 [%]6.56.05.55.24.94.74.54.34.2
Table 8. Power losses in case of unfolding inverter and partial power regulator (battery made of 75 cells).
Table 8. Power losses in case of unfolding inverter and partial power regulator (battery made of 75 cells).
SOC [%]013253850637588100
Vbat, [V]188203219235251267283299315
ΔP4 [%]4.54.34.14.04.04.04.14.24.4
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Galkin, I.A.; Saltanovs, R.; Bubovich, A.; Blinov, A.; Peftitsis, D. Considerations on Combining Unfolding Inverters with Partial Power Regulators in Battery–Grid Interface Converters. Energies 2024, 17, 893. https://doi.org/10.3390/en17040893

AMA Style

Galkin IA, Saltanovs R, Bubovich A, Blinov A, Peftitsis D. Considerations on Combining Unfolding Inverters with Partial Power Regulators in Battery–Grid Interface Converters. Energies. 2024; 17(4):893. https://doi.org/10.3390/en17040893

Chicago/Turabian Style

Galkin, Ilya A., Rodions Saltanovs, Alexander Bubovich, Andrei Blinov, and Dimosthenis Peftitsis. 2024. "Considerations on Combining Unfolding Inverters with Partial Power Regulators in Battery–Grid Interface Converters" Energies 17, no. 4: 893. https://doi.org/10.3390/en17040893

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