# On the Conflict between LVRT and Line Protection in LV Distribution Systems with PVs: A Current-Limitation-Based Solution

^{1}

^{2}

^{3}

^{*}

## Abstract

**:**

## 1. Introduction

- Compliance of PV-units with LVRT requirements during faults.
- Prevention of the unintentional islanding that is caused during faults, because of the LVRT requirements.
- A mass protection reconsideration is avoided, since the existing protection means (fuse) is maintained.

## 2. Problem Description and Basic Operation Principles of the Proposed Concept

#### 2.1. Problem Description

_{F}flowing through it. Therefore, fuse melting might occur before the PV-unit disconnects. The problem here is that the PV-unit may continue its LVRT operation, even after the feeder is disconnected (due to the fuse melting), bearing also in mind the effect of ride-through operation on anti-islanding detection (see Section 1). In other words, the quick fuse melting may lead to an unintentional islanding situation, where the isolated feeder keeps being energized by the PV-unit. Of course, such prolonged unintentional islanding situations are not desirable by DSOs.

#### 2.2. Basic Operation Principles of the Proposed Concept

_{F}is the melting time of the fuse, resulting from its time-overcurrent characteristic and the short-circuit current I

_{F}, whereas t

_{thr}is the required time duration of the PV-connection that is imposed by the adopted LVRT characteristic and the voltage drop at PCC. If t

_{F}< t

_{thr}holds, then the fuse melts before the disconnection of the PV, leading to an unintentional islanding condition. By installing the proposed CLD at the fuse location, we can limit I

_{F}to a lower value (i.e., I

_{thr}), increasing the melting time of the fuse to a value larger than or at least equal to t

_{thr}. Subsequently, the fuse melting is suitably delayed, allowing for the PV to disconnect first, after meeting the LVRT requirements. Note that the minimum-melting (MM) time-overcurrent characteristic of the fuse (also depicted in Figure 3) has to be taken into account instead of its total-clearing (TC) characteristic, as a safe-side consideration to ensure that the PV-unit is disconnected (after complying with the LVRT requirements) prior to the fuse melting.

_{thr}. I

_{thr}is adaptively determined in this study, based on the voltage measured at the CLD location, which coincides with the fuse location. The adopted approach intends to directly link I

_{thr}to the LVRT characteristic of the PV-unit. The process to acquire I

_{thr}value is shown in the flowchart of Figure 4 and is briefly described as follows: Initially, t

_{thr}is calculated based on the measured voltage and the LVRT characteristic. Next, using the calculated t

_{thr}value, we can determine the maximum current for which the fuse melts subsequent to the time indicated by the LVRT requirements. This current value is set as the current threshold I

_{thr}of the CLD and is determined based on t

_{thr}and the MM time-overcurrent characteristic of the fuse. In order to achieve the adaptive approach mentioned above, the LVRT characteristic as well as the MM time-overcurrent characteristic of the fuse should be beforehand uploaded into the CLD microprocessor, e.g., in the form of a look-up-table. This task can be easily performed in any microprocessor. It is also noted that V

_{ref}in Figure 4 is the reference voltage for compliance with LVRT requirements, as indicated by the grid code adopted in each case. For example, according to [37], V

_{ref}corresponds to the lowest line-line voltage.

_{thr}will be larger than (or at least close to) the actual t

_{thr}resulting from the actual PCC voltage. As such, the PV-unit will be allowed to disconnect first, as desired. Even in the worst-case scenario, where the PCC voltage is greater than the voltage at CLD/fuse location, the voltage difference is expected to be rather small and can be easily compensated by considering an additional safety margin in the voltage measured by the CLD. The above assumption is further supported through extensive simulation results, presented in Section 4.4.

## 3. Description of the Proposed CLD from a Power Electronics Perspective

#### 3.1. Topology Selection

_{h}

_{_1,2}) and low (S

_{l}

_{_1,2}) -side power switches (either Insulated Gate Bipolar Transistors, IGBTs, or Metal Oxide Semiconductor Field Effect Transistors, MOSFETs, can be used), the transformer shorting switch (S

_{b}), the low-pass filter (L

_{f,}C

_{f}) and the isolation transformer. Based on the topology of Figure 5, we can extend the proposed solution in a three-phase system. The three-phase version of the proposed solution is presented in Figure 6 and it consists of three single-phase topologies, connected together through the neutral wire. The output neutral-connection of the CLD can be connected with the neutral point of the distribution (substation) transformer. In the next subsection, the operation of the CLD is described, also supported by indicative simulation results.

#### 3.2. CLD Operation Description

_{op}(the same principle applies to the three-phase system of Figure 6). Considering the above, the CLD is principally a buck converter, whose output (v

_{op}) is connected in series with the grid voltage through a transformer. v

_{op}’ is the output voltage of CLD (after the transformer) which opposes to the grid voltage, whereas v

_{g}is the grid voltage at the fuse location; the CLD output voltage opposed grid voltage as it is connected in series with it (see Figure 5); in this work, the series voltage-source connection is used, due to its simple design and control scheme. Assuming that the switching frequency of CLD is much higher than the line frequency and the filter does not impose any magnitude or phase differentiation, the mean value of buck and CLD output voltage (v

_{op}and v

_{op}’, respectively), over a switching period, is given by Equations (1) and (2). Their magnitudes, V

_{op}and V

_{op}’ are given by Equations (3) and (4).

_{h_on}is the on-state time of high switches, and T

_{sw}is the switching period of the Pulse Width Modulation (PWM) modulator. Finally, N is the turn ratio of the transformer.

_{b}shorts the secondary side of the CLD transformer, which in turn results in a zero v

_{op}’ voltage and the effective deactivation of CLD; it is recommended to keep S

_{b}closed during the normal operation. As the switches operate in a high frequency (~10–20 kHz), a low pass L-C filter is also used to filter out the higher order harmonics; it should be noted that the filter stage can be omitted for PWM switching frequencies higher than 20 kHz.

_{F}) is given by:

_{Thev}and z are the equivalent Thevenin voltage and impedance of the LV network, respectively, given by:

_{thr}(I

_{thr}is calculated based on Figure 4) and fed into a proportional-integral (PI) controller. The output of the PI controller output (i.e., V

_{ref}) is the desired voltage magnitude of the CLD output. A PWM modulator is finally used to generate the driving pulses of CLD switches.

_{op}, the fuse-current, and the CLD high-side switch currents, are presented in Figure 9a,b. These figures demonstrate the CLD operation, both during steady state and transient conditions; CLD parameters are: N = 1, T

_{sw}= 100 us, C

_{f}= 200 nF, L

_{f}= 400 uH. The LV network impedance during the normal operation is z

_{normal}= 2.45 Ohm.

_{g}(below 0.3 pu). According to the LVRT requirements of Figure 2 a grid-tied inverter in this fault should remain connected for 150 ms (t

_{thr}). Referring to Figure 4, I

_{thr}is defined based on t

_{thr}and fuse characteristic. Assuming the fuse (ΜΜ) characteristic of Figure 10 (which will be also considered in the simulation study of the next section), we calculate the I

_{thr}value to be around 2200 A. This is the current value that the CLD should maintain in this example. The sequence of events for this demonstration example is the following: During the time interval 0 ≤ t < 0.2 s, the system operates under the normal voltage level, assuming an equivalent Thevenin resistance of z

_{normal}= 2.45 Ohm. At t = 0.2 s, a fault occurs in the low-voltage network. The fault results in an equivalent resistance z

_{fault}of 0.01 Ohm. Subsequently, the voltage level drops and the CLD is activated after having set the I

_{thr}value accordingly. At ~t = 0.21 s, the fuse RMS current exceeds I

_{thr}and the high-side switch starts operating.

_{LN}or zero, depending on the high-side switch state. Indicative results of the high-side switch and fuse current are shown in Figure 9b. According to Figure 9b, the fuse current is effectively limited by CLD to 2200 RMS (or 3160 peak A), supporting the effectiveness of proposed CLD to limit the fault current to the desired value.

## 4. Performance Evaluation from a Power System Perspective: Results and Discussion

#### 4.1. Test-System Description

#### 4.2. Simulation Results

_{thr}of CLD (only in the study cases where CLD is used, i.e., study cases 2, 4, 6, and 8); RMS voltage at the PCC of the PV-unit. Moreover, the state of the fuse and the PV circuit breaker (CB) (“0” when the protection means conducts current and “1” when it does not conduct current) are also presented. Note that the voltage measured at the fuse location and at the PCC of the PV-unit is the lowest line-line voltage, which is the reference voltage (V

_{ref}) for compliance with LVRT requirements according to [37]. Moreover, during SLG faults, the current illustrated corresponds to the faulted phase (phase a). All faults occur at t = 0.2 s.

#### 4.3. Discussion

- In all the examined study cases where CLD is not applied, the fuse melts before the PV-unit disconnects, so, the desired fuse-PV coordination is violated. As can be seen in Figure 12b, Figure 14b, Figure 16b and Figure 18b, the short-circuit current flowing through the fuse becomes high after fault inception, leading to an “early” fuse melting. This results in a prolonged connection of the PV-unit to the network, after fuse melting (unintentional islanding). The duration of this undesirable protracted PV-connection is greater during SLG faults (which are the most frequently occurring in actual distribution networks). This is because, in these cases, V
_{ref}at the PCC of the PV-unit remains relatively high after fuse melting (as only the faulted phase is disconnected), unlike 3PH-fault cases, where the voltage drops considerably. - When the CLD is applied, the above problem is solved for all the examined cases, even for the most severe faults (i.e., faults occurring directly in front of the fuse). Specifically, after fault occurrence, the CLD acts rapidly, limiting the fault current that flows through the fuse to the calculated current threshold I
_{thr}; the drastic limitation of the fuse current by CLD is effectively shown in Figure 13b, Figure 15b, Figure 17b and Figure 19b. Concluding, the fuse melts after the PV-unit disconnects, letting this unit to fully comply with the LVRT requirements. At the same time, since the PV-unit disconnects first, unintentional islanding is certainly avoided.

_{ref}), as mentioned in Section 2.2. It is reminded that this safety margin is related to the much less frequent cases where a negative voltage difference ΔV between the fuse voltage and the PCC voltage (meaning that fuse voltage < PCC voltage) appears. The voltage safety margin of 0.01 p.u. is selected after having simulated faults of all types in front of the fuse. Note that this is the fault position that reasonably results in the greatest negative voltage difference ΔV (if any) between the fuse voltage and the PCC voltage.

#### 4.4. Additional Simulation Results

#### 4.4.1. Voltage Difference between CLD/Fuse Location and PCC Location

- ΔV drastically varies from negative to positive as fault position moves away from the CLD/fuse location (0% of the distribution line).
- ΔV drastically varies from negative to positive as PL is decreased.
- Even the greatest absolute negative ΔV value appearing during the simulations is quite low (~ 0.045 p.u.)

#### 4.4.2. Impact of the Delayed Fuse Melting on the Equipment Through-Fault Damage

## 5. Conclusions

## Author Contributions

## Funding

## Conflicts of Interest

## References

- Yang, Y.; Enjeti, P.; Blaabjerg, F.; Wang, H. Wide-scale adoption of photovoltaic energy: Grid code modifications are explored in the distribution grid. IEEE Ind. Appl. Mag.
**2015**, 21, 21–31. [Google Scholar] [CrossRef] - Photovoltaics, D.G.; Storage, E. IEEE Standard for Interconnection and Interoperability of Distributed Energy Resources with Associated Electric Power Systems Interfaces; IEEE Standard: Piscataway, NJ, USA, 2018; pp. 1547–2018. [Google Scholar]
- Sadeghkhani, I.; Golshan, M.E.H.; Mehrizi-Sani, A.; Guerrero, J.M. Low-voltage ride-through of a droop-based three-phase four-wire grid-connected microgrid. IET Gen. Transm. Distrib.
**2018**, 12, 1906–1914. [Google Scholar] [CrossRef] - Kyritsis, A.; Voglitsis, D.; Papanikolaou, N.P.; Tselepis, S.; Christodoulou, C.; Gonos, I.; Kalogirou, S.A. Evolution of PV systems in Greece and review of applicable solutions for higher penetration levels. Renew. Energy
**2017**, 109, 487–499. [Google Scholar] [CrossRef] - Perpinias, I.; Papanikolaou, N.P.; Tatakis, E.C. Optimum design of low-voltage distributed photovoltaic systems oriented to enhanced fault ride through capability. IET Gen. Transm. Distrib.
**2015**, 9, 903–910. [Google Scholar] [CrossRef] - Yang, Y.; Blaabjerg, F.; Wang, H. Low-voltage ride-through of single-phase transformerless photovoltaic inverters. IEEE Trans. Ind. Appl.
**2014**, 50, 1942–1952. [Google Scholar] [CrossRef] - Yang, Y.; Wang, H.; Blaabjerg, F. Reactive power injection strategies for single-phase photovoltaic systems considering grid requirements. IEEE Trans. Ind. Appl.
**2014**, 50, 4065–4076. [Google Scholar] [CrossRef] - Mango, F.; Liserre, M.; Aquila, A.; Pigazo, A. Overview of anti-islanding algorithms for PV systems. Part I: Passive methods. In Proceedings of the 12th International Power Electronics and Motion Control Conference, (PEMC), Portoroz, Slovenia, 30 August–1 September 2006. [Google Scholar]
- Voglitsis, D.; Valsamas, F.; Rigogiannis, N.; Papanikolaou, N. On the Injection of Sub/Inter-Harmonic Current Components for Active Anti-Islanding Purposes. Energies
**2018**, 11, 2183. [Google Scholar] [CrossRef] - Reigosa, D.; Briz, F.; Blanco, C.; Guerrero, J.M. Islanding detection in three-phase and single-phase systems using pulsating high-frequency signal injection. IEEE Trans. Power Electron.
**2015**, 30, 5659–5666. [Google Scholar] [CrossRef] - Voglitsis, D.; Papanikolaou, N.P.; Kyritsis, A. Active cross-correlation anti-islanding scheme for PV module-integrated converters in the prospect of high penetration levels and weak grid conditions. IEEE Trans. Power Electron.
**2019**, 34, 2258–2274. [Google Scholar] [CrossRef] - Voglitsis, D.; Valsamas, F.; Rigogiannis, N.; Papanikolaou, N.P. On harmonic injection anti-islanding techniques under the operation of multiple DER-inverters. IEEE Trans. Energy Convers.
**2019**, 34, 455–467. [Google Scholar] [CrossRef] - Khodaparastan, M.; Vahedi, H.; Khazaeli, F.; Oraee, H. A novel hybrid islanding detection method for inverter-based DGs using SFS and ROCOF. IEEE Trans. Power Del.
**2017**, 32, 2162–2170. [Google Scholar] [CrossRef] - Dietmannsberger, M.; Grumm, F.; Schulz, D. Simultaneous implementation of LVRT capability and anti-islanding detection in three-phase inverters connected to low-voltage grids. IEEE Trans. Energy Convers.
**2017**, 32, 505–515. [Google Scholar] [CrossRef] - Boemer, J.C.; Walling, R. DER ride-through performance categories and trip settings. In Proceedings of the PJM Ride-Through Workshop, Philadelphia, PA, USA, 1–2 October 2018. [Google Scholar]
- Walling, R.; Ellis, A.; Gonzalez, S. Implementation of Voltage and Frequency Ride-Through Requirements in Distributed Energy Resources Interconnection Standards; Sandia National Laboratories: Albuquerque, NM, USA, 2014; pp. 2014–3122.
- IEEE Standards Board. IEEE Standard for Interconnecting Distributed Resources with Electric Power Systems; IEEE Standard: Piscataway, NJ, USA, 2003; pp. 1547–2003. [Google Scholar]
- Bollen, M.H.; Hassan, F. Integration of Distributed Generation in the Power System; Wiley-IEEE Press: New York, NY, USA, 2011. [Google Scholar]
- Dehghanpour, E.; Karegar, H.K.; Kheirollahi, R.; Soleymani, T. Optimal coordination of directional overcurrent relays in microgrids by using cuckoo-linear optimization algorithm and fault current limiter. IEEE Trans. Smart Grid
**2018**, 9, 1365–1375. [Google Scholar] [CrossRef] - Papaspiliotopoulos, V.A.; Korres, G.N.; Kleftakis, V.A.; Hatziargyriou, N.D. Hardware-in-the-loop design and optimal setting of adaptive protection schemes for distribution systems with distributed generation. IEEE Trans. Power Del.
**2017**, 32, 393–400. [Google Scholar] [CrossRef] - Nikolaidis, V.C.; Papanikolaou, E.; Safigianni, A.S. A communication-assisted overcurrent protection scheme for radial distribution systems with distributed generation. IEEE Trans. Smart Grid
**2016**, 7, 114–123. [Google Scholar] [CrossRef] - Nikolaidis, V.C.; Tsimtsios, A.M.; Safigianni, A.S. Investigating particularities of infeed and fault resistance effect on distance relays protecting radial distribution feeders with DG. IEEE Access
**2018**, 6, 11301–11312. [Google Scholar] [CrossRef] - Liu, Z.; Høidalen, H.K.; Saha, M.M. An intelligent coordinated protection and control strategy for distribution network with wind generation integration. CSEE J. Power Energy Syst.
**2016**, 2, 23–30. [Google Scholar] [CrossRef] - Liu, X.; Shahidehpour, M.; Li, Z.; Liu, X.; Cao, Y.; Tian, W. Protection scheme for loop-based microgrids. IEEE Trans. Smart Grid
**2017**, 8, 1340–1349. [Google Scholar] [CrossRef] - Aghdam, T.S.; Karegar, H.K.; Zeineldin, H.H. Variable tripping time differential protection for microgrids considering DG stability. IEEE Trans. Smart Grid
**2019**, 10, 2407–2415. [Google Scholar] [CrossRef] - Han, B.; Li, H.; Wang, G.; Zeng, D.; Liang, Y. A virtual multi-terminal current differential protection scheme for distribution networks with inverter-interfaced distributed generators. IEEE Trans. Smart Grid
**2018**, 9, 5418–5431. [Google Scholar] [CrossRef] - Kar, S.; Samantaray, S.R.; Zadeh, M.D. Data-mining model based intelligent differential microgrid protection scheme. IEEE Syst. J.
**2017**, 11, 1161–1169. [Google Scholar] [CrossRef] - Mishra, M.; Rout, P.K. Detection and classification of micro-grid faults based on HHT and machine learning techniques. IET Gen. Transm. Distrib.
**2018**, 12, 388–397. [Google Scholar] [CrossRef] - Bukhari, S.B.A.; Haider, R.; Zaman, M.S.U.; Oh, Y.; Cho, G.; Kim, C. An interval type-2 fuzzy logic based strategy for microgrid protection. Int. J. Electr. Power Energy Syst.
**2018**, 98, 209–218. [Google Scholar] [CrossRef] - Glinka, F.; Bertram, R.; Wippenbeck, T.; Erlinghagen, P.; Schnettler, A. Protection of today’s and future low voltage grids with high DG penetration: Laboratory and simulative analysis of blinding of protection with inverters. In Proceedings of the 13th International Conference on Development in Power System Protection (DPSP), Edinburgh, UK, 7–10 March 2016. [Google Scholar]
- Yu, J.J.Q.; Hou, Y.; Lam, A.Y.S.; Li, V.O.K. Intelligent fault detection scheme for microgrids with wavelet-based deep neural networks. IEEE Trans. Smart Grid
**2019**, 10, 1694–1703. [Google Scholar] [CrossRef] - Mishra, D.P.; Samantaray, S.R.; Joos, G. A combined wavelet and data-mining based intelligent protection scheme for microgrid. IEEE Trans. Smart Grid
**2016**, 7, 2295–2304. [Google Scholar] [CrossRef] - Liu, Y.; Meliopoulos, A.P.; Sun, L.; Choi, S. Protection and control of microgrids using dynamic state estimation. Prot. Control Mod. Power Syst.
**2018**, 3, 31. [Google Scholar] [CrossRef][Green Version] - Nikolaidis, V.C.; Papanikolaou, N.P.; Safigianni, A.S.; Paspatis, A.G.; Konstantopoulos, G.C. Influence of fault-ride-through requirements for distributed generators on the protection coordination of an actual distribution system with reclosers. In Proceedings of the IEEE PowerTech, Manchester, UK, 18–22 June 2017. [Google Scholar]
- Wheeler, K.; Elsamahy, M.; Faried, S. Use of superconducting fault current limiters for mitigation of distributed generation influences in radial distribution network fuse-recloser protection systems. IET Gen. Transm. Distrib.
**2017**, 11, 1605–1612. [Google Scholar] [CrossRef] - Elmitwally, A.; Gouda, E.; Eladawy, S. Restoring recloser-fuse coordination by optimal fault current limiters planning in DG-integrated distribution systems. Int. J. Electr. Power Energy Syst.
**2016**, 77, 9–18. [Google Scholar] [CrossRef] - BDEW. Technical Guideline: Generating Plants Connected to the Medium-Voltage Network. Guideline for Generating Plant’s Connection to and Parallel Operation with the Medium-Voltage Network; BDEW: Berlin, Germany, 2008. [Google Scholar]
- Rosas-Caro, J.C.; Mancilla-David, F.; Gonzalez-Lopez, J.M.; Ramirez-Arredondo, J.M.; Gonzalez-Rodriguez, A.; Salas-Cabrera, N. A review of ac choppers. In Proceedings of the 20th International Conference on Electronics, Communication and Computers, (CONIELECOMP), Cholula, Mexico, 27 February–1 March 2010. [Google Scholar]
- Kangarlu, M.F.; Babaei, E. Operation of ac chopper as downstream fault current limiter and overvoltage compensator. In Proceedings of the 2nd Power Electronics, Drive Systems and Technology Conference, Tehran, Iran, 16–17 February 2011. [Google Scholar]

**Figure 9.**Time variant waveforms: (

**a**) CLD output voltage before and after filter stage; (

**b**) fuse current and high-side switch current.

**Figure 12.**Simulation results for study case 1 (3PH fault in front of fuse without CLD); (

**a**) voltage at fuse location; (

**b**) current flowing through fuse; (

**c**) voltage at PV PCC; (

**d**) state of protection means.

**Figure 13.**Simulation results for study case 2 (3PH fault in front of fuse with CLD); (

**a**) voltage at fuse location; (

**b**) current flowing through fuse, (

**c**) current threshold of CLD, (

**d**) voltage at PV PCC; (

**e**) state of protection means.

**Figure 14.**Simulation results for study case 3 (SLG fault in front of fuse without CLD); (

**a**) voltage at fuse location; (

**b**) current flowing through fuse; (

**c**) voltage at PV PCC; (

**d**) state of protection means.

**Figure 15.**Simulation results for study case 4 (SLG fault in front of fuse with CLD); (

**a**) voltage at fuse location; (

**b**) current flowing through fuse, (

**c**) current threshold of CLD, (

**d**) voltage at PV PCC; (

**e**) state of protection means.

**Figure 16.**Simulation results for study case 5 (3PH fault at PV PCC without CLD); (

**a**) voltage at fuse location; (

**b**) current flowing through fuse; (

**c**) voltage at PV PCC; (

**d**) state of protection means.

**Figure 17.**Simulation results for study case 6 (3PH fault at PV PCC with CLD); (

**a**) voltage at fuse location; (

**b**) current flowing through fuse; (

**c**) current threshold of CLD; (

**d**) voltage at PV PCC; (

**e**) state of protection means.

**Figure 18.**Simulation results for study case 7 (SLG fault at PV PCC without CLD); (

**a**) voltage at fuse location; (

**b**) current flowing through fuse; (

**c**) voltage at PV PCC; (

**d**) state of protection means.

**Figure 19.**Simulation results for study case 8 (SLG fault at PV PCC with CLD); (

**a**) voltage at fuse location; (

**b**) current flowing through fuse; (

**c**) current threshold of CLD; (

**d**) voltage at PV PCC; (

**e**) state of protection means.

**Figure 20.**ΔV during SLG faults as a function of PL; (

**a**) along the examined distribution line; (

**b**) in front of the CLD/fuse.

Element | Data |
---|---|

External grid | Short-circuit power: 200 MVA |

Distribution transformer | Rated voltage: 20 kV/0.4 kV Rated power: 160 kVA Connection: Dyn11 Short-circuit voltage: 4% |

Distribution line | Length of each line segment S: 50 m Total line length: 200 m Positive-sequence resistance: 0.2067 Ohm/km Positive-sequence reactance: 0.0804 Ohm/km Zero-sequence resistance: 0.8267 Ohm/km Zero-sequence reactance: 0.3217 Ohm/km |

Load | Load L: 35 kVA (33.25 kW) Total system load: 140 kVA (133 kW) |

Fuse | Fuse rating/type: 250 A gL |

PV-unit | Nominal power: 50 kW Penetration Level (PL): 37.6% |

Study Case | Fault Location | Fault Type | CLD |
---|---|---|---|

1 | In front of fuse | 3PH | No |

2 | In front of fuse | 3PH | Yes |

3 | In front of fuse | SLG | No |

4 | In front of fuse | SLG | Yes |

5 | At PV PCC | 3PH | No |

6 | At PV PCC | 3PH | Yes |

7 | At PV PCC | SLG | No |

8 | At PV PCC | SLG | Yes |

Study Case | Steady-State Fault Current through Fuse (A) | Maximum Allowable Clearing Time (s) (Transformer Damage Curve) | Maximum Allowable Clearing Time (s) (Line Damage Curve) | Actual Fuse MM Time (s) | Actual Fuse TC Time (s) |
---|---|---|---|---|---|

2 | 2310 | 12.58 | N/I | 0.156 | 1.256 |

4 | 1377 | 34.36 | N/I | 1.143 | 10.601 |

6 | 1496 | 28.48 | N/I | 0.813 | 7.388 |

8 | 1333 | 37.20 | N/I | 1.313 | 12.296 |

© 2019 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).

## Share and Cite

**MDPI and ACS Style**

Tsimtsios, A.; Voglitsis, D.; Perpinias, I.; Korkas, C.; Papanikolaou, N. On the Conflict between LVRT and Line Protection in LV Distribution Systems with PVs: A Current-Limitation-Based Solution. *Energies* **2019**, *12*, 2909.
https://doi.org/10.3390/en12152909

**AMA Style**

Tsimtsios A, Voglitsis D, Perpinias I, Korkas C, Papanikolaou N. On the Conflict between LVRT and Line Protection in LV Distribution Systems with PVs: A Current-Limitation-Based Solution. *Energies*. 2019; 12(15):2909.
https://doi.org/10.3390/en12152909

**Chicago/Turabian Style**

Tsimtsios, Aristotelis, Dionisis Voglitsis, Ioannis Perpinias, Christos Korkas, and Nick Papanikolaou. 2019. "On the Conflict between LVRT and Line Protection in LV Distribution Systems with PVs: A Current-Limitation-Based Solution" *Energies* 12, no. 15: 2909.
https://doi.org/10.3390/en12152909