# Microgrid Islanding Detection Based on Mathematical Morphology

^{1}

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## Abstract

**:**

## 1. Introduction

_{pcc}which is already measured in the system for other purposes. Therefore, it can efficiently detect islanding conditions within a short time interval. Simulation results on the various loads with different active and reactive power mismatches, compared with other islanding detection techniques, demonstrate the efficiency and accuracy of the proposed methods under different operation conditions with reduced NDZ.

## 2. DFIG Modeling

_{gsc}. A DC-link capacitor is between both converters to connect GSC to rotor side converter (RSC) with rotor current i

_{r}. A PWM structure is used to control GSC and RSC with active/reactive power and other line parameters. These back to back controllers keep the DC-link voltage (V

_{dc}) constant.

## 3. Overview of Mathematical Morphology

#### 3.1. Dilation and Erosion

_{1}as the first sample where n

_{1}∈ Dx. We will use g(m) to consider a window of signal and find the maximum value in this window:

_{1}, we can write:

#### 3.2. Opening and Closing

## 4. Proposed Islanding Detection Method

_{d}and m

_{e}refer to the length of the SE for the dilation and erosion, respectively. To modify the MM algorithm for islanding detection a dilation-erosion differential filter (DEDF) is proposed as follows:

## 5. Simulation Results

#### 5.1. Test System

#### 5.2. Case 1: Islanding

#### 5.3. Case 2: NDZ Determination

_{PCC}and ${P}_{DG}$ and ${Q}_{DG}$ as follows:

_{pcc}will decrease. In this case study, several sensitive scenarios with the low active/reactive power mismatch have been tested to evaluate the performance of the proposed method under various power mismatch, ranging from 5% to 20%.

#### 5.3.1. Scenario I

#### 5.3.2. Scenario II

#### 5.3.3. Scenarios III, IV

#### 5.4. Case 3: Capacitor Switching Condition

#### 5.5. Case 4: Motor Starting

#### 5.6. Case 5: Load Change

## 6. Conclusions

## Author Contributions

## Funding

## Conflicts of Interest

## Nomenclature

${P}_{Load}$ | Load Real Power |

${P}_{DG}$ | DG Real Power |

$\Delta P$ | Real Power Imbalance Limits |

${Q}_{Load}$ | Load Power |

${Q}_{DG}$ | DG Reactive Power |

$\Delta Q$ | Reactive Power Imbalance Limits |

${V}_{pcc}$ | Voltage at PCC |

${Z}_{s}$ | Source Impedance |

${R}_{s}$ | Source Resistance |

${X}_{s}$ | Source Reactance |

${L}_{s}$ | Source Inductance |

${V}_{s}$ | Source Voltage |

CB | Circuit Breaker |

RMS | Root Mean Square |

${Z}_{L}$ | Load Impedance |

${R}_{L}$ | Load Resistance |

${L}_{L}$ | Load Inductance |

${C}_{L}$ | Load Capacity |

${Z}_{DG}$ | DG Impedance |

${R}_{DG}$ | DG Resistance |

${X}_{DG}$ | DG Reactance |

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**Figure 3.**A sample signal analyzed by DEDF. (

**a**) Sample signal as input of the DEDF; (

**b**) output of the DEDF.

**Figure 6.**Case 1: (

**a**) voltage at PCC; (

**b**) frequency at PCC; (

**c**) output of the proposed DEDFOR; (

**d**) the trip signal for CB1.

**Figure 7.**Case2, Scenario I: the results of analysis for increased active power mismatch. (

**a**)Voltage at PCC; (

**b**) frequency at PCC; (

**c**) output of the proposed DEDFOR detector; (

**d**) the trip signal for CB1.

**Figure 8.**Case2, Scenario II: the results of analysis for decreased active power mismatch, (

**a**)Voltage at PCC; (

**b**) frequency at PCC; (

**c**) output of the proposed DEDFOR detector; (

**d**) the trip signal for CB1.

**Figure 9.**Case2, Scenario III: the results of analysis for increased reactive power mismatch, (

**a**)Voltage at PCC; (

**b**) frequency at PCC; (

**c**) output of the proposed DEDFOR detector; (

**d**) the trip signal for CB1.

Standards | Detection Time | Frequency Range | Voltage Range |
---|---|---|---|

IEEE-1547 [19] | t < 2 s | 49.3 Hz $\le $ f $\le $ 50.5 Hz | 0.88 $\le $ V $\le $ 1.1 p.u |

IEEE-929-2000 [20] | t < 2 s | 49.3 Hz $\le $ f $\le $ 50.5 Hz | 0.88 $\le $ V $\le $ 1.1 p.u |

IEC-62116 [21] | t < 2 s | 48.5 Hz $\le $ f $\le $ 51.5 Hz | 0.85 $\le $ V $\le $ 1.15 p.u |

Grid | Transformer: TFR1 |
---|---|

120 kV, 50 Hz | Side1: Yg; Side2: ∆ |

DGs: DFIG1,2 | 50 MVA, 120 kV/25 kV |

9 MW, 575 V, 50 Hz | ${R}_{1}$ = ${R}_{2}$ = 0.08/30 p.u, ${R}_{m}$ = ${L}_{m}$ = 500 p.u |

Lines: Line 1, 2, 3, 4, 5, 6, 7 | ${L}_{1}$ = ${L}_{2}$ = 0.08 p.u |

50 Hz, 10 km | Transformer: TFR2,3 |

3 phase pi section | Side1: ∆; Side2: Yg |

${R}_{1}$ = 0.1153, ${R}_{0}$ = 0.413 (ohm/km) | 12 MVA, 25 kV/575 V |

${L}_{1}$ = 1.05 × 10^{−3}, ${L}_{0}$ = 3.32 × 10^{−3} (H/km) | ${R}_{1}$ = ${R}_{2}$ = 0.025/30 p.u, ${R}_{m}$ = 500 p.u |

${C}_{1}$ = 11.33 × 10^{−9}, ${C}_{0}$ = 5.01 × 10^{−9} (F/km) | ${L}_{1}={L}_{2}=0.025\mathrm{p}.\mathrm{u},{L}_{m}=\mathrm{Inf}$ |

Scenarios | Power Mismatch | Different Ranges | Constant Value |
---|---|---|---|

Scenario I | increased%$\Delta P$ | +5%,+10%, +15%, +20%$\Delta P$ | 100%$\Delta Q$ |

Scenario II | decreased%$\Delta P$ | −5%, −10%, −15%, −20%$\Delta P$ | 100%$\Delta Q$ |

Scenario III | Increased%$\Delta Q$ | +5%, +10%, +15%, +20%$\Delta Q$ | 100%$\Delta Q$ |

Scenario IV | decreased%$\Delta Q$ | −5%, −10%, −15%, −20%$\Delta Q$ | 100%$\Delta Q$ |

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## Share and Cite

**MDPI and ACS Style**

Ghalavand, F.; Alizade, B.A.M.; Gaber, H.; Karimipour, H.
Microgrid Islanding Detection Based on Mathematical Morphology. *Energies* **2018**, *11*, 2696.
https://doi.org/10.3390/en11102696

**AMA Style**

Ghalavand F, Alizade BAM, Gaber H, Karimipour H.
Microgrid Islanding Detection Based on Mathematical Morphology. *Energies*. 2018; 11(10):2696.
https://doi.org/10.3390/en11102696

**Chicago/Turabian Style**

Ghalavand, Fatemeh, Behzad Asle Mohammadi Alizade, Hossam Gaber, and Hadis Karimipour.
2018. "Microgrid Islanding Detection Based on Mathematical Morphology" *Energies* 11, no. 10: 2696.
https://doi.org/10.3390/en11102696