Search Results (1,064)

Wireless power transfer (WPT) is increasingly used in smart manufacturing, unmanned platforms, and contactless power-supply applications. However, weak coupling, load-dependent impedance drift, and spatial misalignment can shift the resonant condition, leading to unstable output voltage and reduced transfer efficiency. This paper proposes a constant-voltage WPT method that combines a non-uniform winding coupler, parasitic coils, and dynamic capacitor compensation. A composite magnetic coupler with dense outer windings, loose inner windings, and parasitic coils is first developed, and a region-based electromagnetic model is established to characterise self-inductance, mutual inductance, and coupling coefficients. An improved LCC-S compensation network with a dynamic capacitor compensation matrix is then derived to keep the system close to resonant operation at the nominal 85 kHz operating point under load variation and coil-displacement-induced coupling changes. A zero-voltage-switching-angle tracking method with mutual-inductance correction is further introduced to compensate for phase deviation and maintain soft-switching operation through limited switching-frequency adjustment. Experimental validation demonstrates that the system maintains a stable constant-voltage output across a load range of 20–50 Ω and under 5 cm lateral and longitudinal offsets. The measured efficiency remains above 89% and reaches 93.7% under the optimal coupling and load-matching condition. Full article

Parallel grid-forming energy storage converters based on virtual synchronous generator (VSG) control are prone to active power oscillation and interphase circulating current under load disturbance, unit switching, and parameter mismatch conditions. To address these problems, this paper proposes a dual-layer damping control strategy that combines adaptive virtual damping in the power loop with capacitor current feedback damping in the current loop. First, the small-signal models of the LCL filter, VSG power loop, and parallel converter system are established, and the dominant oscillation modes are analyzed using eigenvalue and participation factor methods. Then, an adaptive damping coefficient is designed according to the active power deviation and frequency dynamic response to suppress low-frequency power oscillation, while a capacitor current feedback branch is introduced to reshape the LCL filter’s resonant poles and attenuate circulating current resonance. Compared with the conventional fixed-damping VSG control, the proposed method reduces active power overshoot and accelerates power redistribution under load step and unit switching conditions. In the traditional control case, the active power peaks of VSG1 and VSG2 reach approximately 30 kW and 40 kW, with an oscillation period of about 1.8 s, whereas the proposed strategy suppresses the oscillatory process and enables the output powers to rapidly reach the preset sharing ratio. In addition, the system frequency can recover to the rated value of 50 Hz without obvious steady-state deviation, and the high-frequency component of the grid-connected current and the interphase circulating current are significantly attenuated. MATLAB/Simulink simulation results verify that the proposed dual-layer damping strategy provides better power oscillation suppression, circulating current mitigation, and frequency dynamic performance than the conventional VSG control. Full article

This paper proposes a mathematical co-design framework for synchronous Boost DC-DC converters and their PI voltage controllers. In contrast to the conventional sequential design approach, where the power stage is sized first and the controller is tuned afterward, the proposed method treats the converter and the controller as a single coupled design problem. A nonlinear averaged model of the synchronous boost converter operating in continuous conduction mode is considered, explicitly incorporating the inductor series resistance, the capacitor equivalent series resistance, and the on-state resistances of the active switches. In addition, a simplified but physically interpretable loss model is included in order to capture inductor copper loss, capacitor ESR loss, semiconductor conduction loss, and switching loss. Based on this formulation, the joint design of the power stage and the PI controller is cast as a constrained multi-objective optimization problem whose decision variables include the inductance, capacitance, switching frequency, and controller gains. The optimization criteria account for output-voltage ripple, settling time, total losses, and current stress, while practical constraints related to duty cycle, current limits, ripple bounds, and closed-loop feasibility are enforced. The proposed framework makes it possible to compute Pareto-efficient designs and to reveal trade-offs that remain hidden under classical decoupled design procedures. Numerical case studies are structured to compare the proposed co-design strategy with a conventional sequential-design baseline. An optional technology-aware extension is also considered, allowing the influence of different semiconductor classes, such as Si, SiC, and GaN, to be assessed through technology-dependent loss and switching-frequency assumptions. The results indicate that the proposed framework provides a mathematically grounded and practically useful basis for integrated converter–controller synthesis in nonideal power electronic systems. Full article

The dual-active-bridge series resonant converter (DBSRC) is attractive for bidirectional DC conversion, but its output voltage may respond slowly and exhibit overshoot during start-up, load-step, and reference-step transients when conventional controllers are designed mainly from steady-state or small-signal models. This paper addresses the problem of improving the large-signal transient regulation of a DBSRC while avoiding undesired charging and discharging of the switching capacitor and output capacitor. A finite-state-machine-based state-trajectory control method is proposed. Thus, the converter consists of two full-bridge circuits, each with four switches. The proposed technique enhances the dynamic response of output voltage regulation. By examining the system dynamics in two state-plane domains, the switching behavior of the converter can be clearly characterized, enabling an accurate geometric representation of its operating mechanism. Consequently, a finite-state machine controller is designed based on state-trajectory planning. Switching conditions are utilized to achieve fast start-up and step-load transient responses. Finally, experiments are conducted to validate the effectiveness of the proposed control method. Full article

Decoupled maximum power point tracking control and output voltage control can be accomplished simultaneously using dual-duty cycle control. However, developed triple switch triple mode (TSTM) exhibits absence of the common ground between the solar panel and output load therefore causing the leakage current to flow which creates safety concern especially for household electrification. In addition to having a negative effect on the solar panel, leakage current increases power losses. Thus, this work proposes a unique TSTM dc-dc converter. The suggested converter has the following advantages: (1) The presence of a common ground between the output load and the solar panel eliminates the leakage current. (2) Reduced electromagnetic interference issues present due to leakage current. (3) Enhanced voltage gain over wider duty cycle. (4) Enables simultaneous decoupled control of MPPT and output voltage. (5) Absence of voltage oscillation across the switches. The proposed TSTM converter is an unique combination of switched inductor and switched capacitor. Both inductor and capacitors are connected in order to boost the level of voltage at the output terminal. The operating principle, design equations and device stress are analyzed in detail for the proposed TSTM. The comparison over existing converter in terms of voltage gain and switch stresses are highlighted in details. Lastly, a laboratory prototype (40/400 V) for 400 W is created and thoroughly tested in order to validate mathematical calculations. Full article

In hybrid-series-converter-based LCC-HVDC systems, controllable capacitor modules can provide additional voltage–time area during commutation, thereby improving inverter-side fault tolerance under AC faults. However, their switching behavior makes the commutation path impedance state-dependent, while most existing commutation-failure prediction methods still rely on fixed-reactance assumptions. To address this problem, this paper proposes a reactance-corrected predictive control and coordinated switching method. First, a capacitor switching coefficient is introduced to describe the insertion state of the controllable capacitor modules, and an equivalent commutation reactance of the HSC valve arm is derived. Then, the corrected reactance is incorporated into an extinction-angle margin index and an energy-margin index to quantify the influence of reactance variation on commutation capability. A segmented firing-angle controller with smooth compensation is further designed, and energy-margin feedback is coordinated with capacitor insertion control. PSCAD/EMTDC simulations verify that the proposed method reduces prediction error, provides a prediction lead time of 0.7–4.5 ms, and improves fault ride-through capability. Full article

This paper presents a passive residue-coupled discrete-time delta–sigma ($\Delta \Sigma$) modulator for low-power narrowband sensing applications. Instead of adding a fourth active integrator, the proposed architecture keeps a third-order switched-capacitor main loop and reuses the intrinsic top-plate residue of an 8-bit asynchronous successive-approximation-register (SAR) quantizer. The retained capacitive digital-to-analog converter (CDAC) residue is passively reinjected through a charge-redistribution path, introducing an additional high-pass error-propagation factor in the effective noise transfer function (NTF). Under a bounded effective coupling coefficient, the proposed loop approaches fourth-order-like in-band noise suppression while retaining third-order active-loop complexity. Behavioral simulations show that the Enhanced mode improves the peak signal-to-noise-and-distortion ratio (SNDR) by 16.9 dB over the Baseline third-order mode at an oversampling ratio (OSR) of 128. Circuit-level corner verification of the standalone SAR confirms correct bit cycling and a settled residue-retention window under typical–typical (TT), slow–slow (SS), and fast–fast (FF) conditions: with the slowest conversion window of about 21.4 ns at the SS corner and a sampling period of 39.06 ns at $f_s=25.6$ MHz, roughly 17.66 ns of timing margin remains for residue holding, passive reinjection, and clock non-overlap. The proposed method provides an architecture-level route for improving in-band noise shaping without increasing the number of active integrator stages, and is particularly attractive for low-power, narrowband, and sensor-oriented analog-to-digital converter (ADC) applications. Full article

This paper addresses the capacitor voltage balancing issue of submodules (SMs) in Modular Multilevel Converters (MMCs) operating under low switching frequencies by proposing a voltage balancing control strategy based on dynamic threshold adjustment. First, a dynamic model of SM capacitor voltage in MMCs is established, and the causes of capacitor voltage imbalance are analyzed. Then, based on the coupling relationship between switching frequency and voltage balancing, and the imbalance model under dynamic operating conditions, a dynamic threshold adjustment strategy is designed. A Fuzzy Logic Controller (FLC) is employed to dynamically adjust the voltage imbalance threshold in real time, ensuring capacitor voltage balance while optimizing the switching frequency and reducing system losses. Simulation results show that the proposed strategy can effectively maintain SM capacitor voltage balance under low-switching-frequency conditions, thereby improving system stability. Full article

The rapid growth of electromobility and the increasing deployment of EV chargers emphasize the importance of pulse rectifiers with built-in power factor correction (PFC) filters. The new switching power devices offer higher converter switching frequencies, which enable a decrease in nominal values of passive components, such as inductors and capacitors, and their physical dimensions. Devices like CoolMOS and GaN enable operation with low switching power, but are usually constructed for lower drain-source voltage. From this point of view, the Vienna Rectifier is a prospective type of pulse rectifier with built-in PFC because of its reduced blocking-voltage requirements for the power transistors. Nevertheless, faster switching semiconductor devices with lower switching gate charge require more precise driving circuit tuning and setup. There are many scientific papers focused on the driving setup and techniques of the power transistors applied in H-bridge topologies. The purpose of this paper is to investigate the commutation loop and the related switching phenomena of the Vienna Rectifier topology. This paper evaluates the driver setup for a CoolMOS-based Vienna Rectifier with anti-serial connection of transistors forming a bidirectional switch. The switching transients are analyzed and simulated. Subsequently, the real driver settings are evaluated on the real prototype. Full article

Some previous studies argue that under the conditions of a double line to ground fault at the point of common coupling at the inverter end, the AC grid voltage of phases A and B will decrease along with the same level while the phase C will maintain at a stable steady state and this will lead to an excess increase in the voltage level of the high voltage direct current (HVDC) link. Presented in this paper is a model that comprises the hybrid multiterminal line commutated converters and the voltage source converter HVDC system. This model was mathematically modelled and implemented on Matlab/Simulink software in order to investigate the fault behavior, with a particular emphasis on double line to ground fault at different fault resistances. The system under study consists of a fault switch timer, photovoltaic solar array, wind energy conversion system, inverter control for the voltage source converter, Inductor–capacitor–inductor (LCL) filter and PI section line. The findings of this study indicated that during the double line to ground fault at varying fault resistances, the AC grid voltage in phase A will experience a more pronounced decrease compared to phase B. In contrast, phase C will exhibit only a slight reduction in voltage at the inverter end. Similarly, at the inverter end of the hybrid system, it was observed that the AC grid currents for the affected phases, specifically phases A and B, will experience an increase. It is further discovered that phase C will maintain relatively stable condition without increasing or decreasing during a double line to ground fault event. In addition, it is noted that the HVDC link voltage will decrease while the HVDC link current will increase depending on any fault resistance values. Thus, the inferences as a result of this study are presented in this paper. Full article

This paper proposes a Pulse Train Control (PTC) strategy for the Series Capacitor Buck (SCB) converter operating in Discontinuous Conduction Mode (DCM). Instead of synthesizing a continuous duty ratio, the controller selects between two preset duty ratios in each switching period, and the same binary decision is applied to the two interleaved phases with a ${180}^{\circ }$ phase shift. A reduced one-dimensional control-oriented discrete-time map is derived from output charge balance to describe the control cycle-scale regulation dynamics. Based on this map, the bounded-regulation condition is established and the design roles of the pulse pair $(D_H,D_L)$ are clarified. The regulated steady state is shown to be a bounded threshold-crossing periodic motion rather than a static equilibrium, and the evolution of pulse patterns with operating condition is interpreted through border collision transitions. Full switching model and experimental results from a 12-V-to-1-V prototype support the predicted high-pulse fraction trend, the multiplier-based local attraction assessment of annotated periodic pulse patterns, the input voltage-dependent ripple estimate, and the fast large-signal response under representative load step conditions. Full article

This paper proposes a new single-stage bipolar Boost DC/DC converter topology, hereafter referred to as the Full-bridge Boost converter. The proposed architecture enables the generation of a bipolar output voltage with a magnitude equal to or greater than the input voltage, reducing the passive component count. Specifically, a single inductor and a single capacitor are employed, in conjunction with a full-bridge structure and auxiliary switches, to achieve both voltage boosting and polarity inversion within a unified conversion stage. A comprehensive switching configuration is presented, and a mathematical model based on the system switching dynamics is derived. Furthermore, the steady-state behavior is analyzed, yielding an explicit expression for the voltage gain as a function of the control input. In addition, ripple analysis and continuous conduction mode (CCM) boundary conditions are derived to establish design constraints for the converter operation. The characteristic waveforms under both CCM and discontinuous conduction mode (DCM) operation are also analyzed. The validity of the proposed topology and its mathematical representation is verified through MATLAB/Simulink simulations. The detailed switching-level converter is implemented using the Simscape Electrical environment, and the numerical results of the averaged model are compared against the circuit-level simulation through waveform analysis and root mean square error (RMSE) indices to assess modeling accuracy. Finally, implementation feasibility considerations, including semiconductor stress, dead-time requirements, conduction and switching losses, and efficiency analysis, are discussed. Full article

The accumulation of ice on power lines severely affects the safety of power systems. Conventional ice melting methods suffer from poor flexibility and adaptability, accompanied by high power consumption. As a novel technical approach, distributed ice melting deploys modular and movable ice melting units at key sections of overhead ground wires, which generate heat on site according to the actual icing conditions of icing segments, and imposes high requirements on the miniaturization of ice melting equipment as well as the regulation strategy of ice melting current. This study proposes a distributed ice melting method for overhead ground wires based on AC power supply, which can adjust the current in accordance with the specific demands of wire protection and ice melting for different line sections. The feasibility and effectiveness of the proposed method are verified through thermodynamic simulations and experimental tests. The de-icing method injects power–frequency AC into the overhead ground wire through a Scott transformer combined with a series capacitor reactive power compensation structure, enabling on-demand regulation by adjusting capacitor switching strategies and transformer operating modes. This approach balances efficiency and flexibility. Based on a reactive power compensation capacity current control strategy and thermodynamic analysis, an electro-thermal-fluid field coupling simulation model for the experimental ground wire was developed. The current regulation strategies for different environmental and operating conditions were calculated and validated. The simulation results show that, under different conditions, the adjustable current effective values of the de-icing system in this model range from 101 to 380 A (line maintenance current), 304 to 622 A (critical de-icing current), and 661 to 1121 A (maximum de-icing current). Field tests demonstrate that this method can stably achieve AC de-icing and current control. For the experimental JLB40-150 model ground wire, adjusting the injected current to 350 A enables safe operation under line maintenance conditions, with a limit not exceeding 400 A. This paper provides a more efficient, flexible, controllable, and widely applicable method for the de-icing of overhead ground wires. Full article

Wireless Power Transfer (WPT) systems often face performance limitations due to the right-half-plane zero (RHPz) in conventional constant-current-fed Buck converters, which can lead to negative undershoot and a slow dynamic response. In this paper, we propose a Buck converter topology with an additional active switch in series with the input capacitor. This mechanism-level modification effectively mitigates the RHPz. The operating modes, steady-state behavior, and small-signal characteristics of the converter are systematically analyzed. A tailored control strategy enables independent regulation of input and output capacitor charging times, supporting improved voltage regulation. Experimental results indicate that the proposed converter reduces settling time by approximately 83%, substantially suppresses negative undershoot, and maintains stable voltage regulation under reference step changes and load transients. The converter maintains high efficiency while demonstrating improved dynamic performance and stability relative to conventional topologies, providing a practical approach for advanced WPT applications. Full article

A switched-capacitor (SC) three-phase direct ac/ac converter is presented in this paper. It includes an additional inductor and two SC cells for each phase. Due to the introduction of the inductor, the output voltage can be adjusted. The proposed converter operates at a fixed switching frequency. One of the features of this topology is that the voltage stresses across the switches and capacitors equal half of the high-side voltage. In addition, the self-balancing capability of capacitor voltages and a simple modulation strategy are other characteristics. The main advantage of the proposed converter is the employment of unidirectional switches (a single MOSFET), which avoids the commutation problems in the bidirectional switches. A detailed description of the operation principle, quantitative analysis, and design considerations for the proposed converter is provided. Eventually, a prototype with 55 V/220 V and 3 kW is designed to demonstrate the feasibility and validity of the proposed converter. Full article