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Keywords = Single Event Transient (SET)

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33 pages, 1298 KiB  
Article
Exploring Circuit-Level Techniques for Soft Error Mitigation in 7 nm FinFET Full Adders
by Rafael Oliveira, Rafael B. Schvittz and Cristina Meinhardt
Electronics 2025, 14(15), 2937; https://doi.org/10.3390/electronics14152937 - 23 Jul 2025
Viewed by 305
Abstract
This work investigates the effects of radiation on FinFET-based full adders, which are crucial components of arithmetic units, particularly in aerospace and space applications. While FinFETs offer significant advantages, they remain susceptible to single-event transients (SETs) induced by radiation, which can cause computational [...] Read more.
This work investigates the effects of radiation on FinFET-based full adders, which are crucial components of arithmetic units, particularly in aerospace and space applications. While FinFETs offer significant advantages, they remain susceptible to single-event transients (SETs) induced by radiation, which can cause computational errors. We assess three circuit-level mitigation techniques against SETs in FinFET adders: decoupling cells (DCELLs), transistor sizing (TS), and a combined approach incorporating both methods. Our results demonstrate that the most sensitive nodes and critical vectors in the adders vary depending on the mitigation strategy, underscoring their impact on overall radiation resilience. By analyzing these techniques alongside critical node evaluation, we identify their advantages and limitations, providing insights to enhance the robustness of FinFET-based processors in radiation-prone environments. Full article
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13 pages, 6281 KiB  
Article
Heavy Ions Induced Single-Event Transient in SiGe-on-SOI HBT by TCAD Simulation
by Yuedecai Long, Abuduwayiti Aierken, Xuefei Liu, Mingqiang Liu, Changsong Gao, Gang Wang, Degui Wang, Sandip Majumdar, Yundong Xuan, Mengxin Liu and Jinshun Bi
Micromachines 2025, 16(5), 532; https://doi.org/10.3390/mi16050532 - 29 Apr 2025
Viewed by 448
Abstract
In this work, the effects of heavy ion strike position, incident angle, linear energy transfer (LET) value, ambient temperature, bias conditions, and the synergistic effects of total dose irradiation on the single-event transient (SET) in silicon-germanium heterojunction bipolar transistors on silicon-on-insulator (SiGe-on-SOI HBTs) [...] Read more.
In this work, the effects of heavy ion strike position, incident angle, linear energy transfer (LET) value, ambient temperature, bias conditions, and the synergistic effects of total dose irradiation on the single-event transient (SET) in silicon-germanium heterojunction bipolar transistors on silicon-on-insulator (SiGe-on-SOI HBTs) were investigated using TCAD simulations. It was demonstrated that, compared to the bulk SiGe HBT, the SiGe-on-SOI HBT exhibits lower transient current and less charge collection, indicating better resistance to SET. The SET response is more pronounced when heavy ions strike vertically from the emitter and base regions. Transient current and collected charge escalate with increasing incident angle, demonstrating a strong linear correlation with LET values. As the temperature decreases, the peak transient current increases, while the pulse duration decreases and the total collected charge diminishes. After total dose irradiation, the peak transient current in the SiGe-on-SOI HBT decreases, whereas the damage was more severe in the absence of irradiation. Under collector positive bias and positive bias, significant SET responses were observed, while cutoff bias and substrate bias exhibited better resistance to SET damage. These findings provide critical insights into radiation-hardened design strategies for the SiGe-on-SOI HBT. Full article
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14 pages, 7293 KiB  
Article
Study on Single-Event Transient Hardness of Semi-Enclosed Gate NMOS
by Zhuoxiang Wang, Gang Li and Minghua Tang
Appl. Sci. 2025, 15(7), 4023; https://doi.org/10.3390/app15074023 - 5 Apr 2025
Viewed by 396
Abstract
Based on the simulation software, single-event transient (SET) simulations were conducted on semi-enclosed gate NMOS devices. The simulation involved bombarding the semi-enclosed gate NMOS devices with heavy ions under specific conditions. A comparative analysis was conducted to evaluate the single-event transient tolerance of [...] Read more.
Based on the simulation software, single-event transient (SET) simulations were conducted on semi-enclosed gate NMOS devices. The simulation involved bombarding the semi-enclosed gate NMOS devices with heavy ions under specific conditions. A comparative analysis was conducted to evaluate the single-event transient tolerance of traditional NMOS and semi-enclosed gate NMOS. Simulation curves from transient to steady-state states under different Linear Energy Transfer (LET) values, as well as potential distribution and current density distribution maps following heavy ion bombardment, were analyzed. Furthermore, single-event transient simulations were carried out on inverters composed of both NMOS types, with subsequent analysis. The results ultimately demonstrate that the semi-enclosed gate NMOS exhibits superior single-event transient tolerance compared to conventional NMOS. Full article
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11 pages, 545 KiB  
Article
Safety of Thread-Embedding Acupuncture: A Multicenter, Prospective, Observational Pilot Study
by Seojung Ha, Suji Lee, Bonhyuk Goo, Eunseok Kim, Ojin Kwon, Sang-Soo Nam and Joo-Hee Kim
Healthcare 2024, 12(23), 2396; https://doi.org/10.3390/healthcare12232396 - 29 Nov 2024
Cited by 2 | Viewed by 1872
Abstract
Background/Objectives: Thread-embedding acupuncture (TEA) is widely used for cosmetic and therapeutic purposes; however, its safety profile, particularly in real-world clinical settings, remains under-researched. This study aimed to evaluate the safety profile of TEA through a prospective, observational analysis and confirm the feasibility [...] Read more.
Background/Objectives: Thread-embedding acupuncture (TEA) is widely used for cosmetic and therapeutic purposes; however, its safety profile, particularly in real-world clinical settings, remains under-researched. This study aimed to evaluate the safety profile of TEA through a prospective, observational analysis and confirm the feasibility of the study design for future studies involving larger patient populations. Methods: A multicenter, prospective observational study was conducted involving 100 patients who received TEA. Adverse events (AEs) were tracked, including incidence, severity, and duration during the 6-month post-treatment period. Bivariate analysis was used to assess factors influencing AE occurrence, including treatment site, depth, and patient-specific variables. Results: A total of 100 patients received 136 treatments during the study period. A total of 12 AEs were reported, most of which were mild and transient local reactions, including pain and bruising. More than half of the AEs occurred on the day of the procedure, with an average duration of 7 days. No serious AEs were observed, and all events resolved without any lasting effects. Patients undergoing multiple treatments showed no significantly higher AE rates than those receiving a single session. Conclusions: This study suggested that TEA generally has a favorable safety profile, with most AEs being mild and resolving without long-term effects. Further studies that evaluate the safety of TEA treatment across larger populations are recommended. Full article
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12 pages, 10804 KiB  
Article
Total Ionizing Dose and Single-Event Effect Response of the AD524CDZ Instrumentation Amplifier
by Jaime Cardenas Chavez, Dave Hiemstra, Adriana Noguera Cundar, Brayden Johnson, David Baik and Li Chen
Energies 2024, 17(18), 4725; https://doi.org/10.3390/en17184725 - 22 Sep 2024
Cited by 1 | Viewed by 1352
Abstract
This manuscript focuses on studying the radiation response of the Commercial-off-the-shelf (COTS) AD524CDZ operational amplifier. Total Ionizing Dose (TID) effects were tested using low-dose 60Co irradiation. Single-Event Effect (SEE) sensitivity was studied on this operational amplifier using a 105 MeV proton beam. [...] Read more.
This manuscript focuses on studying the radiation response of the Commercial-off-the-shelf (COTS) AD524CDZ operational amplifier. Total Ionizing Dose (TID) effects were tested using low-dose 60Co irradiation. Single-Event Effect (SEE) sensitivity was studied on this operational amplifier using a 105 MeV proton beam. Additionally, further study of the SEE response was carried out using a Two-photon absorption laser to scan some sensitive sectors of the die. For this laser experiment, different gain setups and laser energies were employed to determine how the Single Event Transient (SET) response of the device was affected based on the test configuration. The results from the TID experiments revealed that the studied device remained functional after 100 krads (Si). Proton experiments revealed the studied device exhibited a high SET response with a maximum DC offset SET of about 1.5 V. Laser experiments demonstrated that there was a clear SET reduction when using 10× and 1000× gain setups. Full article
(This article belongs to the Section F: Electrical Engineering)
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10 pages, 4095 KiB  
Article
Improvement of Single Event Transient Effects for a Novel AlGaN/GaN High Electron-Mobility Transistor with a P-GaN Buried Layer and a Locally Doped Barrier Layer
by Juan Xiong, Xintong Xie, Jie Wei, Shuxiang Sun and Xiaorong Luo
Micromachines 2024, 15(9), 1158; https://doi.org/10.3390/mi15091158 - 16 Sep 2024
Cited by 2 | Viewed by 1711
Abstract
In this paper, a novel AlGaN/GaN HEMT structure with a P-GaN buried layer in the buffer layer and a locally doped barrier layer under the gate (PN-HEMT) is proposed to enhance its resistance to single event transient (SET) effects while also overcoming the [...] Read more.
In this paper, a novel AlGaN/GaN HEMT structure with a P-GaN buried layer in the buffer layer and a locally doped barrier layer under the gate (PN-HEMT) is proposed to enhance its resistance to single event transient (SET) effects while also overcoming the degradation of other characteristics. The device operation mechanism and characteristics are investigated by TCAD simulation. The results show that the peak electric field and impact ionization at the gate edges are reduced in the PN-HEMT due to the introduced P-GaN buried layer in the buffer layer. This leads to a decrease in the peak drain current (Ipeak) induced by the SET effect and an improvement in the breakdown voltage (BV). Additionally, the locally doped barrier layer provides extra electrons to the channel, resulting in higher saturated drain current (ID,sat) and maximum transconductance (gmax). The Ipeak of the PN-HEMT (1.37 A/mm) is 71.8% lower than that of the conventional AlGaN/GaN HEMT (C-HEMT) (4.85 A/mm) at 0.6 pC/µm. Simultaneously, ID,sat and BV are increased by 21.2% and 63.9%, respectively. Therefore, the PN-HEMT enhances the hardened SET effect of the device without sacrificing other key characteristics of the AlGaN/GaN HEMT. Full article
(This article belongs to the Special Issue Advances in GaN- and SiC-Based Electronics: Design and Applications)
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23 pages, 773 KiB  
Review
Non-Invasive Diagnostic Tests for Portal Hypertension in Patients with HBV- and HCV-Related Cirrhosis: A Comprehensive Review
by Ciro Celsa, Marzia Veneziano, Francesca Maria Di Giorgio, Simona Cannova, Antonino Lombardo, Emanuele Errigo, Giuseppe Landro, Fabio Simone, Emanuele Sinagra and Vincenza Calvaruso
Medicina 2024, 60(5), 690; https://doi.org/10.3390/medicina60050690 - 24 Apr 2024
Cited by 3 | Viewed by 3489
Abstract
Clinically significant portal hypertension (CSPH) in patients with compensated advanced chronic liver disease indicates an increased risk of decompensation and death. While invasive methods like hepatic venous–portal gradient measurement is considered the gold standard, non-invasive tests (NITs) have emerged as valuable tools for [...] Read more.
Clinically significant portal hypertension (CSPH) in patients with compensated advanced chronic liver disease indicates an increased risk of decompensation and death. While invasive methods like hepatic venous–portal gradient measurement is considered the gold standard, non-invasive tests (NITs) have emerged as valuable tools for diagnosing and monitoring CSPH. This review comprehensively explores non-invasive diagnostic modalities for portal hypertension, focusing on NITs in the setting of hepatitis B and hepatitis C virus-related cirrhosis. Biochemical-based NITs can be represented by single serum biomarkers (e.g., platelet count) or by composite scores that combine different serum biomarkers with each other or with demographic characteristics (e.g., FIB-4). On the other hand, liver stiffness measurement and spleen stiffness measurement can be assessed using a variety of elastography techniques, and they can be used alone, in combination with, or as a second step after biochemical-based NITs. The incorporation of liver and spleen stiffness measurements, alone or combined with platelet count, into established and validated criteria, such as Baveno VI or Baveno VII criteria, provides useful tools for the prediction of CSPH and for ruling out high-risk varices, potentially avoiding invasive tests like upper endoscopy. Moreover, they have also been shown to be able to predict liver-related events (e.g., the occurrence of hepatic decompensation). When transient elastography is not available or not feasible, biochemical-based NITs (e.g., RESIST criteria, that are based on the combination of platelet count and albumin levels) are valid alternatives for predicting high-risk varices both in patients with untreated viral aetiology and after sustained virological response. Ongoing research should explore novel biomarkers and novel elastography techniques, but current evidence supports the utility of routine blood tests, LSM, and SSM as effective surrogates in diagnosing and staging portal hypertension and predicting patient outcomes. Full article
(This article belongs to the Special Issue Viral Hepatitis Research: Updates and Challenges)
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18 pages, 10280 KiB  
Article
Investigation of Incident Angle Dependence of Single Event Transient Model in MOSFET
by Fan Zhang, Yibo Wang, Yi Liu, Minghu Wu and Zilong Zhou
Electronics 2023, 12(11), 2349; https://doi.org/10.3390/electronics12112349 - 23 May 2023
Cited by 1 | Viewed by 1564
Abstract
As the manufacturing process level of semiconductor devices continues to improve, the device size gradually decreases, and the devices are affected by the single event effect more and more severely. In this paper, the physical process of single particle incident N-channel Metal-Oxide-Semiconductor Field-Effect [...] Read more.
As the manufacturing process level of semiconductor devices continues to improve, the device size gradually decreases, and the devices are affected by the single event effect more and more severely. In this paper, the physical process of single particle incident N-channel Metal-Oxide-Semiconductor Field-Effect Transistor (NMOSFET) is simulated. By changing the particle incidence position, incidence angle, LET value, and temperature, the transient current variation with time is obtained, and the susceptibility of the device to single event effect under the action of four factors is analyzed, which provides the basis for the next research of the device against single event effect and ideas for the radiation hardening of semiconductor devices. In addition, in these experiments, there were bimodal-shaped current pulses that were different from single peak transient current pulses. Therefore, a new model describing the bimodal single event transient (SET) current waveform was proposed, which can be used as a current source model in circuit simulation and help to predict the ability of the circuit to resist the single event effect. Full article
(This article belongs to the Section Semiconductor Devices)
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22 pages, 20434 KiB  
Article
Simulation Studies on Single-Event Effects and the Mechanisms of SiC VDMOS from a Structural Perspective
by Tao Liu, Yuan Wang, Rongyao Ma, Hao Wu, Jingyu Tao, Yiren Yu, Zijun Cheng and Shengdong Hu
Micromachines 2023, 14(5), 1074; https://doi.org/10.3390/mi14051074 - 18 May 2023
Cited by 8 | Viewed by 2353
Abstract
The single-event effect reliability issue is one of the most critical concerns in the context of space applications for SiC VDMOS. In this paper, the SEE characteristics and mechanisms of the proposed deep trench gate superjunction (DTSJ), conventional trench gate superjunction (CTSJ), conventional [...] Read more.
The single-event effect reliability issue is one of the most critical concerns in the context of space applications for SiC VDMOS. In this paper, the SEE characteristics and mechanisms of the proposed deep trench gate superjunction (DTSJ), conventional trench gate superjunction (CTSJ), conventional trench gate (CT), and conventional planar gate (CT) SiC VDMOS are comprehensively analyzed and simulated. Extensive simulations demonstrate the maximum SET current peaks of DTSJ−, CTSJ−, CT−, and CP SiC VDMOS, which are 188 mA, 218 mA, 242 mA, and 255 mA, with a bias voltage VDS of 300 V and LET = 120 MeV·cm2/mg, respectively. The total charges of DTSJ−, CTSJ−, CT−, and CP SiC VDMOS collected at the drain are 320 pC, 1100 pC, 885 pC, and 567 pC, respectively. A definition and calculation of the charge enhancement factor (CEF) are proposed. The CEF values of DTSJ−, CTSJ−, CT−, and CP SiC VDMOS are 43, 160, 117, and 55, respectively. Compared with CTSJ−, CT−, and CP SiC VDMOS, the total charge and CEF of the DTSJ SiC VDMOS are reduced by 70.9%, 62.4%, 43.6% and 73.1%, 63.2%, and 21.8%, respectively. The maximum SET lattice temperature of the DTSJ SiC VDMOS is less than 2823 K under the wide operating conditions of a drain bias voltage VDS ranging from 100 V to 1100 V and a LET value ranging from 1 MeV·cm2/mg to 120 MeV·cm2/mg, while the maximum SET lattice temperatures of the other three SiC VDMOS significantly exceed 3100 K. The SEGR LET thresholds of DTSJ−, CTSJ−, CT−, and CP SiC VDMOS are approximately 100 MeV·cm2/mg, 15 MeV·cm2/mg, 15 MeV·cm2/mg, and 60 MeV·cm2/mg, respectively, while the value of VDS = 1100 V. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications)
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13 pages, 3750 KiB  
Article
A Single-Event-Hardened Scheme for Ring Oscillator Applied to Radiation-Resistant PLL Microsystems
by Qi Xiang, Hongxia Liu and Yulun Zhou
Micromachines 2023, 14(4), 882; https://doi.org/10.3390/mi14040882 - 19 Apr 2023
Cited by 1 | Viewed by 2184
Abstract
A voltage-controlled oscillator (VCO) is one of the key modules of the phase-locked loop (PLL) microsystem, and it is easy to bombard using high-energy particles in a radiation environment, resulting in the single-event effect. In order to improve the anti-radiation ability of the [...] Read more.
A voltage-controlled oscillator (VCO) is one of the key modules of the phase-locked loop (PLL) microsystem, and it is easy to bombard using high-energy particles in a radiation environment, resulting in the single-event effect. In order to improve the anti-radiation ability of the PLL microsystems used in the aerospace environment, a new voltage-controlled oscillator hardened circuit is proposed in this work. The circuit consists of delay cells with an unbiased differential series voltage switch logic structure with a tail current transistor. By reducing sensitive nodes and using the positive feedback of the loop, the recovery process of the VCO circuit to the single-event transient (SET) is reduced and accelerated, so as to reduce the sensitivity of the circuit to the single-event effect. The simulation results based on the SMIC 130 nm complementary metal–oxide–semiconductor (CMOS) process show that the maximum phase shift difference of the PLL with the hardened VCO is reduced by 53.5%, which shows that the hardened VCO structure can reduce the sensitivity of the PLL to the SET and improve the reliability of the PLL in the radiation environment. Full article
(This article belongs to the Section D1: Semiconductor Devices)
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10 pages, 1034 KiB  
Article
Single-Center Experience with Simultaneous Mural Aortic Thrombosis and Peripheral Obstructive Disease in Pre-COVID-19 and COVID-19 Era
by Filippo Benedetto, Francesco La Corte, Domenico Spinelli, Gabriele Piffaretti, Santi Trimarchi and Giovanni De Caridi
Diagnostics 2023, 13(6), 1208; https://doi.org/10.3390/diagnostics13061208 - 22 Mar 2023
Viewed by 2686
Abstract
Background: Mural aortic thrombosis associated with chronic peripheral obstruction of the lower limbs is an unusual event. Repeated embolism of instability aortic mural thrombosis caused acute limb ischemia (Rutherford 2 classification) in patients with peripheral arterial disease (PAD). We report a single-center experience [...] Read more.
Background: Mural aortic thrombosis associated with chronic peripheral obstruction of the lower limbs is an unusual event. Repeated embolism of instability aortic mural thrombosis caused acute limb ischemia (Rutherford 2 classification) in patients with peripheral arterial disease (PAD). We report a single-center experience for patients with transmural aortic thrombosis and peripheral artery disease. Methods: We retrospectively analyzed data of 54 patients with aortic mural thrombus disease with PAD presentation, treated at our center between 2013 and 2022. Results: Thirty patients (six with proven SARS-CoV-2 infection) underwent hybrid or staged treatment for an aortic lesion and for lower limb ischemia, by the placement of an endovascular aortic stent graft and a femoro-distal or a popliteal-distal bypass graft. The remaining 24 cases were only subjected to an intravascular treatment of the thoracic or abdominal aorta. Transient renal failure occurred in three patients. No embolic events were detected during the procedures. Aortic-related mortality was reported in just one patient who died from multiple organ failure. There was an embolic stroke in one patient with proven SARS-CoV-2 infection, three major amputations in patients with proven SARS-CoV-2 infection and no aortic-related mortality. Conclusions: Stent coverage of complex aortic lesions, alone or in association with a distal bypass graft, supports this approach in a variety of settings. The COVID-19 pandemic caused an increased mortality and amputation rate. Full article
(This article belongs to the Collection Vascular Diseases Diagnostics)
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11 pages, 5324 KiB  
Communication
Single-Event Transient Study of 28 nm UTBB-FDSOI Technology Using Pulsed Laser Mapping
by Rui Chen, Li Chen, Sai Li, Rui Liu, Xuantian Li, Shuting Shi, Cheng Gu and Jianwei Han
Electronics 2023, 12(5), 1214; https://doi.org/10.3390/electronics12051214 - 3 Mar 2023
Viewed by 2209
Abstract
Single-event transient (SET)-induced soft errors are becoming a more significant threat to the reliability of electronic systems in space, especially for advanced technologies. The SET pulse width, which is vulnerable to SET propagation, is a critical parameter for developing SET mitigation techniques. This [...] Read more.
Single-event transient (SET)-induced soft errors are becoming a more significant threat to the reliability of electronic systems in space, especially for advanced technologies. The SET pulse width, which is vulnerable to SET propagation, is a critical parameter for developing SET mitigation techniques. This paper investigates the pulse-broadening effect in the process of SET propagation in logic circuits and the SET-sensitive region distribution in the layout using the pulsed-laser mapping technique in logic circuits implemented with 28 nm Ultra-Thin Body and BOX (UTBB) FDSOI technology. The experiments were carried out at the Naval Research Laboratory (NRL) to measure the SET-induced errors and map the SET-sensitive region distribution at various clock frequencies and laser energy levels. The results illustrate that the number of errors increases with the clock frequency and energy for combinational logic circuits and that the flip-flop SEU rate is less sensitive to clock frequency. The SET pulse-broadening effect was also observed using SET mapping for an OR gate chain at different laser energy levels. In addition, the simulation results revealed the mechanism of the SET pulse-broadening effect in an OR gate chain. Full article
(This article belongs to the Special Issue Radiation Tolerant Digital and Analog Circuits and Systems)
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14 pages, 3189 KiB  
Article
A Novel DNU Self-Recoverable and SET Pulse Filterable Latch Design for Aerospace Applications
by Shixin Wang, Lixin Wang, Min Guo, Yuanzhe Li and Bowang Li
Electronics 2023, 12(5), 1193; https://doi.org/10.3390/electronics12051193 - 1 Mar 2023
Cited by 1 | Viewed by 2155
Abstract
This paper presents a novel double node upset (DNU) self-recoverable and single event transient (SET) pulse filterable latch design in 28 nm CMOS technology. The loop structure formed by C-elements (CEs) ensures that the latch can self-recover from the DNUs. A Schmitt trigger [...] Read more.
This paper presents a novel double node upset (DNU) self-recoverable and single event transient (SET) pulse filterable latch design in 28 nm CMOS technology. The loop structure formed by C-elements (CEs) ensures that the latch can self-recover from the DNUs. A Schmitt trigger at the output can filter out transient pulses from anywhere in the circuit. A clock-controlled inverter channel that connects the input to the output reduces the transmission latency. The simulation results show that the proposed design is completely immune to DNUs, and the delay power area product (DPAP) is reduced by more than 50% compared with the previous design. Full article
(This article belongs to the Section Microelectronics)
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19 pages, 5645 KiB  
Article
A Methodology for Accelerating FPGA Fault Injection Campaign Using ICAP
by Frederico Ferlini, Felipe Viel, Laio Oriel Seman, Hector Pettenghi, Eduardo Augusto Bezerra and Valderi Reis Quietinho Leithardt
Electronics 2023, 12(4), 807; https://doi.org/10.3390/electronics12040807 - 6 Feb 2023
Cited by 7 | Viewed by 3297
Abstract
The increasing complexity of System-on-Chip (SoC) and the ongoing technology miniaturization on Integrated Circuit (IC) manufacturing processes makes modern SoCs more susceptible to Single-Event Effects (SEE) caused by radiation, even at sea level. To provide realistic estimates at a low cost, efficient analysis [...] Read more.
The increasing complexity of System-on-Chip (SoC) and the ongoing technology miniaturization on Integrated Circuit (IC) manufacturing processes makes modern SoCs more susceptible to Single-Event Effects (SEE) caused by radiation, even at sea level. To provide realistic estimates at a low cost, efficient analysis techniques capable of replicating SEEs are required. Among these methods, fault injection through emulation using Field-Programmable Gate Array (FPGA) enables campaigns to be run on a Circuit Under Test (CUT). This paper investigates the use of an FPGA architecture to speed up the execution of fault campaigns. As a result, a new methodology for mapping the CUT occupation on the FPGA is proposed, significantly reducing the total number of faults to be injected. In addition, a fault injection technique/flow is proposed to demonstrate the benefits of cutting-edge approaches. The presented technique emulates Single-Event Transient (SET) in all combinatorial elements of the CUT using the Internal Configuration Access Port (ICAP) of Xilinx FPGAs. Full article
(This article belongs to the Special Issue FPGAs Based Hardware Design)
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11 pages, 5423 KiB  
Article
The Inflection Point of Single Event Transient in SiGe HBT at a Cryogenic Temperature
by Xiaoyu Pan, Hongxia Guo, Chao Lu, Hong Zhang and Yinong Liu
Electronics 2023, 12(3), 648; https://doi.org/10.3390/electronics12030648 - 28 Jan 2023
Cited by 4 | Viewed by 1942
Abstract
Basing our findings on our previous pulsed laser testing results, we have experimentally demonstrated that there is an inflection point of a single event transient (SET) in the silicon-germanium heterojunction bipolar transistors (SiGe HBTs) with a decreasing temperature from +20 °C to −180 [...] Read more.
Basing our findings on our previous pulsed laser testing results, we have experimentally demonstrated that there is an inflection point of a single event transient (SET) in the silicon-germanium heterojunction bipolar transistors (SiGe HBTs) with a decreasing temperature from +20 °C to −180 °C. Additionally, the changes in the parasitic resistivity of the carrier collection pathway due to incomplete ionization could play a key role. In this paper, we found that the incident-heavy ion’s parameters could also have an important impact on the SET inflection point by introducing the ion track structures generated by Geant4 simulation to the TCAD transient simulation. Heavy ion with a low linear energy transfer (LET) will not trigger the ion shunt effect of SiGe HBT and the inflection point will not occur until −200 °C. For high LET ions’ incidence, the high-density electron-hole pairs (EHPs) could significantly affect the parasitic resistivity on the pathway and lead to an earlier inflection point. The present results and methods could provide a new reference for the effective evaluation of single-event effects in bipolar transistors and circuits at cryogenic temperatures and provide new evidence of the SiGe technology’s potential for applications in extreme cryogenic environments. Full article
(This article belongs to the Special Issue Radiation Effects of Advanced Electronic Devices and Circuits)
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