SiC Based Miniaturized Devices, 3rd Edition

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D:Materials and Processing".

Deadline for manuscript submissions: 30 June 2025 | Viewed by 7226

Special Issue Editors


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Guest Editor
U.S. Army Research Laboratory, Adelphi, MD 20783, USA
Interests: SiC; SiC MEMS

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Guest Editor
EngeniusMicro, Huntsville, AL 35801, USA
Interests: silicon carbide microsystems

Special Issue Information

Dear Colleagues,

MEMS devices are found in many of today’s electronic devices and systems, from airbag sensors in cars to smart phones, embedded systems, etc. Increasingly, the reduction in dimensions has led to nanometer-scale devices, called NEMS. The plethora of applications on the commercial market speaks for itself, especially for the highly precise manufacturing of silicon-based MEMS and NEMS. While this is a tremendous achievement, silicon as a material comes with some drawbacks, mainly in terms of its mechanical fatigue and thermal properties. Silicon carbide (SiC) is a well-known wide-bandgap semiconductor, the adoption of which in commercial products is experiencing exponential growth, especially in the power electronics arena. While SiC MEMS have been around for decades, in this Special Issue, we seek to both present an overview of the devices that have been demonstrated to date and bring new technologies and points of progress in the MEMS processing field to the forefront. Thus, this Special Issue seeks to showcase research papers, short communications, and review articles that focus on the following: (1) novel designs, fabrication, control, and modeling of SiC MEMS and NEMS based on all kinds of actuation mechanisms; (2) new developments in applying SiC MEMS and NEMS in consumer electronics, optical communications, industry, medicine, agriculture, space, and defense.

Prof. Dr. Stephen Edward Saddow
Dr. Brenda L. VanMil
Dr. Benoit Hamelin
Guest Editors

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Keywords

  • SiC microsystems
  • SiC MEMS
  • SiC biomedical devices
  • SiC micromachines
  • SiC microsensors

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Published Papers (4 papers)

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Research

9 pages, 1798 KiB  
Article
A High-Density 4H-SiC MOSFET Based on a Buried Field Limiting Ring with Low Qgd and Ron
by Wenrong Cui, Jianbin Guo, Hang Xu and David Wei Zhang
Micromachines 2025, 16(4), 447; https://doi.org/10.3390/mi16040447 - 10 Apr 2025
Viewed by 437
Abstract
In this study, we propose an optimized shield gate trench 4H-SiC structure with effective gate oxide protection. The proposed device has a split trench with a P+ shield region, and the P+ shield is grounded by the middle deep trench. Our simulation results [...] Read more.
In this study, we propose an optimized shield gate trench 4H-SiC structure with effective gate oxide protection. The proposed device has a split trench with a P+ shield region, and the P+ shield is grounded by the middle deep trench. Our simulation results show that the peak electric field near the gate oxide is almost completely suppressed. Compared with a conventional P+ shield device, our proposed structure achieves a 78% reduction in the Qgd and a 108% increase in the FoM (figure of merit) simultaneously. Additionally, it is estimated that the device cell pitch can be reduced to 1.8 μm with a Ron below 0.94 mΩ·cm2, in theory. These demonstrated device performance metrics, as well as its simple structure and good compatibility, make our proposed SiC MOSFET highly attractive for future high-performance applications. Full article
(This article belongs to the Special Issue SiC Based Miniaturized Devices, 3rd Edition)
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11 pages, 1623 KiB  
Article
Analyzing the Impact of Gate Oxide Screening on Interface Trap Density in SiC Power MOSFETs Using a Novel Temperature-Triggered Method
by Monikuntala Bhattacharya, Michael Jin, Hengyu Yu, Shiva Houshmand, Jiashu Qian, Marvin H. White, Atsushi Shimbori and Anant K. Agarwal
Micromachines 2025, 16(4), 371; https://doi.org/10.3390/mi16040371 - 25 Mar 2025
Viewed by 436
Abstract
This work introduces a novel temperature-triggered threshold voltage shift (T3VS) method to study the energy-dependent Dit distribution close to the conduction band edge in commercial 1.2 kV 4H-SiC MOSFETs with planar and trench gate structures. Traditional Dit extraction methodologies [...] Read more.
This work introduces a novel temperature-triggered threshold voltage shift (T3VS) method to study the energy-dependent Dit distribution close to the conduction band edge in commercial 1.2 kV 4H-SiC MOSFETs with planar and trench gate structures. Traditional Dit extraction methodologies are complicated and require sophisticated instrumentation, complex analysis, and/or prior information related to the device design and fabrication, which is generally unavailable to the consumers of commercial devices. This methodology merely utilizes the transfer characteristics of the device and is straightforward to implement. The Dit analysis using the T3VS method shows that trench devices have significantly lower Dit in comparison to the planar devices, making them more reliable and efficient in practical applications. Furthermore, this study examines the impact of a novel room temperature gate oxide screening methodology called screening with adjustment pulse (SWAP) on the Dit distribution in commercial planar MOSFETs, utilizing the proposed T3VS method. The result demonstrates that the SWAP technique is aggressive in nature and can introduce new defect states close to the conduction band edge. Hence, additional care is needed during screening optimization to ensure the reliability and usability of the screened devices in the consequent applications. Full article
(This article belongs to the Special Issue SiC Based Miniaturized Devices, 3rd Edition)
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15 pages, 6026 KiB  
Article
A 3.3 kV SiC Semi-Superjunction MOSFET with Trench Sidewall Implantations
by Marco Boccarossa, Kyrylo Melnyk, Arne Benjamin Renz, Peter Michael Gammon, Viren Kotagama, Vishal Ajit Shah, Luca Maresca, Andrea Irace and Marina Antoniou
Micromachines 2025, 16(2), 188; https://doi.org/10.3390/mi16020188 - 6 Feb 2025
Viewed by 924
Abstract
Superjunction (SJ) technology offers a promising solution to the challenges faced by silicon carbide (SiC) Metal Oxide Semiconductor Field-Effect Transistors (MOSFETs) operating at high voltages (>3 kV). However, the fabrication of SJ devices presents significant challenges due to fabrication complexity. This paper presents [...] Read more.
Superjunction (SJ) technology offers a promising solution to the challenges faced by silicon carbide (SiC) Metal Oxide Semiconductor Field-Effect Transistors (MOSFETs) operating at high voltages (>3 kV). However, the fabrication of SJ devices presents significant challenges due to fabrication complexity. This paper presents a comprehensive analysis of a feasible and easy-to-fabricate semi-superjunction (SSJ) design for 3.3 kV SiC MOSFETs. The proposed approach utilizes trench etching and sidewall implantation, with a tilted trench to facilitate the implantation process. Through Technology Computer-Aided Design (TCAD) simulations, we investigate the effects of the p-type sidewall on the charge balance and how it affects key performance characteristics, such as breakdown voltage (BV) and on-state resistance (RDS-ON). In particular, both planar gate (PSSJ) and trench gate (TSSJ) designs are simulated to evaluate their performance improvements over conventional planar MOSFETs. The PSSJ design achieves a 2.5% increase in BV and a 48.7% reduction in RDS-ON, while the TSSJ design further optimizes these trade-offs, with a 3.1% improvement in BV and a significant 64.8% reduction in RDS-ON compared to the benchmark. These results underscore the potential of tilted trench SSJ designs to significantly enhance the performance of SiC SSJ MOSFETs for high-voltage power electronics while simplifying fabrication and lowering costs. Full article
(This article belongs to the Special Issue SiC Based Miniaturized Devices, 3rd Edition)
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15 pages, 3846 KiB  
Article
Model of Quality Factor for (111) 3C-SiC Double-Clamped Beams
by Angela Garofalo, Annamaria Muoio, Sergio Sapienza, Matteo Ferri, Luca Belsito, Alberto Roncaglia and Francesco La Via
Micromachines 2025, 16(2), 148; https://doi.org/10.3390/mi16020148 - 28 Jan 2025
Viewed by 2465
Abstract
Silicon carbide (SiC) is an interesting semiconductor for MEMS devices. The high-value Young’s modulus of silicon carbide facilitates high frequencies and quality (Q) factors in resonant devices built with double-clamped beams. The aim of this work is to achieve the determination and modeling [...] Read more.
Silicon carbide (SiC) is an interesting semiconductor for MEMS devices. The high-value Young’s modulus of silicon carbide facilitates high frequencies and quality (Q) factors in resonant devices built with double-clamped beams. The aim of this work is to achieve the determination and modeling of the Q-Factor for samples of micromachined 3C-SiC film on <111> silicon substrates. This study demonstrates that the experimental datasets created by Romero, integrated with the thicker samples reported in this work, fit the theoretical model presented in the paper. Furthermore, the influence of the crystallographic defects present at the 3C-SiC/Si interface on the Q-factor can be observed both in the analytical model of Romero and in the numerical model present in COMSOL. 3C-SiC layers with thickness greater than 600 nm are needed to achieve an ideal performance from double-clamped beams. Full article
(This article belongs to the Special Issue SiC Based Miniaturized Devices, 3rd Edition)
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