High-Performance Embedded Systems

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 15 August 2024 | Viewed by 2265

Special Issue Editors


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Guest Editor
Department of Electronic Engineering, University of Rome Tor Vergata, 00133 Rome, Italy
Interests: FPGA; ASIC; machine learning; digital signal processing; embedded systems
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E-Mail Website
Guest Editor
Department of Electronic Engineering, University of Rome “Tor Vergata”, 00133 Rome, Italy
Interests: digital signal processing; machine learning; digital architectures; digital electronics for space

Special Issue Information

Dear Colleagues,

Non-functional constraints such as execution time, memory capacity, and energy consumption are a significant challenge for designers in the field of embedded systems. New applications are being proposed that integrate an increasing variety of functionality into everyday objects, imposing several additional requirements on embedded system designers, as follows:

  • Increased computing workloads, elaborating and fusing multiple sensor data, even by advanced machine learning techniques;
  • Reduced power consumption, allowing for smaller batteries and renewable power sources;
  • Faster interaction with the environment, necessitating a high performance in data processing that is often reached by hardware implementations.

As an example, the physical dimensions and power consumption of embedded systems for the Internet of Things are frequently of interest. However, the need for small systems does not prevent higher demands for functionality and speed. Simultaneously, designers must respond to a growing need for more powerful edge systems capable of managing vast fleets of connected devices while running resource-intensive algorithms such as sensor fusion, feedback control, and machine learning. Developers must grasp the nature of embedded systems architectures and strategies for extracting their full performance potential in this environment, as well as embedded design in general.

This Special Issue invites researchers to contribute original research, case studies, and reviews that address topics related to designs and applications of high-performance digital embedded systems.

The topics relevant for this Special Issue include (but are not limited to):

  • Low-power IoT applications;
  • Embedded FPGA and SoC implementations;
  • Embedded ASIC implementations;
  • Machine learning on the Edge;
  • Efficient data-processing algorithms

Dr. Sergio Spanò
Prof. Dr. Gian Carlo Cardarilli
Guest Editors

Manuscript Submission Information

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Keywords

  • embedded systems
  • digital electronics
  • low-power
  • IoT
  • edge computing
  • FPGA
  • ASIC
  • systems-on-chips
  • machine learning

Published Papers (2 papers)

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Research

27 pages, 4343 KiB  
Article
No Pain Device: Empowering Personal Safety with an Artificial Intelligence-Based Nonviolence Embedded System
by Agostino Giorgio
Electronics 2024, 13(9), 1766; https://doi.org/10.3390/electronics13091766 - 2 May 2024
Viewed by 513
Abstract
This paper presents the development of a novel anti-violence device titled “no pAIn” (an acronym for Never Oppressed Protected by Artificial Intelligence Nonviolence system), which harnesses the power of artificial intelligence (AI). Primarily designed to combat violence against women, the device offers personal [...] Read more.
This paper presents the development of a novel anti-violence device titled “no pAIn” (an acronym for Never Oppressed Protected by Artificial Intelligence Nonviolence system), which harnesses the power of artificial intelligence (AI). Primarily designed to combat violence against women, the device offers personal safety benefits for individuals across diverse demographics. Operating autonomously, it necessitates no user interaction post-activation. The AI engine conducts real-time speech recognition and effectively discerns genuine instances of aggression from non-violent disputes or conversations. Facilitated by its Internet connectivity, in the event of detected aggression, the device promptly issues assistance requests with real-time precise geolocation tracking to predetermined recipients for immediate assistance. Its compact size enables discreet concealment within commonplace items like candy wrappers, purpose-built casings, or wearable accessories. The device is battery-operated. The prototype was developed using a microcontroller board (Arduino Nano RP2040 Connect), incorporating an omnidirectional microphone and Wi-Fi module, all at a remarkably low cost. Subsequent functionality testing, performed in debug mode using the Arduino IDE serial monitor, yielded successful results. The AI engine exhibited exceptional accuracy in word recognition, complemented by a robust logic implementation, rendering the device highly reliable in discerning genuine instances of aggression from non-violent scenarios. Full article
(This article belongs to the Special Issue High-Performance Embedded Systems)
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15 pages, 1322 KiB  
Article
Fault-Tolerant Hardware Acceleration for High-Performance Edge-Computing Nodes
by Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Marco Angioli, Saeid Jamili and Mauro Olivieri
Electronics 2023, 12(17), 3574; https://doi.org/10.3390/electronics12173574 - 24 Aug 2023
Cited by 3 | Viewed by 1082
Abstract
High-performance embedded systems with powerful processors, specialized hardware accelerators, and advanced software techniques are all key technologies driving the growth of the IoT. By combining hardware and software techniques, it is possible to increase the overall reliability and safety of these systems by [...] Read more.
High-performance embedded systems with powerful processors, specialized hardware accelerators, and advanced software techniques are all key technologies driving the growth of the IoT. By combining hardware and software techniques, it is possible to increase the overall reliability and safety of these systems by designing embedded architectures that can continue to function correctly in the event of a failure or malfunction. In this work, we fully investigate the integration of a configurable hardware vector acceleration unit in the fault-tolerant RISC-V Klessydra-fT03 soft core, introducing two different redundant vector co-processors coupled with the Interleaved-Multi-Threading paradigm on which the microprocessor is based. We then illustrate the pros and cons of both approaches, comparing their impacts on performance and hardware utilization with their vulnerability, presenting a quantitative large-fault-injection simulation analysis on typical vector computing benchmarks, and comparing and classifying the obtained results. The results demonstrate, under specific conditions, that it is possible to add a hardware co-processor to a fault-tolerant microprocessor, improving performance without degrading safety and reliability. Full article
(This article belongs to the Special Issue High-Performance Embedded Systems)
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