Selected Papers from XXXVIII Conference on Design of Circuits and Integrated Systems—DCIS 2023

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 15 September 2024 | Viewed by 1127

Special Issue Editors


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Guest Editor
Departamento de Tecnología Electrónica, Universidad de Málaga, ETSI Telecomunicación, 29071 Málaga, Spain
Interests: ad hoc networks; manets; falling detection; wearables; sensors; wireless sensor networks; WSN

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Guest Editor
Departamento Tecnologia Electronica, ETSI Telecomunicacion, University of Málaga, 29010 Málaga, Spain
Interests: ASIC; FPGA; microelectronic design; hardware processing in artificial vision

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Guest Editor
Department of Electrical, Electronic and Communications Engineering, Public University of Navarra, Campus Arrosadia, 31006 Pamplona, Spain
Interests: microelectronic design; wireless communications, signal processing and instrumentation
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Special Issue Information

Dear Colleagues,

The XXXVIII Conference on Design of Circuits and Integrated Systems (DCIS 2023) will be held on the 15–17 November 2023, Málaga, Spain. DCIS 2023 aims to provide a platform for researchers in the highly active fields of micro- and nano-electronic circuits and integrated systems. It will provide an excellent forum to present and discuss works on the emerging challenges offered by technology in the areas of modelling, design, implementation and the testing of devices, circuits and systems. Authors of accepted papers are invited to submit the extended versions (at least 50% extension for the submissions) of their original papers and contributions.

The topics of interest include, but are not limited to, the following:

  • Analog/mixed-signal circuits and systems;
  • Design of power-, thermal- and variability-aware circuits and systems;
  • New computing and hardware paradigms (machine learning, approximate and stochastic computing, bio-inspired computing, cognitive computing, etc.);
  • Circuits and systems in advanced and emerging technologies (FDSOI, 3DICs, NVRAM, NWFET, silicon photonics, quantum, etc.);
  • Reconfigurable devices and systems (FPGA, NVRAM, memristors, etc.);
  • Embedded and high-performance computing;
  • EDA tools and methods;
  • Industrial and power electronics;
  • Sustainable computing and systems;
  • Sensory circuits and systems;
  • Energy management and harvesting;
  • Test, fault tolerance, reliability and modelling;
  • Radiofrequency ICs (5G, 6G, RFID, NFC, etc.);
  • On-chip and off-chip interconnects;
  • IoT and applications (industry 4.0, personalized healthcare, etc.);
  • Hardware security;
  • Educational Methods for Electronics.

Dr. Francisco Javier González-Cañete
Dr. Martín González García
Prof. Dr. Antonio Lopez-Martin
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • analog circuits
  • integrated circuits
  • mixed signals
  • signal processing
  • system-on-chip

Published Papers (1 paper)

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Research

21 pages, 935 KiB  
Article
Enabling Efficient On-Edge Spiking Neural Network Acceleration with Highly Flexible FPGA Architectures
by Samuel López-Asunción and Pablo Ituero
Electronics 2024, 13(6), 1074; https://doi.org/10.3390/electronics13061074 - 14 Mar 2024
Viewed by 729
Abstract
Spiking neural networks (SNNs) promise to perform tasks currently performed by classical artificial neural networks (ANNs) faster, in smaller footprints, and using less energy. Neuromorphic processors are set out to revolutionize computing at a large scale, but the move to edge-computing applications calls [...] Read more.
Spiking neural networks (SNNs) promise to perform tasks currently performed by classical artificial neural networks (ANNs) faster, in smaller footprints, and using less energy. Neuromorphic processors are set out to revolutionize computing at a large scale, but the move to edge-computing applications calls for finely-tuned custom implementations to keep pushing towards more efficient systems. To that end, we examined the architectural design space for executing spiking neuron models on FPGA platforms, focusing on achieving ultra-low area and power consumption. This work presents an efficient clock-driven spiking neuron architecture used for the implementation of both fully-connected cores and 2D convolutional cores, which rely on deep pipelines for synaptic processing and distributed memory for weight and neuron states. With them, we developed an accelerator for an SNN version of the LeNet-5 network trained on the MNIST dataset. At around 5.5 slices/neuron and only 348 mW, it is able to use 33% less area and four times less power per neuron as current state-of-the-art implementations while keeping low simulation step times. Full article
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