Evolutionary Hardware-Software Codesign Based on FPGA
A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".
Deadline for manuscript submissions: closed (15 May 2025) | Viewed by 291
Special Issue Editors
Interests: FPGA; TinyML; hardware accelerators; hardware-software codesign
Interests: computer architecture; machine learning; image and digital signal processing
Special Issues, Collections and Topics in MDPI journals
Special Issue Information
Dear Colleagues,
FPGAs, including their various levels of application, from IoT to HPC, are currently involved in continuously updating characteristics and features. They have thus become the technology of choice in many final designs, with the potential for new applications arising.
Recent generations of FPGAs include embedded processors and high-speed memories within the same device, facilitating the handling of sequential tasks without neglecting the advantages of the FPGA architecture and opening new possibilities for developing hardware accelerators, AI applications, database servers, and more.
New tools and emerging technologies for efficient hardware–software codesign between the processor and the FPGA hardware are needed to meet growing demands for performance, flexibility, and efficiency, which essential for engineers to create, test, and implement these complex designs.
This Special Issue, entitled “Evolutionary Hardware-Software Codesign Based on FPGA”, is intended to present the latest advances in applications, tools, and designs benefiting from this hybrid technology, including (but not limited to):
- Hardware–software codesign for FPGA-based acceleration;
- System and software for FPGA accelerator compilation;
- High-level abstractions and tools for FPGAs;
- AI and ML application based on FPGA implementations;
- RISC-V-embedded cores acceleration;
- Programmable neuromorphic computing architectures using FPGAs;
- Implementation of novel applications based on FPGAs;
- FPGA Implementation of deep neural networks.
Dr. Erez Manor
Prof. Shlomo Greenberg
Guest Editors
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Keywords
- FPGA architecture
- FPGA application
- hardware acceleration
- embedded processor
- hardware–software codesign
- neuromorphic computing
- machine learning
- deep neural networks
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