Challenges and Future Trends of In-Memory Computing in Micro-Chips

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Microelectronics".

Deadline for manuscript submissions: 15 June 2026 | Viewed by 14

Special Issue Editors


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Guest Editor
Department of Electrical Engineering, Stanford University, Stanford, CA 94305, USA
Interests: memory-centric AI accelerator and AI simulator; memory compiler; in-memory computing (IMC) architecture design; emerging memory technology

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Guest Editor
Electrical Engineering and Computer Science, the University of Michigan, Ann Arbor, MI 48109, USA
Interests: memory devices and memory-centric computing systems; resistive random-access memory (RRAM) and memristors; compute-in-memory (CIM) systems; neuromorphic circuits and systems; novel transistor devices; electrical transport in low-dimensional systems

Special Issue Information

Dear Colleagues,

The explosive growth of AI, edge computing and data-intensive applications has intensified the demand for high-performance, energy-efficient computing hardware. Conventional von Neumann architectures suffer from the memory wall, where frequent data transfer between memory and processing units dominates latency and power consumption. In-memory computing (IMC) offers a promising solution by performing computation within memory arrays, reducing data movement and enabling massive parallelism.

This Special Issue focuses on the critical challenges that must be addressed for IMC to transition from laboratory prototypes to mainstream micro-chip deployments. Key issues include device variability, limited precision, endurance and retention constraints, peripheral circuit overhead, interface compatibility, programmability and the lack of standardized benchmarking. The scope spans device, circuit, architecture and system integration levels, covering both analog and digital IMC approaches across emerging memory technologies such as RRAM-, PCM-, FeFET- and SRAM-based CIM.

Beyond current hurdles, the issue also explores future trends shaping the IMC roadmap: 3D integration, heterogeneous memory-compute fabrics, algorithm–hardware co-design, design automation and application-specific optimization for AI, IoT and edge computing. By gathering interdisciplinary perspectives, this collection aims to guide scalable, energy-efficient and manufacturable IMC solutions for next-generation computing platforms.

Dr. Xinxin Wang
Prof. Dr. Wei Lu
Guest Editors

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Keywords

  • in-memory computing (IMC)
  • compute-in-memory (CIM)
  • process-in-memory (PIM)
  • analog CIM
  • digital CIM
  • mixed signal computing
  • neuromorphic computing
  • brain-inspired computing
  • peripheral circuit design
  • device variability and reliability
  • 3D integration
  • algorithm–hardware co-design
  • design automation for IMC
  • AI acceleration
  • edge AI and IoT hardware

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