Improved Properties of Post-Deposition Annealed Ga₂O₃/SiC and Ga₂O₃/Al₂O₃/SiC Back-Gate Transistors Fabricated by Radio Frequency Sputtering

Abstract

The high breakdown electric field, n-type doping capability, availability of high-quality substrates, and high Baliga’s figure of merit of Ga₂O₃ demonstrate its potential as a next-generation power semiconductor material. However, the thermal conductivity of Ga₂O₃ is lower than that of other wide-bandgap materials, resulting in the degradation of the electrical performance and reduced reliability of devices. The heterostructure formation on substrates with high thermal conductivity has been noted to facilitate heat dissipation in devices. In this work, Ga₂O₃ thin films with an Al₂O₃ interlayer were deposited on SiC substrates by radio frequency sputtering. Post-deposition annealing was performed at 900 °C for 1 h to crystallize the Ga₂O₃ thin films. The Auger electron spectroscopy depth profiles revealed the interdiffusion of the Ga and Al atoms at the Ga₂O₃/Al₂O₃ interface after annealing. The X-ray diffraction (XRD) results displayed improved crystallinity after annealing and adding the Al₂O₃ interlayer. The crystallite size increased from 5.72 to 8.09 nm as calculated by the Scherrer equation using the full width at half maximum (FWHM). The carrier mobility was enhanced from 5.31 to 28.39 cm² V⁻¹ s⁻¹ in the annealed Ga₂O₃ thin films on Al₂O₃/SiC. The transfer and output characteristics of the Ga₂O₃/SiC and Ga₂O₃/Al₂O₃/SiC back-gate transistors reflect the trend of the XRD and Hall measurement results. Therefore, this work demonstrated that the physical and electrical properties of the Ga₂O₃/SiC back-gate transistors can be improved by post-deposition annealing and the introduction of an Al₂O₃ interlayer.

1. Introduction

Although Si-based semiconductors have been widely used in power electronic devices, the narrow bandgap of Si (1.1 eV) limits its applications owing to its instability in harsh environments, such as high temperatures [1,2]. Wide-bandgap semiconductors, such as GaN, 4H-SiC, and Ga₂O₃, are important materials for high-frequency, -power, and -temperature devices [2,3,4]. Among these, Ga₂O₃ has a bandgap (~4.9 eV) that is significantly higher than that of 4H-SiC (~3.3 eV) and GaN (~3.4 eV) [5,6,7]. Owing to its high breakdown electric field (~8 MV cm⁻¹), n-type doping capability, availability of high-quality substrates, and high Baliga’s figure of merit (~3400), Ga₂O₃ is attracting extensive attention as a next-generation power semiconductor material [5,6,8,9,10,11].

Despite the advantages of Ga₂O₃, its thermal conductivity (11–27 Wm⁻¹ K⁻¹) is lower than that of other wide-bandgap materials, such as SiC (370 Wm⁻¹ K⁻¹) and GaN (253 Wm⁻¹ K⁻¹). The heat generated in Ga₂O₃ may thus increase the lattice temperature, thereby affecting the carrier mobility in current devices, potentially resulting in critical degradation of electrical performance and device reliability [10,11]. For high-power and -frequency applications, thermal management is an inevitable consideration for reducing device degradation [11,12]. By forming heterostructures on substrates with high thermal conductivity, such as 4H-SiC, heat dissipation in devices can be facilitated [10,13].

For ε-Ga₂O₃ and ZnO, which have similar crystal structures, previous studies showed that an amorphous Al₂O₃ interface buffer layer can improve the crystallinity of the thin films [14,15]. Moreover, as Ga₂O₃ has an ultra-wide bandgap, few gate dielectric materials can achieve conduction band offsets of over 1 eV, which is favorable for metal-oxide-semiconductor structures [16]. Recently, materials, including Al₂O₃ and its alloys, are being broadly investigated for use as a gate or buffer oxide layers in metal-oxide-semiconductor field-effect transistors [16,17,18,19,20].

Channel control of MOSFETs has been improved by adopting various gate structures. Multi-gate MOSFETs (MGMOS), as well as gate-all-around (GAA) transistors, are investigated to increase the gate control and the integration density [21]. The double-gate structure consisting of top and back gate also improves the gate controllability like short channel effects [22]. However, there are not many studies on Ga₂O₃ transistors that investigate the effect of multi-gate including back-gate transistors. Therefore, it is necessary to study the characteristics and improve the performance of Ga₂O₃ transistors using back gates.

In this work, we deposited Ga₂O₃ and Al₂O₃ films on n-type 4H-SiC substrates by radio frequency (RF) sputtering. Post-deposition annealing at 900 °C was performed to crystallize the Ga₂O₃ thin films. The structural and electrical characteristics of the films were analyzed by Auger electron spectroscopy (AES), X-ray diffraction (XRD), Hall measurements, and current–voltage (I–V) measurements.

2. Experimental Details

Figure 1a,b show schematics of the fabricated structures, comprising Ga₂O₃ on SiC and Ga₂O₃ on Al₂O₃/SiC, respectively. N-type 4H-SiC (0004) substrates with a doping concentration of 1 × 10¹⁹ cm⁻³ were cleaned using acetone, methanol, and deionized water for 15 min each. The native oxide layer was stripped using a buffered oxide etch with a 30:1 ratio of HF:NH₄F for 5 min. Substrate back-side metal in the form of a 100 nm thick Ni layer was deposited by an electron beam (E-beam) evaporator (KVE-T8065, Korea Vacuum Co., Ltd., Daegu, Republic of Korea) with a working pressure of 5 × 10⁻⁴ Pa. Ohmic contacts were formed at the 4H-SiC/Ni interface by rapid thermal annealing at 1000 °C for 60 s under an N₂ atmosphere. Ga₂O₃- and Al₂O₃-sintered ceramic targets (Toshima Manufacturing Co., Ltd., Saitama, Japan. purity of 99.99%) were used for RF sputtering. In Figure 1a, Ga₂O₃ films were deposited to a thickness of ~350 nm on cleaned N-SiC substrates for 200 min. In Figure 1b, Al₂O₃ (~100 nm, 200 min) and Ga₂O₃ (~350 nm, 200 min) films were deposited on the substrates. The sputtering chamber base and working pressures were maintained at 6 × 10⁻⁴ and 3 Pa, respectively. Sputtering was performed at room temperature (25 °C), with no external substrate heating, 120 W sputtering power. and Ar gas flow rate of 4 sccm. Thin films were subsequently annealed at 900 °C for 60 min under an N₂ atmosphere using a tube furnace at 101.325 × 10³ Pa. The top Ti (20 nm)/Au (100 nm) electrodes were deposited on the Ga₂O₃ thin films using an E-beam evaporator. The distance between the source and drain was 100 μm.

3. Characterization and Instrumentation

AES depth profiling was conducted using a PHI 710 scanning Auger probe (ULVAC-PHI, Kanagawa, Japan)with electron beam energy of 5 kV, target current of 5 nA, and a SiO₂ sputtering rate of 29.4 nm·min⁻¹ to confirm the depth-dependent atomic concentration of the samples. The crystallinity and orientations of the Ga₂O₃ thin films were examined using XRD (Dmax2500/PC, Rigaku, Tokyo, Japan) by 2θ scanning with CuKα radiation (λ = 0.15406 nm) at 200 mA and 40 kV. Electrical properties of the Ga₂O₃ thin films, including mobility, charge carrier concentrations, and resistivity, were analyzed by Hall effect measurements (HMS-5000, Ecopia Corporation, Anyang, Republic of Korea). I–V characteristics of the devices were measured by a Keithley 4200-SCS (Cleveland, OH, USA) parameter analyzer. Electrical measurements were carried out on the devices by sweeping the gate-to-source voltage (V_GS) from −6 to +2 V and drain-to-source voltage (V_DS) from 0 to +10 V.

4. Results and Discussion

The AES measurements were carried out to obtain a depth profile of Ga, Al, O, Si, and C elements in order to understand their diffusion behaviors at the interface during annealing. Figure 2a–d show depth profiles of the as-deposited and annealed Ga₂O₃/SiC and Ga₂O₃/Al₂O₃/SiC structures. In the Ga₂O₃/SiC structures (Figure 2a,c), sharp interfaces were observed between the Ga₂O₃ thin films and SiC substrates. Meanwhile, in the Ga₂O₃/Al₂O₃/SiC structures (Figure 2b,d), Al, O, Si, and C atoms had not diffused into the opposite SiC substrates or Al₂O₃ films. However, gradient changes of Ga and Al atomic concentrations at the Ga₂O₃/Al₂O₃ interface indicate the interdiffusion of Ga and Al atoms [23,24]. Therefore, (Al_xGa_1−x)₂O₃ ternary compounds at the Ga₂O₃/Al₂O₃ interfaces were formed during the annealing of the devices.

In order to investigate the surface of Ga₂O₃ films, atomic force microscopy (AFM) was performed with a scanned area of 5 × 5 μm². Figure 3 shows morphological AFM 2D images of as-deposited and annealed Ga₂O₃ films on SiC and Al₂O₃. The root mean square (rms) roughness was (a) 0.821, (b) 0.845, (c) 1.324, and (d) 1.359 nm, respectively. The result shows that the surfaces of the annealed samples are rougher than the as deposited sample, and thus the annealing treatment may provide energy to atoms in the films and induce the recrystallization of Ga₂O₃ films.

Figure 4 illustrates the scanning electron microscopy (SEM) images of as deposited and annealed Ga₂O₃ films on SiC and Al₂O₃, respectively. It can be clearly seen that larger crystals were formed after the annealing process at 900 °C. Moreover, as shown in Figure 4c,d, annealed Ga₂O₃ thin films possess well-defined grain boundaries which may affect the Hall mobility of devices.

The XRD 2θ–θ patterns at θ of 10–90° of the RF-sputtered Ga₂O₃ thin films with and without an Al₂O₃ interlayer are shown in Figure 5. For the as-deposited samples, only strong diffraction peaks of the 4H-SiC (0004) substrates were noted [25,26]. The absence of any Ga₂O₃ peaks indicates that the as-deposited thin films are in an amorphous state [27]. After annealing at 900 °C, three main peaks were noted at 30.36°, 64.36°, and 35.48°, corresponding to Ga₂O₃(–401) [28], Ga₂O₃(020) [9,29], and 4H-SiC(0004), respectively. Furthermore, diffraction peaks of Al₂O₃ were not observed in the Ga₂O₃/Al₂O₃/SiC structure, indicating that the deposited Al₂O₃ films remained amorphous, even after annealing at 900 °C. This can be attributed to the low annealing temperature in this experiment, which, according to the literature, is too low to cause a phase change from amorphous to crystalline Al₂O₃ [30]. The presence of the lattice mismatch buffering Al₂O₃ interlayer, along with any (Al_xGa_1−x)₂O₃ formed at the Ga₂O₃/Al₂O₃ interface, resulted in enhanced diffraction peak intensities from the (–401) and (020) Ga₂O₃ crystal faces [14,15,31,32], which may connect to increased crystallite size.

The full width at half maximum (FWHM) and crystallite sizes were extracted from the (020) peaks to compare the effects of the Al₂O₃ interlayer on the crystallinity of the annealed Ga₂O₃ thin films. Figure 6 shows XRD patterns of the (020) peaks and FWHM values of the annealed Ga₂O₃ thin films. The Scherrer equation (Equation (1)) was used to calculate the crystallite sizes:

$$FWHM=\frac{K\lambda }{L\cos \theta }$$

(1)

where K is the shape factor (0.9), L is the crystallite sizes, θ is the Bragg diffraction angle [2], and λ is the wavelength of the CuKα X-ray source (0.15406 nm). The crystallite size of the Ga₂O₃ thin films tends to increase from 5.72 to 8.09 nm with the addition of the Al₂O₃ interlayer. The crystallite size is inversely proportional to the number of grain boundaries, which are a major factor in carrier mobility degradation [33]. This suggests that the samples with the Al₂O₃ interlayer may exhibit improved electrical characteristics.

Hall measurements of the Ga₂O₃ thin films were performed (at room temperature) to examine the influence of annealing and the presence or absence of an Al₂O₃ interlayer on the electrical properties of the sample devices. Figure 7 shows the carrier concentration, mobility, and resistivity of the different Ga₂O₃ thin films, according to whether they had been annealed after deposition or not, and relating to the device structure, with or without an Al₂O₃ interlayer. After annealing of the thin films, the Hall mobility increased, indicating the effect of Ga₂O₃ crystallization on the Hall mobility. The annealed Ga₂O₃/Al₂O₃/SiC devices exhibited the highest charge carrier concentration and mobility (4.52 × 10¹⁴ cm⁻³ and 25.65 cm² V⁻¹ s⁻¹, respectively) and lowest resistivity (19.86 × 10³ Ωm). As previously hypothesized, the improved Hall mobility can be attributed to the larger crystallite size due to the reduction in grain boundary scattering [34,35,36].

The back-gate transistors, as shown in Figure 1a,b, have a source–drain spacing of 100 μm with highly doped SiC/Ni back gates. Figure 8a,b show the electrical transfer characteristics of the as-deposited and annealed Ga₂O₃/SiC and Ga₂O₃/Al₂O₃/SiC back-gate transistors. The subthreshold swing (SS), defined by the V_GS variations required for the ten-fold increase in I_DS, is given by the maximum slope in the transfer curve in a logarithmic scale [37] and can be extracted by (Equation (2)):

$$SS=\frac{{dV}_{GS}}{d\left(\log I_{DS}\right)}$$

(2)

The on and off currents, on/off ratio (V_GS = ±6 V), and SS of the devices are shown in

Table 1. Electrical characteristics of fabricated back-gate transistors.

	As-Deposited		Annealed at 900 °C
	Ga2O3/SiC	Ga2O3/Al2O3/SiC	Ga2O3/SiC	Ga2O3/Al2O3/SiC
On current [A] (+6 V)	8.03 × 10−10	1.19 × 10−11	2.53 × 10−2	2.27 × 10−2
Off current [A] (−6 V)	−2.14 × 10−11	−2.78 × 10−12	−1.73 × 10−4	−2.75 × 10−5
On/off ratio	3.74 × 10	4.29	1.46 × 102	8.27 × 102
SS (mV·dec−1)	233	234	182	154

. The annealed Ga₂O₃/Al₂O₃/SiC transistors have the highest on/off ratio of 8.27 × 10² and the lowest SS of 154 mV·dec⁻¹.

The I_DS-V_DS output curves were measured by sweeping the V_DS from 0 to +10 V, whereas V_GS was biased from −6 to +2 V. Figure 9a–d show the electrical output characteristics of the back-gate transistors. The transistors with the as-deposited Ga₂O₃ films exhibited a maximum I_DS below 10⁻⁹ A, whereas the transistors with annealed Ga₂O₃ films featured currents over 10⁻⁴ A. Annealed samples with an Al₂O₃ layer exhibited the highest carrier mobility, resulting in the highest on-current level. This result is mainly attributed to the improved crystallinity of the Ga₂O₃ films by annealing [38] and the addition of the Al₂O₃ interlayer [14,15,31,32]. The larger crystallite grains, and thus enhanced crystallinity, apparently mitigate the parasitic resistance [39] and grain boundary scattering of thin films [33,36] of the Ga₂O₃ thin films, resulting in improved device performance.

5. Conclusions

In this study, Ga₂O₃ and Al₂O₃ thin films were deposited on 4H-SiC substrates using RF sputtering to compare the effects of an Al₂O₃ interlayer on the morphological and electrical properties of the manufactured thin films and resulting devices. Through AES depth profiling, we confirmed that Al and Ga atoms interdiffusion at the Ga₂O₃/Al₂O₃ interface during annealing at 900 °C. XRD results brought to light an improved crystallinity of the Ga₂O₃ thin films after annealing and adding the Al₂O₃ layer. Annealed Ga₂O₃ film on Al₂O₃/SiC displayed the highest carrier concentration and mobility of 4.52 × 10¹⁴ cm⁻³ and 25.65 cm² V⁻¹ s⁻¹, respectively, as well as the lowest resistivity of 19.86 × 10³ Ω·m. These enhanced electrical properties of the annealed Ga₂O₃ on Al₂O₃/SiC affected the transfer and output characteristics, resulting in the highest on/off ratio (8.27 × 10²) and lowest SS (154 mV·dec⁻¹). Thus, introducing an Al₂O₃ interlayer in RF-sputtered Ga₂O₃/SiC back-gate transistors improved the electrical characteristics of the devices.