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Article

Exploration of FPGA-Based Hardware Designs for QR Decomposition for Solving Stiff ODE Numerical Methods Using the HARP Hybrid Architecture

1
Institute of Mathematics and Computer Science, University of São Paulo, São Carlos 13566-590, Brazil
2
Department of Informatics Engineering, Faculty of Engineering, University of Porto and INESC TEC, 4200-465 Porto, Portugal
3
INESC-ID, 1000-029 Lisboa, Portugal
*
Author to whom correspondence should be addressed.
These authors contributed equally to this work.
Electronics 2020, 9(5), 843; https://doi.org/10.3390/electronics9050843
Received: 10 April 2020 / Revised: 12 May 2020 / Accepted: 14 May 2020 / Published: 19 May 2020
(This article belongs to the Special Issue Recent Advances in Field-Programmable Logic and Applications)
In this article, we focus on the acceleration of a chemical reaction simulation that relies on a system of stiff ordinary differential equation (ODEs) targeting heterogeneous computing systems with CPUs and field-programmable gate arrays (FPGAs). Specifically, we target an essential kernel of the coupled chemistry aerosol-tracer transport model to the Brazilian developments on the regional atmospheric modeling system (CCATT-BRAMS). We focus on a linear solve step using the QR factorization based on the modified Gram-Schmidt method as the basis of the ODE solver in this application. We target Intel hardware accelerator research program (HARP) architecture with the OpenCL programming environment for these early experiments. Our design exploration reveals a hardware design that is up to 4 times faster than the original iterative Jacobi method used in this solver. Still, even with hardware support, the overall performance of our QR-based hardware is lower than its original software version. View Full-Text
Keywords: ODE; linear-solver; QR factorization; parallel; heterogeneous-system; FPGA; OpenCL; Intel HARP architecture ODE; linear-solver; QR factorization; parallel; heterogeneous-system; FPGA; OpenCL; Intel HARP architecture
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MDPI and ACS Style

Alberto Oliveira de Souza Junior, C.; Bispo, J.; Cardoso, J.M.P.; Diniz, P.C.; Marques, E. Exploration of FPGA-Based Hardware Designs for QR Decomposition for Solving Stiff ODE Numerical Methods Using the HARP Hybrid Architecture. Electronics 2020, 9, 843. https://doi.org/10.3390/electronics9050843

AMA Style

Alberto Oliveira de Souza Junior C, Bispo J, Cardoso JMP, Diniz PC, Marques E. Exploration of FPGA-Based Hardware Designs for QR Decomposition for Solving Stiff ODE Numerical Methods Using the HARP Hybrid Architecture. Electronics. 2020; 9(5):843. https://doi.org/10.3390/electronics9050843

Chicago/Turabian Style

Alberto Oliveira de Souza Junior, Carlos, João Bispo, João M.P. Cardoso, Pedro C. Diniz, and Eduardo Marques. 2020. "Exploration of FPGA-Based Hardware Designs for QR Decomposition for Solving Stiff ODE Numerical Methods Using the HARP Hybrid Architecture" Electronics 9, no. 5: 843. https://doi.org/10.3390/electronics9050843

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